From e9e73d78a8fb5566fdb306482945f6c9ff45c2a9 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Wed, 17 Aug 2022 21:37:51 +0200 Subject: [PATCH] timer: add orion-timer support MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Add timer support for Kirkwood and MVEBU devices. Cc: Pali Rohár Signed-off-by: Michael Walle Acked-by: Pali Rohár Reviewed-by: Stefan Roese --- drivers/timer/Kconfig | 6 ++++ drivers/timer/Makefile | 1 + drivers/timer/orion-timer.c | 63 +++++++++++++++++++++++++++++++++++++ 3 files changed, 70 insertions(+) create mode 100644 drivers/timer/orion-timer.c diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 20b5af7e26..4049290148 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -194,6 +194,12 @@ config OMAP_TIMER help Select this to enable an timer for Omap devices. +config ORION_TIMER + bool "Orion timer support" + depends on TIMER + help + Select this to enable an timer for Orion devices. + config RISCV_TIMER bool "RISC-V timer support" depends on TIMER && RISCV diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index d9822a5370..560e2d27e1 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o obj-$(CONFIG_NOMADIK_MTU_TIMER) += nomadik-mtu-timer.o obj-$(CONFIG_NPCM_TIMER) += npcm-timer.o obj-$(CONFIG_OMAP_TIMER) += omap-timer.o +obj-$(CONFIG_ORION_TIMER) += orion-timer.o obj-$(CONFIG_RENESAS_OSTM_TIMER) += ostm_timer.o obj-$(CONFIG_RISCV_TIMER) += riscv_timer.o obj-$(CONFIG_ROCKCHIP_TIMER) += rockchip_timer.o diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c new file mode 100644 index 0000000000..fd30e1bf03 --- /dev/null +++ b/drivers/timer/orion-timer.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include +#include +#include +#include +#include + +#define TIMER_CTRL 0x00 +#define TIMER0_EN BIT(0) +#define TIMER0_RELOAD_EN BIT(1) +#define TIMER0_RELOAD 0x10 +#define TIMER0_VAL 0x14 + +struct orion_timer_priv { + void *base; +}; + +static uint64_t orion_timer_get_count(struct udevice *dev) +{ + struct orion_timer_priv *priv = dev_get_priv(dev); + + return ~readl(priv->base + TIMER0_VAL); +} + +static int orion_timer_probe(struct udevice *dev) +{ + struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct orion_timer_priv *priv = dev_get_priv(dev); + + priv->base = devfdt_remap_addr_index(dev, 0); + if (!priv->base) { + debug("unable to map registers\n"); + return -ENOMEM; + } + + uc_priv->clock_rate = CONFIG_SYS_TCLK; + + writel(~0, priv->base + TIMER0_VAL); + writel(~0, priv->base + TIMER0_RELOAD); + + /* enable timer */ + setbits_le32(priv->base + TIMER_CTRL, TIMER0_EN | TIMER0_RELOAD_EN); + + return 0; +} + +static const struct timer_ops orion_timer_ops = { + .get_count = orion_timer_get_count, +}; + +static const struct udevice_id orion_timer_ids[] = { + { .compatible = "marvell,orion-timer" }, + {} +}; + +U_BOOT_DRIVER(orion_timer) = { + .name = "orion_timer", + .id = UCLASS_TIMER, + .of_match = orion_timer_ids, + .probe = orion_timer_probe, + .ops = &orion_timer_ops, + .priv_auto = sizeof(struct orion_timer_priv), +}; -- 2.39.5