From e919aa23ef473649fc1ba1694da13a15835d74f1 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 23 Mar 2014 22:45:41 +0100 Subject: [PATCH] ARM: mx6: Add PCIe on SabreSDP Add support for PCIe on MX6 SabreSDP board and enable the support in the config file. Signed-off-by: Marek Vasut Cc: Stefano Babic Cc: Fabio Estevam Cc: Liu Ying --- board/freescale/mx6sabresd/mx6sabresd.c | 11 +++++++++++ include/configs/mx6sabresd.h | 10 ++++++++++ 2 files changed, 21 insertions(+) diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 12d8c5664e..d7d932eeb8 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -135,6 +135,16 @@ static void setup_spi(void) imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); } +iomux_v3_cfg_t const pcie_pads[] = { + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), /* POWER */ + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET */ +}; + +static void setup_pcie(void) +{ + imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads)); +} + iomux_v3_cfg_t const di0_pads[] = { MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* DISP0_CLK */ MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, /* DISP0_HSYNC */ @@ -454,6 +464,7 @@ int overwrite_console(void) int board_eth_init(bd_t *bis) { setup_iomux_enet(); + setup_pcie(); return cpu_eth_init(bis); } diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 4919f53328..5d02d23ec7 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -48,4 +48,14 @@ #define CONFIG_IPUV3_CLK 260000000 #define CONFIG_IMX_HDMI +#define CONFIG_CMD_PCI +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) +#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) +#endif + #endif /* __MX6QSABRESD_CONFIG_H */ -- 2.39.5