From e8e39d6cd542672ab2d6897f84f5f6d66383e69e Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Tue, 14 May 2024 12:17:50 +0200 Subject: [PATCH] mach-ipq40xx: add CPU specific code Provide basic DRAM info population from DT, cache setting and the board_init stub. Signed-off-by: Robert Marko Acked-by: Caleb Connolly Signed-off-by: Caleb Connolly --- arch/arm/mach-ipq40xx/Makefile | 7 ++++++ arch/arm/mach-ipq40xx/cpu.c | 43 ++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+) create mode 100644 arch/arm/mach-ipq40xx/Makefile create mode 100644 arch/arm/mach-ipq40xx/cpu.c diff --git a/arch/arm/mach-ipq40xx/Makefile b/arch/arm/mach-ipq40xx/Makefile new file mode 100644 index 0000000000..d611de9933 --- /dev/null +++ b/arch/arm/mach-ipq40xx/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2024 Sartura Ltd. +# +# Author: Robert Marko + +obj-y += cpu.o diff --git a/arch/arm/mach-ipq40xx/cpu.c b/arch/arm/mach-ipq40xx/cpu.c new file mode 100644 index 0000000000..92c34d6111 --- /dev/null +++ b/arch/arm/mach-ipq40xx/cpu.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * CPU code for Qualcomm IPQ40xx SoC + * + * Copyright (c) 2024 Sartura Ltd. + * + * Author: Robert Marko + */ + +#include +#include + +int dram_init(void) +{ + int ret; + + ret = fdtdec_setup_memory_banksize(); + if (ret) + return ret; + return fdtdec_setup_mem_size_base(); +} + +/* + * Enable/Disable D-cache. + * I-cache is already enabled in start.S + */ +void enable_caches(void) +{ + dcache_enable(); +} + +void disable_caches(void) +{ + dcache_disable(); +} + +/* + * In case boards need specific init code, they can override this stub. + */ +int __weak board_init(void) +{ + return 0; +} -- 2.39.5