From e1379b0730fcef15e6e77305a56f35912697409c Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 25 Mar 2013 07:40:14 +0000 Subject: [PATCH] powerpc/t4qds: Add SW7[4] in the DIP switch display SW7[4] is the new bit which controls the mapping of eMMC vs SDHC. Signed-off-by: York Sun Signed-off-by: Andy Fleming --- board/freescale/t4qds/t4qds.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c index b48855e492..f0f280b253 100644 --- a/board/freescale/t4qds/t4qds.c +++ b/board/freescale/t4qds/t4qds.c @@ -801,7 +801,7 @@ void qixis_dump_switch(void) * Any bit with 1 means that bit cannot be reverse engineered. * It will be displayed as _ in binary format. */ - static const u8 mask[] = {0, 0, 0, 0, 0, 0x1, 0xdf, 0x3f, 0x1f}; + static const u8 mask[] = {0, 0, 0, 0, 0, 0x1, 0xcf, 0x3f, 0x1f}; char buf[10]; u8 brdcfg[16], dutcfg[16]; @@ -832,7 +832,8 @@ void qixis_dump_switch(void) sw[5] = ((brdcfg[0] & 0x0f) << 4) | \ ((QIXIS_READ(rst_ctl) & 0x30) >> 2) | \ ((brdcfg[0] & 0x40) >> 5); - sw[6] = (brdcfg[11] & 0x20); + sw[6] = (brdcfg[11] & 0x20) | + ((brdcfg[5] & 0x02) << 3); sw[7] = (((~QIXIS_READ(rst_ctl)) & 0x40) << 1) | \ ((brdcfg[5] & 0x10) << 2); sw[8] = ((brdcfg[12] & 0x08) << 4) | \ -- 2.39.5