From d3bcdf838e2991d58571308fa6e04ca335bc06e8 Mon Sep 17 00:00:00 2001 From: Patrice Vilchez Date: Tue, 27 May 2008 11:15:29 +0200 Subject: [PATCH] [AT91SAM9] Fix NAND FLASH timings Fix NAND FLASH timings for at91sam9x evaluation kits. New timings are based on application note "NAND Flash Support on AT91SAM9 Microcontrollers" available at http://atmel.com/dyn/resources/prod_documents/doc6255.pdf Signed-off-by: Patrice Vilchez Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Acked-by: Stelian Pop --- board/atmel/at91sam9260ek/at91sam9260ek.c | 4 ++-- board/atmel/at91sam9261ek/at91sam9261ek.c | 12 ++++++------ board/atmel/at91sam9263ek/at91sam9263ek.c | 4 ++-- board/atmel/at91sam9rlek/at91sam9rlek.c | 12 ++++++------ 4 files changed, 16 insertions(+), 16 deletions(-) diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 4247c949fd..836a0c40bf 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -80,8 +80,8 @@ static void at91sam9260ek_nand_hw_init(void) /* Configure SMC CS3 for NAND/SmartMedia */ at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 3de234ce3e..647aab5256 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -82,13 +82,13 @@ static void at91sam9261ek_nand_hw_init(void) /* Configure SMC CS3 for NAND/SmartMedia */ at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) | - AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | @@ -97,7 +97,7 @@ static void at91sam9261ek_nand_hw_init(void) #else /* CFG_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif - AT91_SMC_TDF_(1)); + AT91_SMC_TDF_(2)); at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 169ee25b1d..927fc912c9 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -83,8 +83,8 @@ static void at91sam9263ek_nand_hw_init(void) /* Configure SMC CS3 for NAND/SmartMedia */ at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c index 10423d2592..509e7c38e1 100644 --- a/board/atmel/at91sam9rlek/at91sam9rlek.c +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -82,13 +82,13 @@ static void at91sam9rlek_nand_hw_init(void) /* Configure SMC CS3 for NAND/SmartMedia */ at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) | - AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | @@ -97,7 +97,7 @@ static void at91sam9rlek_nand_hw_init(void) #else /* CFG_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif - AT91_SMC_TDF_(1)); + AT91_SMC_TDF_(2)); at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD); -- 2.39.5