From bf7fa7d5612ec99d73f32438f4c37c8df256495b Mon Sep 17 00:00:00 2001 From: Paul Barker Date: Mon, 16 Oct 2023 10:25:40 +0100 Subject: [PATCH] arm: rmobile: Add CPU detection for RZ/G2L The ARM TrustedFirmware code for the Renesas RZ/G2L SoC family passes a devicetree blob to the bootloader as an argument in the same was previous R-Car Gen3/Gen4 SoCs. This blob contains a compatible string which can be used to identify the particular SoC we are running on. We do this as reading the DEVID & PRR registers from u-boot is not sufficient to differentiate between the R9A07G044L (RZ/G2L) and R9A07G044C (RZ/G2LC) SoCs. An additional read from offset 0x11861178 is needed but this address is in the OTP region which can only be read from the secure world (i.e. TrustedFirmware). So we have to rely on TrustedFirmware to determine the SoC and pass this information to u-boot via an fdt blob. Signed-off-by: Paul Barker Reviewed-by: Biju Das Reviewed-by: Lad Prabhakar Reviewed-by: Marek Vasut --- arch/arm/mach-rmobile/Makefile | 5 +- arch/arm/mach-rmobile/cpu_info-rzg2l.c | 63 ++++++++++++++++++++ arch/arm/mach-rmobile/include/mach/rmobile.h | 1 + 3 files changed, 68 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-rmobile/cpu_info-rzg2l.c diff --git a/arch/arm/mach-rmobile/Makefile b/arch/arm/mach-rmobile/Makefile index 4eddba53ed..45d6a0e2a2 100644 --- a/arch/arm/mach-rmobile/Makefile +++ b/arch/arm/mach-rmobile/Makefile @@ -10,8 +10,11 @@ obj-$(CONFIG_DISPLAY_BOARDINFO) += board.o obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o obj-$(CONFIG_R8A7740) += lowlevel_init.o cpu_info-r8a7740.o pfc-r8a7740.o obj-$(CONFIG_RCAR_GEN2) += lowlevel_init_ca15.o cpu_info-rcar.o -obj-$(CONFIG_RCAR_64) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-gen3.o +obj-$(CONFIG_RCAR_64) += lowlevel_init_gen3.o memmap-gen3.o +obj-$(CONFIG_RCAR_GEN3) += cpu_info-rcar.o +obj-$(CONFIG_RCAR_GEN4) += cpu_info-rcar.o obj-$(CONFIG_RZ_G2) += cpu_info-rzg.o +obj-$(CONFIG_RZG2L) += cpu_info-rzg2l.o ifneq ($(CONFIG_R8A779A0),) obj-$(CONFIG_ARMV8_PSCI) += psci-r8a779a0.o diff --git a/arch/arm/mach-rmobile/cpu_info-rzg2l.c b/arch/arm/mach-rmobile/cpu_info-rzg2l.c new file mode 100644 index 0000000000..de4892ee90 --- /dev/null +++ b/arch/arm/mach-rmobile/cpu_info-rzg2l.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021,2023 Renesas Electronics Corporation + * + */ + +#include +#include +#include + +#define SYSC_LSI_DEVID 0x11020A04 + +/* If the firmware passed a device tree, use it for soc identification. */ +extern u64 rcar_atf_boot_args[]; + +/* CPU information table */ +struct tfa_info { + const char *soc_name; + const char *cpu_name; + u32 cpu_type; +}; + +static const struct tfa_info tfa_info[] = { + { "renesas,r9a07g044l2", "R9A07G044L", RMOBILE_CPU_TYPE_R9A07G044L }, +}; + +static const struct tfa_info invalid_tfa_info = { NULL, "(invalid)", 0 }; + +static const struct tfa_info *get_tfa_info(void) +{ + void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]); + + if (fdt_magic(atf_fdt_blob) == FDT_MAGIC) { + unsigned int i; + for (i = 0; i < ARRAY_SIZE(tfa_info); i++) { + if (!fdt_node_check_compatible(atf_fdt_blob, 0, + tfa_info[i].soc_name)) + return &tfa_info[i]; + } + } + + return &invalid_tfa_info; +} + +const u8 *rzg_get_cpu_name(void) +{ + return get_tfa_info()->cpu_name; +} + +u32 rmobile_get_cpu_type(void) +{ + return get_tfa_info()->cpu_type; +} + +u32 rmobile_get_cpu_rev_integer(void) +{ + return (readl(SYSC_LSI_DEVID) >> 28) + 1; +} + +u32 rmobile_get_cpu_rev_fraction(void) +{ + return 0; +} diff --git a/arch/arm/mach-rmobile/include/mach/rmobile.h b/arch/arm/mach-rmobile/include/mach/rmobile.h index 053ad08add..88b8b78671 100644 --- a/arch/arm/mach-rmobile/include/mach/rmobile.h +++ b/arch/arm/mach-rmobile/include/mach/rmobile.h @@ -43,6 +43,7 @@ #define RMOBILE_CPU_TYPE_R8A779A0 0x59 #define RMOBILE_CPU_TYPE_R8A779F0 0x5A #define RMOBILE_CPU_TYPE_R8A779G0 0x5C +#define RMOBILE_CPU_TYPE_R9A07G044L 0x9A070440 #ifndef __ASSEMBLY__ #include -- 2.39.5