From bd6375c5511c3b96ce91ea66084d27afe2bbc43b Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Mon, 22 May 2023 23:47:08 +0200 Subject: [PATCH] video: rockchip: dw_mipi_dsi: Fix GRF access Use proper register base and access method to access GRF registers. GRF registers start at a completely different base, and need special access method, that sets the change mask in the 16 MSBs. Signed-off-by: Ondrej Jirman --- drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c index fd885ac8cc..117c3db21a 100644 --- a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c +++ b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -30,6 +31,9 @@ #include #include +#include +#include + #define USEC_PER_SEC 1000000L /* @@ -197,6 +201,7 @@ struct dw_rockchip_dsi_priv { struct mipi_dsi_device device; void __iomem *base; struct udevice *panel; + void __iomem *grf; /* Optional external dphy */ struct phy phy; @@ -752,16 +757,13 @@ static int dw_mipi_dsi_rockchip_set_bl(struct udevice *dev, int percent) static void dw_mipi_dsi_rockchip_config(struct dw_rockchip_dsi_priv *dsi) { if (dsi->cdata->lanecfg1_grf_reg) - dsi_write(dsi, dsi->cdata->lanecfg1_grf_reg, - dsi->cdata->lanecfg1); + rk_setreg(dsi->grf + dsi->cdata->lanecfg1_grf_reg, dsi->cdata->lanecfg1); if (dsi->cdata->lanecfg2_grf_reg) - dsi_write(dsi, dsi->cdata->lanecfg2_grf_reg, - dsi->cdata->lanecfg2); + rk_setreg(dsi->grf + dsi->cdata->lanecfg2_grf_reg, dsi->cdata->lanecfg2); if (dsi->cdata->enable_grf_reg) - dsi_write(dsi, dsi->cdata->enable_grf_reg, - dsi->cdata->enable); + rk_setreg(dsi->grf + dsi->cdata->enable_grf_reg, dsi->cdata->enable); } static int dw_mipi_dsi_rockchip_bind(struct udevice *dev) @@ -794,6 +796,8 @@ static int dw_mipi_dsi_rockchip_probe(struct udevice *dev) return -EINVAL; } + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + i = 0; while (cdata[i].reg) { if (cdata[i].reg == (fdt_addr_t)priv->base) { -- 2.39.5