From a535d717f51e5410fb0a9c257c2c2b5d360686c9 Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Tue, 9 Apr 2024 20:03:00 +0200 Subject: [PATCH] mmc: msm_sdhci: correct vendor_spec_cap0 register for v5 The V4 and V5 controllers have quite varied register layouts. Inherit the register offsets and naming from the Linux driver. More version specific offsets can be inherited from Linux as needed. Fixes: 364c22a ("mmc: msm_sdhci: Add SDCC version 5.0.0 support") Reviewed-by: Neil Armstrong Signed-off-by: Caleb Connolly --- drivers/mmc/msm_sdhci.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 059cb3da77..f23d425144 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -33,9 +33,6 @@ #define SDCC_MCI_STATUS2_MCI_ACT 0x1 #define SDCC_MCI_HC_MODE 0x78 -/* Non standard (?) SDHCI register */ -#define SDHCI_VENDOR_SPEC_CAPABILITIES0 0x11c - struct msm_sdhc_plat { struct mmc_config cfg; struct mmc mmc; @@ -49,6 +46,8 @@ struct msm_sdhc { struct msm_sdhc_variant_info { bool mci_removed; + + u32 core_vendor_spec_capabilities0; }; DECLARE_GLOBAL_DATA_PTR; @@ -181,7 +180,7 @@ static int msm_sdc_probe(struct udevice *dev) if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) { caps = readl(host->ioaddr + SDHCI_CAPABILITIES); caps |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT; - writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0); + writel(caps, host->ioaddr + var_info->core_vendor_spec_capabilities0); } ret = mmc_of_parse(dev, &plat->cfg); @@ -244,10 +243,14 @@ static int msm_sdc_bind(struct udevice *dev) static const struct msm_sdhc_variant_info msm_sdhc_mci_var = { .mci_removed = false, + + .core_vendor_spec_capabilities0 = 0x21c, }; static const struct msm_sdhc_variant_info msm_sdhc_v5_var = { .mci_removed = true, + + .core_vendor_spec_capabilities0 = 0x11c, }; static const struct udevice_id msm_mmc_ids[] = { -- 2.39.5