From a213289953addc09fe35b2ddf34e1cfb51cff697 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Thu, 30 Nov 2023 08:49:11 -0600 Subject: [PATCH] board: ti: k3: Remove need for CFG_SYS_SDRAM_BASE The base address of extended DDR does not change across the K3 family. Setting this per SoC is not needed. Remove this definition to help remove the last bits from K3 include/configs/*.h files. Signed-off-by: Andrew Davis --- board/ti/am65x/evm.c | 4 ++-- board/ti/j721e/evm.c | 4 ++-- board/ti/j721s2/evm.c | 4 ++-- include/configs/am62ax_evm.h | 4 ---- include/configs/am65x_evm.h | 3 --- include/configs/j721e_evm.h | 2 -- include/configs/j721s2_evm.h | 3 --- 7 files changed, 6 insertions(+), 18 deletions(-) diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c index 975eb17946..df209021c1 100644 --- a/board/ti/am65x/evm.c +++ b/board/ti/am65x/evm.c @@ -73,13 +73,13 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) int dram_init_banksize(void) { /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].start = 0x80000000; gd->bd->bi_dram[0].size = 0x80000000; gd->ram_size = 0x80000000; #ifdef CONFIG_PHYS_64BIT /* Bank 1 declares the memory available in the DDR high region */ - gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1; + gd->bd->bi_dram[1].start = 0x880000000; gd->bd->bi_dram[1].size = 0x80000000; gd->ram_size = 0x100000000; #endif diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index 0768385f40..c541880107 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -61,13 +61,13 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) int dram_init_banksize(void) { /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].start = 0x80000000; gd->bd->bi_dram[0].size = 0x80000000; gd->ram_size = 0x80000000; #ifdef CONFIG_PHYS_64BIT /* Bank 1 declares the memory available in the DDR high region */ - gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1; + gd->bd->bi_dram[1].start = 0x880000000; gd->bd->bi_dram[1].size = 0x80000000; gd->ram_size = 0x100000000; #endif diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c index db71739077..1220cd8451 100644 --- a/board/ti/j721s2/evm.c +++ b/board/ti/j721s2/evm.c @@ -56,13 +56,13 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) int dram_init_banksize(void) { /* Bank 0 declares the memory available in the DDR low region */ - gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].start = 0x80000000; gd->bd->bi_dram[0].size = 0x7fffffff; gd->ram_size = 0x80000000; #ifdef CONFIG_PHYS_64BIT /* Bank 1 declares the memory available in the DDR high region */ - gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1; + gd->bd->bi_dram[1].start = 0x880000000; gd->bd->bi_dram[1].size = 0x37fffffff; gd->ram_size = 0x400000000; #endif diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h index 57003f120f..496d1c2348 100644 --- a/include/configs/am62ax_evm.h +++ b/include/configs/am62ax_evm.h @@ -12,10 +12,6 @@ #include #include -/* DDR Configuration */ -#define CFG_SYS_SDRAM_BASE1 0x880000000 - - /* Now for the remaining common defines */ #include diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 811dc0ff1a..64458ebb4b 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -14,9 +14,6 @@ #include #include -/* DDR Configuration */ -#define CFG_SYS_SDRAM_BASE1 0x880000000 - /* Now for the remaining common defines */ #include diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index ea39d1bf82..c26438c868 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -11,8 +11,6 @@ #include -/* DDR Configuration */ -#define CFG_SYS_SDRAM_BASE1 0x880000000 /* FLASH Configuration */ #define CFG_SYS_FLASH_BASE 0x000000000 diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 692c6bb5e4..846cfa7531 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -12,9 +12,6 @@ #include #include -/* DDR Configuration */ -#define CFG_SYS_SDRAM_BASE1 0x880000000 - /* SPL Loader Configuration */ #if defined(CONFIG_TARGET_J721S2_A72_EVM) #define CFG_SYS_UBOOT_BASE 0x50280000 -- 2.39.5