From a1f8abf4686065f46ac840e956a1aeb68d90d969 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Tue, 10 Jan 2023 04:31:24 -0700 Subject: [PATCH] mmc: zynq_sdhci: Add support and quirk for HS400 Add support for HS400 in mode2timing array. Add a quirk for Versal NET platform to indicate that HS400 is supported through bit63 of capability register. Signed-off-by: Ashok Reddy Soma --- drivers/mmc/zynq_sdhci.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 4f0dde326c..91e309d275 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -153,6 +153,7 @@ static const u8 mode2timing[] = { [UHS_DDR50] = MMC_TIMING_UHS_DDR50, [UHS_SDR104] = MMC_TIMING_UHS_SDR104, [MMC_HS_200] = MMC_TIMING_MMC_HS200, + [MMC_HS_400] = MMC_TIMING_MMC_HS400, }; #if defined(CONFIG_ARCH_VERSAL_NET) @@ -1133,6 +1134,10 @@ static int arasan_sdhci_probe(struct udevice *dev) if (priv->no_1p8) host->quirks |= SDHCI_QUIRK_NO_1_8_V; + if (CONFIG_IS_ENABLED(ARCH_VERSAL_NET) && + device_is_compatible(dev, "xlnx,versal-net-5.1-emmc")) + host->quirks |= SDHCI_QUIRK_CAPS_BIT63_FOR_HS400; + plat->cfg.f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ; ret = mmc_of_parse(dev, &plat->cfg); -- 2.39.5