From 9a699a0a0d62b326d04ac248578b6ce6f53be525 Mon Sep 17 00:00:00 2001 From: Paul Barker Date: Tue, 19 Nov 2024 19:36:26 +0000 Subject: [PATCH] clk: rzg2l: Ignore enable for core clocks In the RZ/G2L family, core clocks are always on and can't be disabled. However, drivers which are shared with other SoCs may call clk_enable() or clk_enable_bulk() for a clock referenced in the device tree which happens to be a core clock on the RZ/G2L. To avoid the need for conditionals in these drivers, simply ignore attempts to enable a core clock. Signed-off-by: Paul Barker Reviewed-by: Marek Vasut --- drivers/clk/renesas/rzg2l-cpg.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index c8735d869c..3c5340df8e 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -69,7 +69,15 @@ static int rzg2l_cpg_clk_set(struct clk *clk, bool enable) dev_dbg(clk->dev, "%s %s clock %u\n", enable ? "enable" : "disable", is_mod_clk(clk->id) ? "module" : "core", cpg_clk_id); + if (!is_mod_clk(clk->id)) { + /* + * Non-module clocks are always on. Ignore attempts to enable + * them and reject attempts to disable them. + */ + if (enable) + return 0; + dev_err(clk->dev, "ID %lu is not a module clock\n", clk->id); return -EINVAL; } -- 2.39.5