From 92cb207af110855ee9ae132c638b3d289a53d930 Mon Sep 17 00:00:00 2001 From: Hugh Cole-Baker Date: Sun, 22 Nov 2020 13:03:44 +0000 Subject: [PATCH] rockchip: pinebook-pro: default to SPI bus 1 for SPI-flash SPI flash on this machine is located on bus 1, default to using bus 1 for SPI flash and stop aliasing it to bus 0. Signed-off-by: Hugh Cole-Baker Suggested-by: Simon Glass Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob") --- arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 4 ---- configs/pinebook-pro-rk3399_defconfig | 2 ++ 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi index ded7db0aef..ee3b98698e 100644 --- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi +++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi @@ -7,10 +7,6 @@ #include "rk3399-sdram-lpddr4-100.dtsi" / { - aliases { - spi0 = &spi1; - }; - chosen { u-boot,spl-boot-order = "same-as-spl", &sdhci, &spiflash, &sdmmc; }; diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index 8fbd7280ac..a471c3e06a 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_DM_KEYBOARD=y @@ -49,6 +50,7 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y -- 2.39.5