From 92781cff6e7115b5a8957e6a9ded6cd7516d4fc7 Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Mon, 26 Feb 2024 17:26:12 +0000 Subject: [PATCH] serial: msm: fix clock handling and pinctrl Use the modern helpers to fetch the clock and use the correct property ("clocks" instead of "clock"). Drop the call to pinctrl_select_state() as no boards have a "uart" pinctrl state and this prints confusing errors. Reviewed-by: Neil Armstrong Reviewed-by: Sumit Garg Tested-by: Sumit Garg #qcs404 Signed-off-by: Caleb Connolly --- arch/arm/dts/dragonboard410c.dts | 3 ++- arch/arm/dts/dragonboard820c.dts | 3 ++- drivers/serial/serial_msm.c | 25 +++++-------------------- 3 files changed, 9 insertions(+), 22 deletions(-) diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index 02c824d022..c395e6cc04 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -84,7 +84,8 @@ serial@78b0000 { compatible = "qcom,msm-uartdm-v1.4"; reg = <0x78b0000 0x200>; - clock = <&clkc 4>; + clocks = <&clkc 4>; + clock-names = "core"; pinctrl-names = "uart"; pinctrl-0 = <&blsp1_uart>; }; diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index 146a0af8aa..86b7f83d36 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -78,7 +78,8 @@ blsp2_uart2: serial@75b0000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x75b0000 0x1000>; - clock = <&gcc 4>; + clocks = <&gcc 4>; + clock-names = "core"; pinctrl-names = "uart"; pinctrl-0 = <&blsp8_uart>; }; diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c index 44b93bd7ff..ac4280c6c4 100644 --- a/drivers/serial/serial_msm.c +++ b/drivers/serial/serial_msm.c @@ -160,29 +160,14 @@ static int msm_uart_clk_init(struct udevice *dev) { uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), "clock-frequency", 115200); - uint clkd[2]; /* clk_id and clk_no */ - int clk_offset; - struct udevice *clk_dev; struct clk clk; int ret; - ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "clock", - clkd, 2); - if (ret) - return ret; - - clk_offset = fdt_node_offset_by_phandle(gd->fdt_blob, clkd[0]); - if (clk_offset < 0) - return clk_offset; - - ret = uclass_get_device_by_of_offset(UCLASS_CLK, clk_offset, &clk_dev); - if (ret) - return ret; - - clk.id = clkd[1]; - ret = clk_request(clk_dev, &clk); - if (ret < 0) + ret = clk_get_by_name(dev, "core", &clk); + if (ret < 0) { + pr_warn("%s: Failed to get clock: %d\n", __func__, ret); return ret; + } ret = clk_set_rate(&clk, clk_rate); if (ret < 0) @@ -218,7 +203,6 @@ static int msm_serial_probe(struct udevice *dev) if (ret) return ret; - pinctrl_select_state(dev, "uart"); uart_dm_init(priv); return 0; @@ -251,6 +235,7 @@ U_BOOT_DRIVER(serial_msm) = { .priv_auto = sizeof(struct msm_serial_data), .probe = msm_serial_probe, .ops = &msm_serial_ops, + .flags = DM_FLAG_PRE_RELOC, }; #ifdef CONFIG_DEBUG_UART_MSM -- 2.39.5