From 881ae794b93b7bc56be1c43015845fac34d0f2c9 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Fri, 17 May 2019 11:17:13 +0200 Subject: [PATCH] calimain: remove board This board still doesn't select CONFIG_DM and seems to be umaintained. As it makes progress on modernizing several DaVinci drivers more difficult and the maintainer has not expressed interest in updating it, this patch proposes to remove it. Signed-off-by: Bartosz Golaszewski --- arch/arm/include/asm/mach-types.h | 1 - arch/arm/mach-davinci/Kconfig | 5 - board/omicron/calimain/Kconfig | 12 -- board/omicron/calimain/MAINTAINERS | 7 - board/omicron/calimain/Makefile | 8 - board/omicron/calimain/calimain.c | 145 --------------- configs/calimain_defconfig | 37 ---- include/configs/calimain.h | 272 ----------------------------- 8 files changed, 487 deletions(-) delete mode 100644 board/omicron/calimain/Kconfig delete mode 100644 board/omicron/calimain/MAINTAINERS delete mode 100644 board/omicron/calimain/Makefile delete mode 100644 board/omicron/calimain/calimain.c delete mode 100644 configs/calimain_defconfig delete mode 100644 include/configs/calimain.h diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h index 9f82efe007..da2cc565f2 100644 --- a/arch/arm/include/asm/mach-types.h +++ b/arch/arm/include/asm/mach-types.h @@ -3475,7 +3475,6 @@ #define MACH_TYPE_SGH_I710 3525 #define MACH_TYPE_INTEGREPROSCB 3526 #define MACH_TYPE_MONZA 3527 -#define MACH_TYPE_CALIMAIN 3528 #define MACH_TYPE_MX6Q_SABREAUTO 3529 #define MACH_TYPE_GMA01X 3530 #define MACH_TYPE_SBC51 3531 diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 12b1e682e6..6031a0c0c7 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -27,10 +27,6 @@ config TARGET_OMAPL138_LCDK select SOC_DA8XX select SUPPORT_SPL -config TARGET_CALIMAIN - bool "Calimain board" - select SOC_DA850 - config TARGET_LEGOEV3 bool "LEGO MINDSTORMS EV3" select MACH_DAVINCI_DA850_EVM @@ -149,7 +145,6 @@ endif source "board/Barix/ipam390/Kconfig" source "board/davinci/da8xxevm/Kconfig" source "board/davinci/ea20/Kconfig" -source "board/omicron/calimain/Kconfig" source "board/lego/ev3/Kconfig" config SPL_LDSCRIPT diff --git a/board/omicron/calimain/Kconfig b/board/omicron/calimain/Kconfig deleted file mode 100644 index 1ec48e6b55..0000000000 --- a/board/omicron/calimain/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_CALIMAIN - -config SYS_BOARD - default "calimain" - -config SYS_VENDOR - default "omicron" - -config SYS_CONFIG_NAME - default "calimain" - -endif diff --git a/board/omicron/calimain/MAINTAINERS b/board/omicron/calimain/MAINTAINERS deleted file mode 100644 index ad788a6dba..0000000000 --- a/board/omicron/calimain/MAINTAINERS +++ /dev/null @@ -1,7 +0,0 @@ -CALIMAIN BOARD -M: Manfred Rudigier -M: Christoph Rüdisser -S: Maintained -F: board/omicron/calimain/ -F: include/configs/calimain.h -F: configs/calimain_defconfig diff --git a/board/omicron/calimain/Makefile b/board/omicron/calimain/Makefile deleted file mode 100644 index d873f0d736..0000000000 --- a/board/omicron/calimain/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000, 2001, 2002 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2007 Sergey Kubushyn - -obj-y := calimain.o diff --git a/board/omicron/calimain/calimain.c b/board/omicron/calimain/calimain.c deleted file mode 100644 index 6f7b2b8cb1..0000000000 --- a/board/omicron/calimain/calimain.c +++ /dev/null @@ -1,145 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2011 OMICRON electronics GmbH - * - * Based on da850evm.c. Original Copyrights follow: - * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ - * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. - * Copyright (C) 2007 Sergey Kubushyn - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "../../../drivers/gpio/da8xx_gpio.h" - -DECLARE_GLOBAL_DATA_PTR; - -#define CALIMAIN_HWVERSION_MASK 0x7f000000 -#define CALIMAIN_HWVERSION_SHIFT 24 - -/* Hardware version pinmux settings */ -const struct pinmux_config hwversion_pins[] = { - { pinmux(16), 8, 2 }, /* GP7[15] */ - { pinmux(16), 8, 3 }, /* GP7[14] */ - { pinmux(16), 8, 4 }, /* GP7[13] */ - { pinmux(16), 8, 5 }, /* GP7[12] */ - { pinmux(16), 8, 6 }, /* GP7[11] */ - { pinmux(16), 8, 7 }, /* GP7[10] */ - { pinmux(17), 8, 0 }, /* GP7[9] */ - { pinmux(17), 8, 1 } /* GP7[8] */ -}; - -const struct pinmux_resource pinmuxes[] = { - PINMUX_ITEM(uart2_pins_txrx), - PINMUX_ITEM(emac_pins_mii), - PINMUX_ITEM(emac_pins_mdio), - PINMUX_ITEM(emifa_pins_nor), - PINMUX_ITEM(emifa_pins_cs2), - PINMUX_ITEM(emifa_pins_cs3), -}; - -const int pinmuxes_size = ARRAY_SIZE(pinmuxes); - -const struct lpsc_resource lpsc[] = { - { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ - { DAVINCI_LPSC_EMAC }, /* image download */ - { DAVINCI_LPSC_UART2 }, /* console */ - { DAVINCI_LPSC_GPIO }, -}; - -const int lpsc_size = ARRAY_SIZE(lpsc); - -/* read board revision from GPIO7[8..14] */ -u32 get_board_rev(void) -{ - lpsc_on(DAVINCI_LPSC_GPIO); - if (davinci_configure_pin_mux(hwversion_pins, - ARRAY_SIZE(hwversion_pins)) != 0) - return 0xffffffff; - - return (davinci_gpio_bank67->in_data & CALIMAIN_HWVERSION_MASK) - >> CALIMAIN_HWVERSION_SHIFT; -} - -/* - * determine the oscillator frequency depending on the board revision - * - * rev 0x00 ... 25 MHz oscillator - * rev 0x01 ... 24 MHz oscillator - */ -int calimain_get_osc_freq(void) -{ - u32 rev; - int freq; - - rev = get_board_rev(); - switch (rev) { - case 0x00: - freq = 25000000; - break; - default: - freq = 24000000; - break; - } - return freq; -} - -int board_init(void) -{ - int val; - - irq_init(); - - /* address of boot parameters */ - gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - -#ifdef CONFIG_DRIVER_TI_EMAC - /* select emac MII mode */ - val = readl(&davinci_syscfg_regs->cfgchip3); - val &= ~(1 << 8); - writel(val, &davinci_syscfg_regs->cfgchip3); -#endif /* CONFIG_DRIVER_TI_EMAC */ - -#ifdef CONFIG_HW_WATCHDOG - davinci_hw_watchdog_enable(); -#endif - - printf("Input clock frequency: %d Hz\n", calimain_get_osc_freq()); - printf("Board revision: %d\n", get_board_rev()); - - return 0; -} - -#ifdef CONFIG_DRIVER_TI_EMAC -/* - * Initializes on-board ethernet controllers. - */ -int board_eth_init(bd_t *bis) -{ - if (!davinci_emac_initialize()) { - printf("Error: Ethernet init failed!\n"); - return -1; - } - - return 0; -} -#endif /* CONFIG_DRIVER_TI_EMAC */ - -#ifdef CONFIG_HW_WATCHDOG -void hw_watchdog_reset(void) -{ - davinci_hw_watchdog_reset(); -} -#endif diff --git a/configs/calimain_defconfig b/configs/calimain_defconfig deleted file mode 100644 index 2da4fc6537..0000000000 --- a/configs/calimain_defconfig +++ /dev/null @@ -1,37 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_DAVINCI=y -CONFIG_SYS_TEXT_BASE=0x60000000 -CONFIG_TARGET_CALIMAIN=y -CONFIG_DA850_LOWLEVEL=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_BOOTCOUNT_ADDR=0x01C23000 -CONFIG_BOOTDELAY=0 -CONFIG_VERSION_VARIABLE=y -# CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_SYS_PROMPT="Calimain > " -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_STOP_STR="\x0b" -CONFIG_CMD_IMLS=y -CONFIG_CMD_ASKENV=y -CONFIG_CRC32_VERIFY=y -CONFIG_CMD_GPIO=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_DIAG=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_BOOTLIMIT=3 -CONFIG_DA8XX_GPIO=y -# CONFIG_MMC is not set -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_SYS_FLASH_PROTECTION=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_MII=y -CONFIG_DRIVER_TI_EMAC=y -CONFIG_SYS_NS16550=y diff --git a/include/configs/calimain.h b/include/configs/calimain.h deleted file mode 100644 index e77218466f..0000000000 --- a/include/configs/calimain.h +++ /dev/null @@ -1,272 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011-2014 OMICRON electronics GmbH - * - * Based on da850evm.h. Original Copyrights follow: - * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ - * Copyright (C) 2007 Sergey Kubushyn - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Board - */ -#define CONFIG_MACH_TYPE MACH_TYPE_CALIMAIN - -/* - * SoC Configuration - */ -#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH -#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) -#define CONFIG_SYS_OSCIN_FREQ calimain_get_osc_freq() -#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_HW_WATCHDOG -#define CONFIG_SYS_WDTTIMERBASE DAVINCI_TIMER1_BASE -#define CONFIG_SYS_WDT_PERIOD_LOW \ - (60 * CONFIG_SYS_OSCIN_FREQ) /* 60 s heartbeat */ -#define CONFIG_SYS_WDT_PERIOD_HIGH 0x0 -#define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) - -/* - * PLL configuration - */ - -#define CONFIG_SYS_DA850_PLL0_PLLM \ - ((calimain_get_osc_freq() == 25000000) ? 23 : 24) -#define CONFIG_SYS_DA850_PLL1_PLLM \ - ((calimain_get_osc_freq() == 25000000) ? 20 : 21) - -/* - * DDR2 memory configuration - */ -#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ - DV_DDR_PHY_EXT_STRBEN | \ - (0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDBCR ( \ - (1 << DV_DDR_SDCR_DDR2EN_SHIFT) | \ - (1 << DV_DDR_SDCR_DDRDRIVE0_SHIFT) | \ - (1 << DV_DDR_SDCR_DDREN_SHIFT) | \ - (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \ - (1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) | \ - (0x3 << DV_DDR_SDCR_CL_SHIFT) | \ - (0x3 << DV_DDR_SDCR_IBANK_SHIFT) | \ - (0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT)) - -/* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */ -#define CONFIG_SYS_DA850_DDR2_SDBCR2 0 - -#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \ - (16 << DV_DDR_SDTMR1_RFC_SHIFT) | \ - (1 << DV_DDR_SDTMR1_RP_SHIFT) | \ - (1 << DV_DDR_SDTMR1_RCD_SHIFT) | \ - (1 << DV_DDR_SDTMR1_WR_SHIFT) | \ - (5 << DV_DDR_SDTMR1_RAS_SHIFT) | \ - (7 << DV_DDR_SDTMR1_RC_SHIFT) | \ - (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \ - (1 << DV_DDR_SDTMR1_WTR_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \ - (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \ - (2 << DV_DDR_SDTMR2_XP_SHIFT) | \ - (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \ - (18 << DV_DDR_SDTMR2_XSNR_SHIFT) | \ - (199 << DV_DDR_SDTMR2_XSRD_SHIFT) | \ - (0 << DV_DDR_SDTMR2_RTP_SHIFT) | \ - (2 << DV_DDR_SDTMR2_CKE_SHIFT)) - -#define CONFIG_SYS_DA850_DDR2_SDRCR 0x000003FF -#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30 - -/* - * Flash memory timing - */ - -#define CONFIG_SYS_DA850_CS2CFG ( \ - DAVINCI_ABCR_WSETUP(2) | \ - DAVINCI_ABCR_WSTROBE(5) | \ - DAVINCI_ABCR_WHOLD(3) | \ - DAVINCI_ABCR_RSETUP(1) | \ - DAVINCI_ABCR_RSTROBE(14) | \ - DAVINCI_ABCR_RHOLD(0) | \ - DAVINCI_ABCR_TA(3) | \ - DAVINCI_ABCR_ASIZE_16BIT) - -/* single 64 MB NOR flash device connected to CS2 and CS3 */ -#define CONFIG_SYS_DA850_CS3CFG CONFIG_SYS_DA850_CS2CFG - -/* - * Memory Info - */ -#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ -#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ -#define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ -#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ - -#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ - DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ - DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ - DAVINCI_SYSCFG_SUSPSRC_UART2 | \ - DAVINCI_SYSCFG_SUSPSRC_EMAC | \ - DAVINCI_SYSCFG_SUSPSRC_I2C) - -/* memtest start addr */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) - -/* memtest will be run on 16MB */ -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (16 << 20)) - -/* - * Serial Driver info - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ -#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ -#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ -#define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ -#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE -#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ -#define CONFIG_ENV_ADDR \ - (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SECT_SZ * 2) -#define CONFIG_ENV_SIZE (128 << 10) -#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE -#define PHYS_FLASH_SIZE (64 << 20) /* Flash size 64MB */ -#define CONFIG_SYS_MAX_FLASH_SECT \ - ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ) + 3) - -/* - * Network & Ethernet Configuration - */ -#ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_NET_RETRY_COUNT 10 -#endif - -/* - * U-Boot general configuration - */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ -#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) -#define CONFIG_LOADADDR 0xc0700000 -#define CONFIG_MX_CYCLIC - -/* - * Linux Information - */ -#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_CMDLINE_TAG -#define CONFIG_REVISION_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTCOMMAND "run checkupdate; run checkbutton;" -#define CONFIG_BOOT_RETRY_TIME 60 /* continue boot after 60 s inactivity */ -#define CONFIG_RESET_TO_RETRY - -/* - * Default environment settings - * gpio0 = button, gpio1 = led green, gpio2 = led red - * verify = n ... disable kernel checksum verification for faster booting - */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "tftpdir=calimero\0" \ - "flashkernel=tftpboot $loadaddr $tftpdir/uImage; " \ - "erase 0x60800000 +0x400000; " \ - "cp.b $loadaddr 0x60800000 $filesize\0" \ - "flashrootfs=" \ - "tftpboot $loadaddr $tftpdir/rootfs.jffs2; " \ - "erase 0x60c00000 +0x2e00000; " \ - "cp.b $loadaddr 0x60c00000 $filesize\0" \ - "flashuboot=tftpboot $loadaddr $tftpdir/u-boot.bin; " \ - "protect off all; " \ - "erase 0x60000000 +0x80000; " \ - "cp.b $loadaddr 0x60000000 $filesize\0" \ - "flashrlk=tftpboot $loadaddr $tftpdir/uImage-rlk; " \ - "erase 0x60080000 +0x780000; " \ - "cp.b $loadaddr 0x60080000 $filesize\0" \ - "erase_persistent=erase 0x63a00000 +0x600000;\0" \ - "bootnor=setenv bootargs console=ttyS2,115200n8 " \ - "root=/dev/mtdblock3 rw rootfstype=jffs2 " \ - "rootwait ethaddr=$ethaddr; " \ - "gpio c 1; gpio s 2; bootm 0x60800000\0" \ - "bootrlk=gpio s 1; gpio s 2;" \ - "setenv bootargs console=ttyS2,115200n8 " \ - "ethaddr=$ethaddr; bootm 0x60080000\0" \ - "boottftp=setenv bootargs console=ttyS2,115200n8 " \ - "root=/dev/mtdblock3 rw rootfstype=jffs2 " \ - "rootwait ethaddr=$ethaddr; " \ - "tftpboot $loadaddr $tftpdir/uImage;" \ - "gpio c 1; gpio s 2; bootm $loadaddr\0" \ - "checkupdate=if test -n $update_flag; then " \ - "echo Previous update failed - starting RLK; " \ - "run bootrlk; fi; " \ - "if test -n $initial_setup; then " \ - "echo Running initial setup procedure; " \ - "sleep 1; run flashall; fi\0" \ - "product=accessory\0" \ - "serial=XX12345\0" \ - "checknor=" \ - "if gpio i 0; then run bootnor; fi;\0" \ - "checkrlk=" \ - "if gpio i 0; then run bootrlk; fi;\0" \ - "checkbutton=" \ - "run checknor; sleep 1;" \ - "run checknor; sleep 1;" \ - "run checknor; sleep 1;" \ - "run checknor; sleep 1;" \ - "run checknor;" \ - "gpio s 1; gpio s 2;" \ - "echo ---- Release button to boot RLK ----;" \ - "run checkrlk; sleep 1;" \ - "run checkrlk; sleep 1;" \ - "run checkrlk; sleep 1;" \ - "run checkrlk; sleep 1;" \ - "run checkrlk; sleep 1;" \ - "run checkrlk;" \ - "echo ---- Factory reset requested ----;" \ - "gpio c 1;" \ - "setenv factory_reset true;" \ - "saveenv;" \ - "run bootnor;\0" \ - "flashall=run flashrlk;" \ - "run flashkernel;" \ - "run flashrootfs;" \ - "setenv erase_datafs true;" \ - "setenv initial_setup;" \ - "saveenv;" \ - "run bootnor;\0" \ - "verify=n\0" \ - "clearenv=protect off all;" \ - "erase 0x60040000 +0x40000;\0" \ - "altbootcmd=run bootrlk\0" - -#define CONFIG_PREBOOT \ - "echo Version: $ver; " \ - "echo Serial: $serial; " \ - "echo MAC: $ethaddr; " \ - "echo Product: $product; " \ - "gpio c 1; gpio c 2;" - -/* additions for new relocation code, must added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 -/* initial stack pointer in internal SRAM */ -#define CONFIG_SYS_INIT_SP_ADDR (0x8001ff00) - -#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ - -#ifndef __ASSEMBLY__ -int calimain_get_osc_freq(void); -#endif - -#include - -#endif /* __CONFIG_H */ -- 2.39.5