From 875bc40a00f92cd9b5882eaed57a5a3c361328d2 Mon Sep 17 00:00:00 2001 From: YouMin Chen Date: Tue, 12 Dec 2023 15:56:41 +0800 Subject: [PATCH] rockchip: sdram: fix LPDDR5 bank info for sys_reg version 3 This patch add support for additional bank info used by LPDDR5. Series-version: 2 Signed-off-by: YouMin Chen Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/sdram.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index 99ecbdc341..0d9a0aef6f 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -109,7 +109,14 @@ size_t rockchip_sdram_size(phys_addr_t reg) cs0_col = 9 + (sys_reg2 >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK); cs1_col = cs0_col; - bk = 3 - ((sys_reg2 >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK); + if (dram_type == LPDDR5) + /* LPDDR5: 0:8bank(bk=3), 1:16bank(bk=4) */ + bk = 3 + ((sys_reg2 >> SYS_REG_BK_SHIFT(ch)) & + SYS_REG_BK_MASK); + else + /* Other: 0:8bank(bk=3), 1:4bank(bk=2) */ + bk = 3 - ((sys_reg2 >> SYS_REG_BK_SHIFT(ch)) & + SYS_REG_BK_MASK); if (version >= 2) { cs1_col = 9 + (sys_reg3 >> SYS_REG_CS1_COL_SHIFT(ch) & SYS_REG_CS1_COL_MASK); -- 2.39.5