From 73420f0220e03caea1e11688a04636719760b534 Mon Sep 17 00:00:00 2001 From: Maciej Pijanowski Date: Fri, 31 May 2019 16:00:26 +0200 Subject: [PATCH] arm: fsl-layerscape: fix 0x3363 serdes1 settings for ls1046a As per LS1046A hardware manual, SGMII.9 and SGMII.10 present on lane D and lane C respectively for 0x3363 protocol. So fix serdes1 settings for ls1046a. Signed-off-by: Maciej Pijanowski Reviewed-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c index f8310f2105..91de5ff0d3 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c @@ -29,7 +29,7 @@ static struct serdes_config serdes1_cfg_tbl[] = { {0x1163, {XFI_FM1_MAC9, XFI_FM1_MAC10, PCIE1, SGMII_FM1_DTSEC6} }, {0x2263, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, PCIE1, SGMII_FM1_DTSEC6} }, - {0x3363, {SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6, PCIE1, + {0x3363, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, PCIE1, SGMII_FM1_DTSEC6} }, {0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, -- 2.39.5