From 6b699742d4795804d553deaf5163a0923bd27274 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 6 May 2016 20:10:37 +0200 Subject: [PATCH] mips: ath79: Add support for ungating USB on ar933x and ar934x Add code to ungate the USB controller on ar933x and ar934x . Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Wills Wang --- arch/mips/mach-ath79/include/mach/ath79.h | 2 + arch/mips/mach-ath79/reset.c | 59 +++++++++++++++++++++++ 2 files changed, 61 insertions(+) diff --git a/arch/mips/mach-ath79/include/mach/ath79.h b/arch/mips/mach-ath79/include/mach/ath79.h index 90d80b8bc8..682b6a2ee5 100644 --- a/arch/mips/mach-ath79/include/mach/ath79.h +++ b/arch/mips/mach-ath79/include/mach/ath79.h @@ -140,4 +140,6 @@ static inline int soc_is_qca956x(void) return soc_is_tp9343() || soc_is_qca9561(); } +int ath79_usb_reset(void); + #endif /* __ASM_MACH_ATH79_H */ diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c index ba38609a16..1538e321bc 100644 --- a/arch/mips/mach-ath79/reset.c +++ b/arch/mips/mach-ath79/reset.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -69,3 +70,61 @@ u32 get_bootstrap(void) return 0; } + +static int usb_reset_ar933x(void __iomem *reset_regs) +{ + /* Ungate the USB block */ + setbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE, + AR933X_RESET_USBSUS_OVERRIDE); + mdelay(1); + clrbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE, + AR933X_RESET_USB_HOST); + mdelay(1); + clrbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE, + AR933X_RESET_USB_PHY); + mdelay(1); + + return 0; +} + +static int usb_reset_ar934x(void __iomem *reset_regs) +{ + /* Ungate the USB block */ + setbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE, + AR934X_RESET_USBSUS_OVERRIDE); + mdelay(1); + clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE, + AR934X_RESET_USB_PHY); + mdelay(1); + clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE, + AR934X_RESET_USB_PHY_ANALOG); + mdelay(1); + clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE, + AR934X_RESET_USB_HOST); + mdelay(1); + + return 0; +} + +int ath79_usb_reset(void) +{ + void __iomem *usbc_regs = map_physmem(AR71XX_USB_CTRL_BASE, + AR71XX_USB_CTRL_SIZE, + MAP_NOCACHE); + void __iomem *reset_regs = map_physmem(AR71XX_RESET_BASE, + AR71XX_RESET_SIZE, + MAP_NOCACHE); + /* + * Turn on the Buff and Desc swap bits. + * NOTE: This write into an undocumented register in mandatory to + * get the USB controller operational in BigEndian mode. + */ + writel(0xf0000, usbc_regs + AR71XX_USB_CTRL_REG_CONFIG); + + if (soc_is_ar933x()) + return usb_reset_ar933x(reset_regs); + if (soc_is_ar934x()) + return usb_reset_ar934x(reset_regs); + + return -EINVAL; +} -- 2.39.5