From 5a4e0625ac77932079b375d9ff76b899849dc84c Mon Sep 17 00:00:00 2001 From: Kongyang Liu Date: Sat, 20 Apr 2024 15:00:28 +0800 Subject: [PATCH] riscv: dts: sophgo: Add ethernet node Add ethernet node for cv1800b SoC Signed-off-by: Kongyang Liu Reviewed-by: Leo Yu-Chi Liang --- arch/riscv/dts/cv1800b-milkv-duo.dts | 5 +++++ arch/riscv/dts/cv18xx.dtsi | 23 +++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/riscv/dts/cv1800b-milkv-duo.dts b/arch/riscv/dts/cv1800b-milkv-duo.dts index 94e64ddce8..f6ae8828f3 100644 --- a/arch/riscv/dts/cv1800b-milkv-duo.dts +++ b/arch/riscv/dts/cv1800b-milkv-duo.dts @@ -29,6 +29,11 @@ }; }; +ðernet0 { + status = "okay"; + phy-mode = "rmii"; +}; + &osc { clock-frequency = <25000000>; }; diff --git a/arch/riscv/dts/cv18xx.dtsi b/arch/riscv/dts/cv18xx.dtsi index ec99c4deeb..5e83ee1853 100644 --- a/arch/riscv/dts/cv18xx.dtsi +++ b/arch/riscv/dts/cv18xx.dtsi @@ -52,6 +52,20 @@ #clock-cells = <0>; }; + eth_csrclk: eth-csrclk { + compatible = "fixed-clock"; + clock-frequency = <250000000>; + clock-output-names = "eth_csrclk"; + #clock-cells = <0x0>; + }; + + eth_ptpclk: eth-ptpclk { + compatible = "fixed-clock"; + clock-frequency = <50000000>; + clock-output-names = "eth_ptpclk"; + #clock-cells = <0x0>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&plic>; @@ -138,6 +152,15 @@ }; }; + ethernet0: ethernet@4070000 { + compatible = "sophgo,cv1800b-dwmac"; + reg = <0x04070000 0x10000>; + interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <ð_csrclk>, <ð_ptpclk>; + clock-names = "stmmaceth", "ptp_ref"; + status = "disabled"; + }; + uart0: serial@4140000 { compatible = "snps,dw-apb-uart"; reg = <0x04140000 0x100>; -- 2.39.5