From 50cf68c7289ea5387852a3e18ffa2e9e3806f32c Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Sun, 27 Jun 2021 17:51:05 -0600
Subject: [PATCH] x86: coral: Allow booting from coreboot

Set up coral so that it can boot from coreboot, even though it is a
bare-metal build. This helps with testing since the same image can be used
in both cases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
 board/google/chromebook_coral/coral.c | 28 +++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c
index 3f9235c903..85cba50d4e 100644
--- a/board/google/chromebook_coral/coral.c
+++ b/board/google/chromebook_coral/coral.c
@@ -10,17 +10,21 @@
 #include <command.h>
 #include <cros_ec.h>
 #include <dm.h>
+#include <init.h>
 #include <log.h>
 #include <sysinfo.h>
 #include <acpi/acpigen.h>
 #include <asm-generic/gpio.h>
 #include <asm/acpi_nhlt.h>
+#include <asm/cb_sysinfo.h>
 #include <asm/intel_gnvs.h>
 #include <asm/intel_pinctrl.h>
 #include <dm/acpi.h>
 #include <linux/delay.h>
 #include "variant_gpio.h"
 
+DECLARE_GLOBAL_DATA_PTR;
+
 struct cros_gpio_info {
 	const char *linux_name;
 	enum cros_gpio_t type;
@@ -28,6 +32,30 @@ struct cros_gpio_info {
 	int flags;
 };
 
+int misc_init_f(void)
+{
+	if (!ll_boot_init()) {
+		printf("Running as secondary loader");
+		if (gd->arch.coreboot_table) {
+			int ret;
+
+			printf(" (found coreboot table at %lx)",
+			       gd->arch.coreboot_table);
+
+			ret = get_coreboot_info(&lib_sysinfo);
+			if (ret) {
+				printf("\nFailed to parse coreboot tables (err=%d)\n",
+				       ret);
+				return ret;
+			}
+		}
+
+		printf("\n");
+	}
+
+	return 0;
+}
+
 int arch_misc_init(void)
 {
 	return 0;
-- 
2.39.5