From 4dd80cb09ec333035a0cb812cae123dac568807c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 19 Jan 2024 17:07:54 +0100 Subject: [PATCH] ARM: imx: Enable SPL_BOARD_INIT on DH i.MX8M Plus DHCOM The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init() during the SPL start up. On this particular system, spl_board_init() is used to reconfigure GIC clock parent to PLL2 500M, which is the configuration expected by the Linux kernel. Enable SPL_BOARD_INIT . Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not allow to change it. Should set the clock after PMIC setting done. Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for ND VDD_SOC. Signed-off-by: Marek Vasut Reviewed-by: Fabio Estevam --- configs/imx8mp_dhcom_pdk2_defconfig | 1 + configs/imx8mp_dhcom_pdk3_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 73e8421e55..cae5375f5e 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -57,6 +57,7 @@ CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x96fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig index a3966fb701..78f7b96f3c 100644 --- a/configs/imx8mp_dhcom_pdk3_defconfig +++ b/configs/imx8mp_dhcom_pdk3_defconfig @@ -58,6 +58,7 @@ CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x96fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -- 2.39.5