From 49ad0c8eee151187235fc54f9c4ea1368bededf0 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Niklas=20S=C3=B6derlund?= Date: Fri, 9 Feb 2024 22:15:35 +0100 Subject: [PATCH] clk: renesas: Fix broken clocks on all Gen2 boards MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit To prepare support for multiple register layouts pointers to register tables where added to struct cpg_mssr_info. These pointers are suppose to be filled in at probe time and no intended change in behavior was intended. However the new pointers where only filled in by some paths of the driver implemented in clk-rcar-gen3.c. The path implemented in clk-rcar-gen2.c was not updated leaving the pointers uninitialized leading to a crash when trying to probe the clocks. Fix this by filling in the pointers in the Gen2 code path with the values used before they where moved to struct cpg_mssr_info. Fixes: d413214fb748 ("clk: renesas: Add register pointers into struct cpg_mssr_info") Signed-off-by: Niklas Söderlund Acked-by: Marek Vasut Tested-by: Marek Vasut # R8A7791 Porter Reviewed-by: Geert Uytterhoeven --- drivers/clk/renesas/clk-rcar-gen2.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c index 66ffef96b6..89f2d96674 100644 --- a/drivers/clk/renesas/clk-rcar-gen2.c +++ b/drivers/clk/renesas/clk-rcar-gen2.c @@ -298,6 +298,15 @@ int gen2_clk_probe(struct udevice *dev) if (!priv->cpg_pll_config->extal_div) return -EINVAL; + if (info->reg_layout == CLK_REG_LAYOUT_RCAR_GEN2_AND_GEN3) { + priv->info->status_regs = mstpsr; + priv->info->control_regs = smstpcr; + priv->info->reset_regs = srcr; + priv->info->reset_clear_regs = srstclr; + } else { + return -EINVAL; + } + ret = clk_get_by_name(dev, "extal", &priv->clk_extal); if (ret < 0) return ret; -- 2.39.5