From 47ed15125cccd98e041cdff3b6bbe675a2418ec2 Mon Sep 17 00:00:00 2001
From: Shengyu Qu <wiagn233@outlook.com>
Date: Wed, 9 Aug 2023 21:11:33 +0800
Subject: [PATCH] riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE

Add Kconfig item for Starfive JH7110 to select SPL_ZERO_MEM_BEFORE_USE.

Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
---
 arch/riscv/cpu/jh7110/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/cpu/jh7110/Kconfig b/arch/riscv/cpu/jh7110/Kconfig
index c1d3e6ada2..8469ee7de5 100644
--- a/arch/riscv/cpu/jh7110/Kconfig
+++ b/arch/riscv/cpu/jh7110/Kconfig
@@ -14,6 +14,7 @@ config STARFIVE_JH7110
 	select SPL_RAM if SPL
 	select SPL_STARFIVE_DDR
 	select SYS_CACHE_SHIFT_6
+	select SPL_ZERO_MEM_BEFORE_USE
 	select PINCTRL_STARFIVE_JH7110
 	imply MMC
 	imply MMC_BROKEN_CD
-- 
2.39.5