From 4648108c63d9d06cf882f8d216d5e3e13e272aea Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Sun, 24 May 2020 22:13:15 +0530 Subject: [PATCH] clk: rk3399: Fix eMMC get_clk reg offset Actual eMMC get_clk register is clksel_con22 instead of clksel_con21. Fix it. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- drivers/clk/rockchip/clk_rk3399.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 6a78837619..4caf3b5617 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -728,7 +728,7 @@ static ulong rk3399_mmc_get_clk(struct rockchip_cru *cru, uint clk_id) div = 2; break; case SCLK_EMMC: - con = readl(&cru->clksel_con[21]); + con = readl(&cru->clksel_con[22]); div = 1; break; default: -- 2.39.5