From 403fc5c9cf2c40c85e0c3d0c8bc36244a665cb74 Mon Sep 17 00:00:00 2001 From: Faiz Abbas Date: Mon, 3 Aug 2020 11:35:09 +0530 Subject: [PATCH] arm: mach-k3: am6_init: Do USB fixups to facilitate host and device boot modes U-boot only supports either USB host or device mode for a node at a time in dts. To support both host and dfu bootmodes, set "peripheral" as the default dr_mode but fixup property to "host" if host bootmode is detected. This needs to happen before the dwc3 generic layer binds the usb device to a host or device driver. Therefore, add an fdtdec_setup_board() implementation to fixup the dt based on the boot mode. Also use the same fixup function to set the USB-PCIe Serdes mux to PCIe in both the host and device cases. This is required for accessing the interface at USB 2.0 speeds. Signed-off-by: Faiz Abbas --- arch/arm/mach-k3/am6_init.c | 40 +++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 42d13a39f8..c6d4f05a01 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include @@ -22,6 +23,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_SPL_BUILD #ifdef CONFIG_K3_LOAD_SYSFW #ifdef CONFIG_TI_SECURE_DEVICE @@ -119,7 +122,44 @@ void k3_mmc_restart_clock(void) void k3_mmc_stop_clock(void) {} void k3_mmc_restart_clock(void) {} #endif +#if CONFIG_IS_ENABLED(DFU) || CONFIG_IS_ENABLED(USB_STORAGE) +#define CTRLMMR_SERDES0_CTRL 0x00104080 +#define PCIE_LANE0 0x1 +static int fixup_usb_boot(void) +{ + int ret; + switch (spl_boot_device()) { + case BOOT_DEVICE_USB: + /* + * If bootmode is Host bootmode, fixup the dr_mode to host + * before the dwc3 bind takes place + */ + ret = fdt_find_and_setprop((void *)gd->fdt_blob, + "/interconnect@100000/dwc3@4000000/usb@10000", + "dr_mode", "host", 11, 0); + if (ret) + printf("%s: fdt_find_and_setprop() failed:%d\n", __func__, + ret); + fallthrough; + case BOOT_DEVICE_DFU: + /* + * The serdes mux between PCIe and USB3 needs to be set to PCIe for + * accessing the interface at USB 2.0 + */ + writel(PCIE_LANE0, CTRLMMR_SERDES0_CTRL); + default: + break; + } + + return 0; +} + +int fdtdec_board_setup(const void *fdt_blob) +{ + return fixup_usb_boot(); +} +#endif void board_init_f(ulong dummy) { #if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM654_DDRSS) -- 2.39.5