From 3e79a4ab2624371759c8e3e88d24116418389a10 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Thu, 30 Jul 2015 03:49:15 -0700 Subject: [PATCH] x86: baytrail: Update UPD setting for FSP Gold4 release BayTrail FSP Gold4 release adds one UPD parameter to control IGD enable/disable. Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h index 82862f626d..eb0d506216 100644 --- a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h +++ b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h @@ -75,7 +75,8 @@ struct __packed upd_region { uint8_t emmc45_ddr50_enabled; /* Offset 0x0051 */ uint8_t emmc45_hs200_enabled; /* Offset 0x0052 */ uint8_t emmc45_retune_timer_value; /* Offset 0x0053 */ - uint8_t unused_upd_space1[156]; /* Offset 0x0054 */ + uint8_t enable_igd; /* Offset 0x0054 */ + uint8_t unused_upd_space1[155]; /* Offset 0x0055 */ struct memory_down_data memory_params; /* Offset 0x00f0 */ uint16_t terminator; /* Offset 0x0100 */ }; -- 2.39.5