From 2f96064d0cf78e21a668ad907d41d63e56f9f7bb Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 16 Oct 2023 02:05:25 +0200 Subject: [PATCH] arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D EEPROMs which have Additional Write lockable page at separate I2C address. Describe the page in DT to make it available. Disable the additional page in rev.100 SoM DTO as those devices contain EEPROM without an Additional Write lockable page. Signed-off-by: Marek Vasut --- arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts | 8 ++++++++ arch/arm/dts/imx8mp-dhcom-som.dtsi | 12 ++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts index 5d9a00c942..0e5d329b14 100644 --- a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts +++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts @@ -24,6 +24,14 @@ pagesize = <16>; }; +&eeprom0wl { + status = "disabled"; +}; + +&eeprom1wl { + status = "disabled"; +}; + ðphy0f { /* SMSC LAN8740Ai */ pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>; reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/dts/imx8mp-dhcom-som.dtsi b/arch/arm/dts/imx8mp-dhcom-som.dtsi index ea2a567447..b504d36818 100644 --- a/arch/arm/dts/imx8mp-dhcom-som.dtsi +++ b/arch/arm/dts/imx8mp-dhcom-som.dtsi @@ -392,6 +392,18 @@ reg = <0x53>; }; + eeprom0wl: eeprom@58 { + compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x50 */ + pagesize = <32>; + reg = <0x58>; + }; + + eeprom1wl: eeprom@5b { + compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x53 */ + pagesize = <32>; + reg = <0x5b>; + }; + ioexp: gpio@74 { compatible = "nxp,pca9539"; reg = <0x74>; -- 2.39.5