From 106c1300a5a54c61d9368e5afdb5282e7e4ef3d8 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Sun, 23 Jun 2019 15:09:48 +0100 Subject: [PATCH] sunxi: clocks: Add H6 USB clock gates and resets To enable USB support in U-Boot, add the required clock and reset gates to the H6 clock driver. Once enabled, the generic EHCI/OCHI drivers will pick them up from there automatically. Signed-off-by: Andre Przywara Tested-by: Corentin Labbe # Pine-H64 Reviewed-by: Jagan Teki --- drivers/clk/sunxi/clk_h6.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c index 0bb00f449a..105c15d869 100644 --- a/drivers/clk/sunxi/clk_h6.c +++ b/drivers/clk/sunxi/clk_h6.c @@ -28,6 +28,22 @@ static struct ccu_clk_gate h6_gates[] = { [CLK_BUS_SPI1] = GATE(0x96c, BIT(1)), [CLK_BUS_EMAC] = GATE(0x97c, BIT(0)), + + [CLK_USB_PHY0] = GATE(0xa70, BIT(29)), + [CLK_USB_OHCI0] = GATE(0xa70, BIT(31)), + + [CLK_USB_PHY1] = GATE(0xa74, BIT(29)), + + [CLK_USB_HSIC] = GATE(0xa7c, BIT(26)), + [CLK_USB_HSIC_12M] = GATE(0xa7c, BIT(27)), + [CLK_USB_PHY3] = GATE(0xa7c, BIT(29)), + [CLK_USB_OHCI3] = GATE(0xa7c, BIT(31)), + + [CLK_BUS_OHCI0] = GATE(0xa8c, BIT(0)), + [CLK_BUS_OHCI3] = GATE(0xa8c, BIT(3)), + [CLK_BUS_EHCI0] = GATE(0xa8c, BIT(4)), + [CLK_BUS_EHCI3] = GATE(0xa8c, BIT(7)), + [CLK_BUS_OTG] = GATE(0xa8c, BIT(8)), }; static struct ccu_reset h6_resets[] = { @@ -43,6 +59,19 @@ static struct ccu_reset h6_resets[] = { [RST_BUS_SPI1] = RESET(0x96c, BIT(17)), [RST_BUS_EMAC] = RESET(0x97c, BIT(16)), + + [RST_USB_PHY0] = RESET(0xa70, BIT(30)), + + [RST_USB_PHY1] = RESET(0xa74, BIT(30)), + + [RST_USB_HSIC] = RESET(0xa7c, BIT(28)), + [RST_USB_PHY3] = RESET(0xa7c, BIT(30)), + + [RST_BUS_OHCI0] = RESET(0xa8c, BIT(16)), + [RST_BUS_OHCI3] = RESET(0xa8c, BIT(19)), + [RST_BUS_EHCI0] = RESET(0xa8c, BIT(20)), + [RST_BUS_EHCI3] = RESET(0xa8c, BIT(23)), + [RST_BUS_OTG] = RESET(0xa8c, BIT(24)), }; static const struct ccu_desc h6_ccu_desc = { -- 2.39.5