From 0ff65eb99c3ed4d452b9c74dae8c4f736d92303f Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Wed, 17 Dec 2014 15:50:45 +0800
Subject: [PATCH] x86: crownbay: Enable Intel E1000 NIC support

We don't have driver for the Intel Topcliff PCH Gigabit Ethernet
controller for now, so enable the Intle E1000 NIC support, which
can be plugged into any PCIe slot on the Crown Bay board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
---
 board/intel/crownbay/crownbay.c | 6 ++++++
 include/configs/crownbay.h      | 1 +
 2 files changed, 7 insertions(+)

diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c
index 54670d3ac7..2a254efe3d 100644
--- a/board/intel/crownbay/crownbay.c
+++ b/board/intel/crownbay/crownbay.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <asm/ibmpc.h>
 #include <asm/pnp_def.h>
+#include <netdev.h>
 #include <smsc_lpc47m.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, 4)
@@ -24,3 +25,8 @@ void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio)
 {
 	return;
 }
+
+int board_eth_init(bd_t *bis)
+{
+	return pci_eth_init(bis);
+}
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
index a051b1149b..09a52ab0df 100644
--- a/include/configs/crownbay.h
+++ b/include/configs/crownbay.h
@@ -37,6 +37,7 @@
 
 #define CONFIG_SYS_EARLY_PCI_INIT
 #define CONFIG_PCI_PNP
+#define CONFIG_E1000
 
 #define CONFIG_STD_DEVICES_SETTINGS     "stdin=serial\0" \
 					"stdout=serial\0" \
-- 
2.39.5