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board: sifive: support spl multi-dtb on unmatched board
authorZong Li <zong.li@sifive.com>
Wed, 30 Jun 2021 15:23:50 +0000 (23:23 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Tue, 6 Jul 2021 12:24:26 +0000 (20:24 +0800)
commit4b4159d0f31ca3e0174ccfdce9a24a1fe3671829
tree62d2ac2c805629f26ab5f0709d7d4775020587eatree | snapshot
parentffe9a394df0cf4ec14331ce425938409289e5780commit | diff
board: sifive: support spl multi-dtb on unmatched board

There are two revisions of unmatched board with different DDR timing,
we'd like to support multi-dtb mechanism in SPL, then it selects the
right DTB at runtime according to PCB revision in I2C EEPROM.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
board/sifive/unmatched/spl.c diff | blob | history
configs/sifive_unmatched_defconfig diff | blob | history
My U-Boot fork