]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
14 months agomailbox: k3-sec-proxy: fix error handling for missing scfg in FDT
Matthias Schiffer [Tue, 26 Sep 2023 12:42:54 +0000 (14:42 +0200)]
mailbox: k3-sec-proxy: fix error handling for missing scfg in FDT

The wrong field was checked.

Fixes: f9aa41023bd9 ("mailbox: Introduce K3 Secure Proxy Driver")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
14 months agotest: lmb: Add test for coalescing and overlap range
Udit Kumar [Tue, 26 Sep 2023 11:24:43 +0000 (16:54 +0530)]
test: lmb: Add test for coalescing and overlap range

Add test case for an address range which is coalescing with one of
range and overlapping with next range

Cc: Simon Glass <sjg@google.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
14 months agolmb: remove overlapping region with next range
Udit Kumar [Tue, 26 Sep 2023 11:24:42 +0000 (16:54 +0530)]
lmb: remove overlapping region with next range

In case of new memory range to be added is coalesced
with any already added non last lmb region.

And there is possibility that, then region in which new memory
range added is not adjacent to next region. But have some
sections are overlapping.

So along with adjacency check with next lmb region,
check for overlap should be done.

In case overlap  is found, adjust and merge these two lmb
region into one.

Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
14 months agoexynos: Cleanup exynos_init
Tom Rini [Thu, 21 Sep 2023 23:32:48 +0000 (19:32 -0400)]
exynos: Cleanup exynos_init

- None of the callers perform error checking and based on the non-empty
  versions of this function, there's no checking to be done, so make
  this a void.
- Add a default weak version of the function.
- Remove the empty versions of exynos_init now that we have a weak
  version.

Signed-off-by: Tom Rini <trini@konsulko.com>
14 months agoboard: Remove essentially empty board files and Makefiles
Tom Rini [Thu, 21 Sep 2023 23:32:47 +0000 (19:32 -0400)]
board: Remove essentially empty board files and Makefiles

As part of reviewing a new platform, Daniel Schwierzeck noted that we
can have an empty Makefile in the board directory and don't need an
empty board.c file as well.  Further with further cleanup in the
Makefile we can now omit the Makefile entirely. Remove a number of now
unnecessary board.c and Makefiles.

Signed-off-by: Tom Rini <trini@konsulko.com>
14 months agoMakefile: Allow for board directories to not have a Makefile
Tom Rini [Thu, 21 Sep 2023 23:32:46 +0000 (19:32 -0400)]
Makefile: Allow for board directories to not have a Makefile

It is entirely possible at this point to have platforms in U-Boot that
do not have board-specific C code (just Kconfig or environment) and so
make it optional to have to descend in to and then build in the board
directory.

Signed-off-by: Tom Rini <trini@konsulko.com>
14 months agoARM: vexpress_ca9x4: Add missing flash width config option
Patryk Biel [Wed, 20 Sep 2023 07:41:20 +0000 (09:41 +0200)]
ARM: vexpress_ca9x4: Add missing flash width config option

Allow for a proper configuration of CFI flash banks avaialble on the vexpress_ca9x4
board. Without this option, the CFI flash incorrectly detects that the board has two
banks of 32MB flash devices, while in reality, the board provides
two flash banks, each with 64MB size. As a result, it becomes impossible to e.g. to
save u-boot env in flash. According to device tree for this board and
its implementation in QEMU, the CFI width should be set to 32 bits.

After applying this fix, CFI flash will correctly detect both flash
banks each with a size of 64MB. As as result the functionality of e.g. saving u-boot
env will work correctly.

Tested on QEMU 6.2.0.

Cc: Kristian Amlie <kristian.amlie@northern.tech>
Signed-off-by: Patryk Biel <pbiel7@gmail.com>
Reviewed-by: Kristian Amlie <kristian.amlie@northern.tech>
14 months agobootstd: use ARCH_DMA_MINALIGN in memalign() when allocating memory
Tony Dinh [Tue, 19 Sep 2023 21:27:21 +0000 (14:27 -0700)]
bootstd: use ARCH_DMA_MINALIGN in memalign() when allocating memory

Use ARCH_DMA_MINALIGN in memalign() when allocating memory to read the script from the media.

Ref: https://lore.kernel.org/u-boot/CAJaLiFy05F3Cr4X4G2mVkppXnBEFZrHQ+5CngYN8eJPg8ENWkg@mail.gmail.com/T/#m26daadc2463fe653b814a94e6309e5e6bb6be1d1

Note: this patch depends on the previous patch
https://patchwork.ozlabs.org/project/uboot/patch/20230917230649.30357-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
14 months agoMakefile: Force regeneration of env.txt
Andrew Davis [Fri, 15 Sep 2023 14:43:23 +0000 (09:43 -0500)]
Makefile: Force regeneration of env.txt

If the source .env file changes to one that is also older than the
generated env.txt file then the .env file is not regenerated. This
means when switching board configs we do not regenerate the env.

This can be tested with:

$ make j721e_evm_a72_defconfig
$ make # this may fail to complete but that is okay for this test
$ make am64x_evm_a53_defconfig
$ make
$ vim include/generated/env.txt

Note this is still the J721e env not the AM64 config as expected.

As ENV_FILE is set based on configuration, regenerate anytime
autoconf.h changes.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
14 months agoMerge tag 'u-boot-rockchip-20231007' of https://source.denx.de/u-boot/custodians...
Tom Rini [Sun, 8 Oct 2023 13:58:55 +0000 (09:58 -0400)]
Merge tag 'u-boot-rockchip-20231007' of https://source.denx.de/u-boot/custodians/u-boot-rockchip

- Add Board: rk3568 Bananapi R2Pro;
- Update pcie bifurcation support;
- dwc_eth_qos controller support for rk3568 and rk3588;
- Compressed binary support for U-Boot on rockchip platform;
- dts and config updates for different board and soc;

[ trini: Fix conflict on include/spl.h ]
Signed-off-by: Tom Rini <trini@konsulko.com>
14 months agorockchip: rk356x-u-boot: Add bootph-all to i2c0_xfer pinctrl node
Jonas Karlman [Thu, 3 Aug 2023 21:11:54 +0000 (21:11 +0000)]
rockchip: rk356x-u-boot: Add bootph-all to i2c0_xfer pinctrl node

A RK8XX PMIC is typically using i2c0 on RK356x devices. Add bootph-all
to required pinctrl nodes to simplify use of the prevent booting on
power plug-in option in SPL.

With the following Kconfig options and nodes in u-boot.dtsi the prevent
booting on power plug-in option can work in SPL.

  CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y
  CONFIG_SPL_I2C=y
  CONFIG_SPL_POWER=y
  CONFIG_SPL_PINCTRL=y
  CONFIG_SPL_PMIC_RK8XX=y

  &i2c0 {
   bootph-pre-ram;
  };

  &rk817 {
   bootph-pre-ram;

   regulators {
   bootph-pre-ram;
   };
  };

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agopower: pmic: rk8xx: Fix power-on source check in SPL
Jonas Karlman [Thu, 3 Aug 2023 21:02:42 +0000 (21:02 +0000)]
power: pmic: rk8xx: Fix power-on source check in SPL

The commit 30975fb73d51 ("rockchip: Add option to prevent booting on
power plug-in") introduce an option to prevent booting a device when the
device was powered on due to power plug-in instead of pressing a power
button.

This feature works by checking the power-on source during PMIC probe
and powers off the device if power-on source was power plug-in.
This check currently runs very late at PMIC probe in U-Boot proper.

Fix so that the power-on source check can work at probe time in SPL.
Also enable probe after bind and remove the PMIC banner in SPL.

With this we can use ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON and
SPL_PMIC_RK8XX to power off the device very quickly after TPL instead
of after TF-A and U-Boot proper has been loaded and run.

  DDR V1.18 f366f69a7d typ 23/07/17-15:48:58
  ln
  LP4/4x derate en, other dram:1x trefi
  ddrconfig:7
  LPDDR4X, 324MHz
  BW=32 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=16 Size=8192MB

  change to: 324MHz
  clk skew:0x64

  change to: 528MHz
  clk skew:0x58

  change to: 780MHz
  clk skew:0x58

  change to: 1056MHz(final freq)
  clk skew:0x40
  out
  Power Off due to plug-in event

Fixes: 30975fb73d51 ("rockchip: Add option to prevent booting on power plug-in")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
14 months agorockchip: rk356x: Enable poweroff command
Jonas Karlman [Thu, 17 Aug 2023 05:45:04 +0000 (05:45 +0000)]
rockchip: rk356x: Enable poweroff command

With PMIC_RK8XX, SYSRESET and CMD_POWEROFF options enabled it is
possible to power down a board using the poweroff command and turn the
board back on using a power button.

Enable the poweroff command on RK356x boards that have a button wired
to PMIC pwron.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agopower: pmic: rk8xx: Use sysreset implementation of the poweroff command
Jonas Karlman [Thu, 17 Aug 2023 05:45:02 +0000 (05:45 +0000)]
power: pmic: rk8xx: Use sysreset implementation of the poweroff command

Select SYSRESET_CMD_POWEROFF to use the sysreset implementation of the
poweroff command when PMIC_RK8XX is enabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agoconfigs: rockchip: rk3308: enable CONFIG_OF_LIBFDT_OVERLAY
FUKAUMI Naoki [Mon, 11 Sep 2023 10:01:21 +0000 (19:01 +0900)]
configs: rockchip: rk3308: enable CONFIG_OF_LIBFDT_OVERLAY

enable CONFIG_OF_LIBFDT_OVERLAY and use it on Radxa ROCK Pi S.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
14 months agoconfigs: rockchip: rk3308: use CONFIG_DEFAULT_FDT_FILE
FUKAUMI Naoki [Mon, 11 Sep 2023 10:01:20 +0000 (19:01 +0900)]
configs: rockchip: rk3308: use CONFIG_DEFAULT_FDT_FILE

all rk3308 boards should use their own dtb file.

also, change fdt_addr_r to avoid following error:
 "ERROR: Did not find a cmdline Flattened Device Tree"
it happens on Radxa ROCK Pi S (256MB/512MB) with kernel built from
Radxa BSP.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
14 months agoarm: dts: rockchip: rock-5b: add support for PCIe3 and NVMe
FUKAUMI Naoki [Tue, 5 Sep 2023 11:47:36 +0000 (20:47 +0900)]
arm: dts: rockchip: rock-5b: add support for PCIe3 and NVMe

this patch adds support for PCIe3 (M.2 M key) and enables NVMe.

 => pci
 BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
 _____________________________________________________________
 00.00.00   0x1d87     0x3588     Bridge device           0x04
 01.00.00   0x10ec     0x8125     Network controller      0x00
 02.00.00   0x1d87     0x3588     Bridge device           0x04
 03.00.00   0x1179     0x011a     Mass storage controller 0x08
 => nvme scan
 => nvme info
 Device 0: Vendor: 0x1179 Rev: AGHA4101 Prod: 79CA20WPKRYN
             Type: Hard Disk
             Capacity: 488386.3 MB = 476.9 GB (1000215216 x 512)

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agoarm: dts: rockchip: sync DT for RK3588 series with Linux
FUKAUMI Naoki [Tue, 5 Sep 2023 11:47:35 +0000 (20:47 +0900)]
arm: dts: rockchip: sync DT for RK3588 series with Linux

Sync the device tree for RK3588 series with Linux 6.6-rc1.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agoconfigs: rockchip: rock-pi-s: use default bootdelay (2s)
FUKAUMI Naoki [Mon, 11 Sep 2023 10:05:08 +0000 (19:05 +0900)]
configs: rockchip: rock-pi-s: use default bootdelay (2s)

align with other boards.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agoconfigs: rockchip: add DOS_PARTITION to RK3308 boards defconfig
Massimo Pegorer [Sun, 1 Oct 2023 14:15:29 +0000 (16:15 +0200)]
configs: rockchip: add DOS_PARTITION to RK3308 boards defconfig

Without DOS_PARTITION support U-Boot is not able to boot an OS stored
into an SD card with MBR partitions table. This is still a quite common
case so add DOS_PARTITION (only for U-Boot proper build) to Rockchip
RK3308 EVB, Radxa ROCK Pi S and Firefly roc-rk3308-cc boards: they are
the only RK boards missing of DOS_PARTITION.

Reported-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agoboard: rockchip: Add Bananapi R2Pro Board
Frank Wunderlich [Wed, 4 Oct 2023 19:04:34 +0000 (21:04 +0200)]
board: rockchip: Add Bananapi R2Pro Board

Add Bananapi R2 Pro board.

tested:
- sdcard
- both front usb-ports
- sata
- wan-port

lan-ports are connected to mt7531 switch where driver needs to be
separated from mtk ethernet-driver.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
14 months agoconfigs: rockchip: Enable ethernet driver on RK3588 boards
Jonas Karlman [Sun, 1 Oct 2023 19:17:22 +0000 (19:17 +0000)]
configs: rockchip: Enable ethernet driver on RK3588 boards

Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK3588 boards that
have an enabled gmac node and drop ETH_DESIGNWARE and GMAC_ROCKCHIP for
remaining RK3588 boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agoconfigs: rockchip: Enable ethernet driver on RK356x boards
Jonas Karlman [Sun, 1 Oct 2023 19:17:21 +0000 (19:17 +0000)]
configs: rockchip: Enable ethernet driver on RK356x boards

Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK356x boards that
have an enabled gmac node.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agonet: dwc_eth_qos_rockchip: Add support for RK3588
Jonas Karlman [Sun, 1 Oct 2023 19:17:20 +0000 (19:17 +0000)]
net: dwc_eth_qos_rockchip: Add support for RK3588

Add rk_gmac_ops and other special handling that is needed for GMAC to
work on RK3588.

rk_gmac_ops was ported from linux commits:
2f2b60a0ec28 ("net: ethernet: stmmac: dwmac-rk: Add gmac support for rk3588")
88619e77b33d ("net: stmmac: rk3588: Allow multiple gmac controller")

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
14 months agonet: dwc_eth_qos: Add glue driver for GMAC on Rockchip RK3568
Jonas Karlman [Sun, 1 Oct 2023 19:17:19 +0000 (19:17 +0000)]
net: dwc_eth_qos: Add glue driver for GMAC on Rockchip RK3568

Add a new glue driver for Rockchip SoCs, i.e RK3568, with a GMAC based
on Synopsys DWC Ethernet QoS IP.

rk_gmac_ops was ported from linux commit:
3bb3d6b1c195 ("net: stmmac: Add RK3566/RK3568 SoC support")

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
14 months agonet: dwc_eth_qos: Stop spam of RX packet not available message
Jonas Karlman [Sun, 1 Oct 2023 19:17:18 +0000 (19:17 +0000)]
net: dwc_eth_qos: Stop spam of RX packet not available message

Remove spam of RX packet not available debug messages when waiting to
receive a packet.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
14 months agonet: dwc_eth_qos: Return error code when start fails
Jonas Karlman [Sun, 1 Oct 2023 19:17:17 +0000 (19:17 +0000)]
net: dwc_eth_qos: Return error code when start fails

Return error code when phy_connect fails or no link can be established.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
14 months agonet: dwc_eth_qos: Drop unused rx_pkt from eqos_priv
Jonas Karlman [Sun, 1 Oct 2023 19:17:16 +0000 (19:17 +0000)]
net: dwc_eth_qos: Drop unused rx_pkt from eqos_priv

rx_pkt is allocated and not used for anything, remove it.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
14 months agorockchip: Add support to generate LZMA compressed U-boot binary
Manoj Sai [Sun, 17 Sep 2023 19:26:28 +0000 (00:56 +0530)]
rockchip: Add support to generate LZMA compressed U-boot binary

Add support for generating a LZMA-compressed U-boot binary with the
help of binman, if CONFIG_SPL_LZMA is selected.

Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agorockchip: Add support to generate GZIP compressed U-boot binary
Manoj Sai [Sun, 17 Sep 2023 19:26:27 +0000 (00:56 +0530)]
rockchip: Add support to generate GZIP compressed U-boot binary

Add support for generating a GZIP-compressed U-boot binary with the
help of binman, if CONFIG_SPL_GZIP is selected.

Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agospl: fit: support for booting a LZMA-compressed U-boot binary
Manoj Sai [Sun, 17 Sep 2023 19:26:26 +0000 (00:56 +0530)]
spl: fit: support for booting a LZMA-compressed U-boot binary

If LZMA Compression support is enabled, LZMA compressed U-Boot
binary will be placed at a specified RAM location which is
defined at CONFIG_SYS_LOAD_ADDR and will be assigned  as the
source address.

image_decomp() function, will decompress the LZMA compressed
U-Boot binary which is placed at source address(CONFIG_SYS_LOAD_ADDR)
to the default CONFIG_SYS_TEXT_BASE location.

spl_load_fit_image function will load the decompressed U-Boot
binary, which is placed at the CONFIG_SYS_TEXT_BASE location.

Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
14 months agospl: fit: support for booting a GZIP-compressed U-boot binary
Manoj Sai [Sun, 17 Sep 2023 19:26:25 +0000 (00:56 +0530)]
spl: fit: support for booting a GZIP-compressed U-boot binary

If GZIP Compression support is enabled, GZIP compressed U-Boot binary
will be at a specified RAM location which is defined at
CONFIG_SYS_LOAD_ADDR and will be assign it as the source address.

gunzip function in spl_load_fit_image ,will decompress the GZIP
compressed U-Boot binary which is placed at
source address(CONFIG_SYS_LOAD_ADDR)  to the default
CONFIG_SYS_TEXT_BASE location.

spl_load_fit_image function will load the decompressed U-Boot
binary, which is placed at the CONFIG_SYS_TEXT_BASE location.

Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
14 months agodoc: rockchip: Update and improve info on rk3308, TPL and TF-A
Massimo Pegorer [Sat, 9 Sep 2023 09:33:33 +0000 (11:33 +0200)]
doc: rockchip: Update and improve info on rk3308, TPL and TF-A

Update and improve documentation about build steps for SoCs that
require using TF-A and TPL binaries provided by Rockchip, such as
rk3308. Add rk3308 boards case to rST document. Add ROCK Pi S in
the list of supported boards. Minor page format improvements.

Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agorockchip: Kconfig: Enable external TPL binary for rk3308
Massimo Pegorer [Sat, 9 Sep 2023 09:33:24 +0000 (11:33 +0200)]
rockchip: Kconfig: Enable external TPL binary for rk3308

There is no support to initialize DRAM on rk3308 SoC using U-Boot
TPL or SPL, and therefore an external TPL binary must be used to
package a bootable u-boot-rockchip.bin image.

Default ROCKCHIP_EXTERNAL_TPL to yes if ROCKCHIP_RK3308.
Remove useless TPL_SERIAL.

Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agorockchip: board: Add minimal generic RK3566/RK3568 board
Jonas Karlman [Mon, 21 Aug 2023 22:30:29 +0000 (22:30 +0000)]
rockchip: board: Add minimal generic RK3566/RK3568 board

Add a minimal generic RK3566/RK3568 board that only have eMMC and SDMMC
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3566/RK3568 boards that follow reference board design.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agorockchip: Port IO-domain driver for RK3568 from linux
Jonas Karlman [Mon, 21 Aug 2023 22:30:28 +0000 (22:30 +0000)]
rockchip: Port IO-domain driver for RK3568 from linux

Port the Rockchip IO-domain driver for RK3568 from linux.

The driver auto probe after bind to configure IO-domain based on the
regulator voltage. Compared to the linux driver this driver is not
notified about regulator voltage changes and only configure IO-domain
based on the initial voltage autoset by the regulator.

It is not recommended to enable MMC_IO_VOLTAGE or the mmc signal voltage
and IO-domain may end up out of sync.

Based on the linux commit 28b05a64e47c ("soc: rockchip: io-domain: add
rk3568 support").

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agoregulator: rk8xx: Return correct voltage for switchout converters
shengfei Xu [Mon, 21 Aug 2023 22:30:26 +0000 (22:30 +0000)]
regulator: rk8xx: Return correct voltage for switchout converters

The voltage value for switchout converters is always reported as 0 uV.
When the switch is enabled, it's voltage is same as input supply.

Fix this by implementing get_value for switchout converters.

Fixes: ee30068fa574 ("power: pmic: rk809: support rk809 pmic")
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
[jonas@kwiboo.se: fix checkpatch error, update commit message]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agoregulator: rk8xx: Return correct voltage for buck converters
Joseph Chen [Mon, 21 Aug 2023 22:30:25 +0000 (22:30 +0000)]
regulator: rk8xx: Return correct voltage for buck converters

Information from the first range group is always used to calculate the
voltage returned for buck converters. This may result in wrong voltage
reported back to the regulator_get_value caller.

Traverse all the possible BUCK ranges to fix this issue.

Fixes: addd062beacc ("power: pmic: rk816: support rk816 pmic")
Fixes: b62280745e55 ("power: pmic: rk805: support rk805 pmic")
Fixes: b4a35574b38d ("power: pmic: rk817: support rk817 pmic")
Fixes: ee30068fa574 ("power: pmic: rk809: support rk809 pmic")
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
[jonas@kwiboo.se: fix checkpatch error, simplify buck get_value, update commit message]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agopower: regulator: Only run autoset once for each regulator
Jonas Karlman [Mon, 21 Aug 2023 22:30:24 +0000 (22:30 +0000)]
power: regulator: Only run autoset once for each regulator

With the commit 4fcba5d556b4 ("regulator: implement basic reference
counter"), keeping regulator enablement in balance become more important.
Calling regulator_autoset multiple times on a fixed regulator increase
the enable count for each call, resulting in an unbalanced enable count.

Introduce a AUTOSET_DONE flag and use it to mark that autoset has run
for the regulator. Return -EALREADY on any subsequent call to autoset.

This fixes so that the enable count is only ever increased by one per
regulator for autoset.

Fixes: 4fcba5d556b4 ("regulator: implement basic reference counter")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agorockchip: rk3568-nanopi-r5: Enable PCIe on NanoPi R5C and R5S
Jonas Karlman [Wed, 2 Aug 2023 19:59:33 +0000 (19:59 +0000)]
rockchip: rk3568-nanopi-r5: Enable PCIe on NanoPi R5C and R5S

Enable missing PCIe Kconfig options now that PCIe bifurcation is fixed
to make use of the two on-board RTL8125B and the M.2 slot on NanoPi R5C
and NanoPi R5S.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agorockchip: rk3568-nanopi-r5: Update defconfig for NanoPi R5C and R5S
Jonas Karlman [Wed, 2 Aug 2023 19:49:46 +0000 (19:49 +0000)]
rockchip: rk3568-nanopi-r5: Update defconfig for NanoPi R5C and R5S

Update and sync Kconfig options for NanoPi R5C and NanoPi R5S with other
RK3568 boards.

SPL_FIT_SIGNATURE is enabled to add a checksum validation of the FIT
payload, also add LEGACY_IMAGE_FORMAT to keep boot scripts working.

OF_SPL_REMOVE_PROPS, SPL_DM_SEQ_ALIAS and SPL_PINCTRL change ensure
pinctrl for eMMC, SD-card and UART2 is applied in SPL.

MMC_HS200_SUPPORT and SPL counterpart is enabled to speed up eMMC load
times from on-board eMMC 5.1 modules.

Drop remaining unused or unsupported options to sync with other RK3568
boards.

Also sync device tree from linux v6.4 and drop u-boot,spl-boot-order and
use the default from rk356x-u-boot.dtsi.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agophy: rockchip: naneng-combphy: Use signal from comb PHY on RK3588
Jonas Karlman [Wed, 2 Aug 2023 19:41:22 +0000 (19:41 +0000)]
phy: rockchip: naneng-combphy: Use signal from comb PHY on RK3588

Route signal from comb PHY instead of PCIe3 PHY to PCIe1l0 and PCIe1l1.

Fixes use of pcie2x1l0 on ROCK 5B.

Code imported from mainline linux driver.

Fixes: c5b4a012bca8 ("phy: rockchip: naneng-combphy: Support rk3588")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agophy: rockchip: snps-pcie3: Add support for RK3588
Jonas Karlman [Wed, 2 Aug 2023 19:04:32 +0000 (19:04 +0000)]
phy: rockchip: snps-pcie3: Add support for RK3588

Add support for the RK3588 variant to the driver.

Code imported almost 1:1 from mainline linux driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agophy: rockchip: snps-pcie3: Add bifurcation support for RK3568
Jonas Karlman [Wed, 2 Aug 2023 19:28:33 +0000 (19:28 +0000)]
phy: rockchip: snps-pcie3: Add bifurcation support for RK3568

Configure aggregation or bifurcation mode on RK3568 based on the value
of data-lanes property.

Code imported almost 1:1 from mainline linux driver.

Fixes: 6ec62b6ca698 ("phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agophy: rockchip: snps-pcie3: Refactor to use a phy_init ops
Jonas Karlman [Wed, 2 Aug 2023 19:04:30 +0000 (19:04 +0000)]
phy: rockchip: snps-pcie3: Refactor to use a phy_init ops

Add a phy_init ops in preparation for upcoming support of a RK3588
variant in the driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agophy: rockchip: snps-pcie3: Refactor to use clk_bulk API
Jonas Karlman [Wed, 2 Aug 2023 19:04:29 +0000 (19:04 +0000)]
phy: rockchip: snps-pcie3: Refactor to use clk_bulk API

Change to use clk_bulk API and syscon_regmap_lookup_by_phandle to
simplify in preparation for upcoming support of a RK3588 variant.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agopci: pcie_dw_rockchip: Configure number of lanes and link width speed
Jonas Karlman [Wed, 2 Aug 2023 19:25:51 +0000 (19:25 +0000)]
pci: pcie_dw_rockchip: Configure number of lanes and link width speed

Set number of lanes and link width speed control register based on the
num-lanes property.

Code imported almost 1:1 from dw_pcie_setup in mainline linux.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
14 months agoMerge branch '2023-10-06-spl-prepare-for-universal-payload'
Tom Rini [Fri, 6 Oct 2023 21:23:47 +0000 (17:23 -0400)]
Merge branch '2023-10-06-spl-prepare-for-universal-payload'

To quote the author:
This series tidies up SPL a little and adds some core ofnode functions
needed to support Universal Payload. It also includes a few minor
fix-ups for sandbox.

For SPL the changes include CONFIG naming, removing various #ifdefs and
tidying up the FIT code.

One notable piece of the ofnode improvements is support for flattening a
livetree. This should be useful in future as we move FDT fixups to use
the ofnode API.

14 months agopci: serial: Support reading PCI-register size with base
Simon Glass [Tue, 26 Sep 2023 14:14:58 +0000 (08:14 -0600)]
pci: serial: Support reading PCI-register size with base

The PCI helpers read only the base address for a PCI region. In some cases
the size is needed as well, e.g. to pass along to a driver which needs to
know the size of its register area.

Update the functions to allow the size to be returned. For serial, record
the information and provided it with the serial_info() call.

A limitation still exists in that the size is not available when OF_LIVE
is enabled, so take account of that in the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Tweak device_is_on_pci_bus() for code size
Simon Glass [Tue, 26 Sep 2023 14:14:57 +0000 (08:14 -0600)]
dm: core: Tweak device_is_on_pci_bus() for code size

This function cannot return true if PCI is not enabled, since no PCI
devices will have been bound. Add a check for this to reduce code size
where it is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agoserial: Drop ns16550 serial_getinfo() in SPL
Simon Glass [Tue, 26 Sep 2023 14:14:56 +0000 (08:14 -0600)]
serial: Drop ns16550 serial_getinfo() in SPL

This is typically not needed in SPL/TPL and increases the code size.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Add C-based runtime detection of SPL
Simon Glass [Tue, 26 Sep 2023 14:14:55 +0000 (08:14 -0600)]
spl: Add C-based runtime detection of SPL

The spl_phase() function indicates whether U-Boot is in SPL and before
or after relocation. But sometimes it is useful to check for SPL with
zero code-size impact. Since spl_phase() checks the global_data flags,
it does add a few bytes.

Add a new spl_in_proper() function to check if U-Boot proper is
running, regardless of the relocation status.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agocommand: Include a required header in command.h
Simon Glass [Wed, 27 Sep 2023 14:22:37 +0000 (08:22 -0600)]
command: Include a required header in command.h

This uses ARRAY_SIZE() but does not include the header file which declares
it. Fix this, so that command.h can be included without common.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
14 months agobloblist: Add missing name
Simon Glass [Tue, 26 Sep 2023 14:14:52 +0000 (08:14 -0600)]
bloblist: Add missing name

Add a missing bloblist name.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agobloblist: Support initing from multiple places
Simon Glass [Tue, 26 Sep 2023 14:14:51 +0000 (08:14 -0600)]
bloblist: Support initing from multiple places

Typically the bloblist is set up after the devicetree is present. This
makes sense because bloblist may use malloc() to allocate the space it
needs.

However sometimes the devicetree itself may be present in the bloblist.
In that case it is at a known location in memory so we can init the
bloblist very early, before devicetree.

Add a flag to indicate whether the bloblist has been inited. Add a
function to init it only if needed. Use that in the init sequence.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agosandbox: Move the bloblist down a little in memory
Simon Glass [Tue, 26 Sep 2023 14:14:50 +0000 (08:14 -0600)]
sandbox: Move the bloblist down a little in memory

Move this down by 4KB so that it is large enough to hold the devicetree.

Also fix up the devicetree address in the documetation while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agosandbox: Only read the state if we have a state file
Simon Glass [Tue, 26 Sep 2023 14:14:49 +0000 (08:14 -0600)]
sandbox: Only read the state if we have a state file

We should not read this unless requested. Make it conditional on the
option being provided.

Add some debugging to show the state being written.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agosandbox: Init the EC properly even if no state file is available
Simon Glass [Tue, 26 Sep 2023 14:14:48 +0000 (08:14 -0600)]
sandbox: Init the EC properly even if no state file is available

This currently relies on sandbox attempting to read a state file. At
present it always does, even when there is no state file, in which case it
fails, but still inits the EC.

That is a bug, so update this driver to set the current image always, even
if no state is read.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agosandbox: Move reading the RAM buffer into a better place
Simon Glass [Tue, 26 Sep 2023 14:14:47 +0000 (08:14 -0600)]
sandbox: Move reading the RAM buffer into a better place

This should not happen in the argument-parsing function. Move it to the
main program.

Add some debugging for reading/writing.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Add tests for oftree_path()
Simon Glass [Tue, 26 Sep 2023 14:14:46 +0000 (08:14 -0600)]
dm: core: Add tests for oftree_path()

Add a few simple tests for getting the root node, since this is handled
as a special case in the implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Support writing a 64-bit value
Simon Glass [Tue, 26 Sep 2023 14:14:45 +0000 (08:14 -0600)]
dm: core: Support writing a 64-bit value

Add support for writing a single 64-bit value into a property.

Repurpose the existing tests to handle this case too.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Support writing a boolean
Simon Glass [Tue, 26 Sep 2023 14:14:44 +0000 (08:14 -0600)]
dm: core: Support writing a boolean

Add functions to write a boolean property. This involves deleting it if
the value is false.

Add a new ofnode_has_property() as well. Add a comment about the behaviour
of of_read_property() when the property value is empty.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Add a way to convert a devicetree to a dtb
Simon Glass [Tue, 26 Sep 2023 14:14:43 +0000 (08:14 -0600)]
dm: core: Add a way to convert a devicetree to a dtb

Add a way to flatten a devicetree into binary form. For livetree this
involves generating the devicetree using fdt_property() and other calls.
For flattree it simply involves providing the buffer containing the tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Add a way to delete a node
Simon Glass [Tue, 26 Sep 2023 14:14:42 +0000 (08:14 -0600)]
dm: core: Add a way to delete a node

Add a function to delete a node in an existing tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Add a way to copy a node
Simon Glass [Tue, 26 Sep 2023 14:14:41 +0000 (08:14 -0600)]
dm: core: Add a way to copy a node

Add a function to copy a node to another place under a new name. This is
useful at least for testing, since copying a test node with existing
properties is easier than writing the code to generate it all afresh.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Add a function to create an empty tree
Simon Glass [Tue, 26 Sep 2023 14:14:40 +0000 (08:14 -0600)]
dm: core: Add a function to create an empty tree

Provide a function to create a new, empty tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Tidy up comments in the ofnode tests
Simon Glass [Tue, 26 Sep 2023 14:14:39 +0000 (08:14 -0600)]
dm: core: Tidy up comments in the ofnode tests

Add comments to the functions where the test name does not indicate what
is being tested. Rename functions in a few cases, so that a search for the
function will also file its test.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Ensure we run flattree tests on ofnode
Simon Glass [Tue, 26 Sep 2023 14:14:38 +0000 (08:14 -0600)]
dm: core: Ensure we run flattree tests on ofnode

We need the UT_TESTF_SCAN_FDT flag set for these tests to run with flat
tree. In some cases it is missing, so add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Reverse the argument order in ofnode_copy_props()
Simon Glass [Tue, 26 Sep 2023 14:14:37 +0000 (08:14 -0600)]
dm: core: Reverse the argument order in ofnode_copy_props()

Follow the order used by memcpy() as it may be less confusing.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Move bloblist writing until the image is known
Simon Glass [Tue, 26 Sep 2023 14:14:36 +0000 (08:14 -0600)]
spl: Move bloblist writing until the image is known

The bloblist should not be finalised until the image is fully set up.
This allows any final handoff information to be included in the bloblist.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Use the correct FIT_..._PROP constants
Simon Glass [Tue, 26 Sep 2023 14:14:35 +0000 (08:14 -0600)]
spl: Use the correct FIT_..._PROP constants

Rather than open-coding the property names, use the existing constants
provided for this purpose. This better aligns the simple-FIT code with
the full FIT implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Move the full FIT code to spl_fit.c
Simon Glass [Tue, 26 Sep 2023 14:14:34 +0000 (08:14 -0600)]
spl: Move the full FIT code to spl_fit.c

For some reason this code was put in the main spl.c file. Move it out
to the FIT implementation where it belongs.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Rename spl_load_fit_image() to load_simple_fit()
Simon Glass [Tue, 26 Sep 2023 14:14:33 +0000 (08:14 -0600)]
spl: Rename spl_load_fit_image() to load_simple_fit()

We have two functions called spl_load_fit_image(), one in spl.c and one in
spl_fit.c

Rename the second one, to indicate that it relates to simple FIT parsing,
rather than the full version.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Remove #ifdefs with BOOTSTAGE
Simon Glass [Tue, 26 Sep 2023 14:14:32 +0000 (08:14 -0600)]
spl: Remove #ifdefs with BOOTSTAGE

This feature has some helpers in its header file so that its functions
resolve to nothing when the feature is disabled. Add a few more and use
these to simplify the code.

With this there are no more #ifdefs in board_init_r()

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Avoid an #ifdef when printing gd->malloc_ptr
Simon Glass [Tue, 26 Sep 2023 14:14:31 +0000 (08:14 -0600)]
spl: Avoid an #ifdef when printing gd->malloc_ptr

Use an accessor in the header file to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodm: core: Correct help in TPL_DM and VPL_DM
Simon Glass [Tue, 26 Sep 2023 14:14:30 +0000 (08:14 -0600)]
dm: core: Correct help in TPL_DM and VPL_DM

There are copying errors in the help. Fix these.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agodoc: Clean up SYS_MALLOC_SIMPLE
Simon Glass [Tue, 26 Sep 2023 14:14:29 +0000 (08:14 -0600)]
doc: Clean up SYS_MALLOC_SIMPLE

Move the useful help to Kconfig.

Drop mention of CONFIG_SYS_MALLOC_SIMPLE since it doesn't exist.

Correct a 'CONFIGSYS_MALLOC_F_LEN' typo

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agoTidy up uses of CONFIG_SYS_MALLOC_F_LEN
Simon Glass [Tue, 26 Sep 2023 14:14:28 +0000 (08:14 -0600)]
Tidy up uses of CONFIG_SYS_MALLOC_F_LEN

Use CONFIG_SYS_MALLOC_F instead to of CONFIG_SYS_MALLOC_F_LEN to
determine whether pre-relocation malloc() is enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN
Simon Glass [Tue, 26 Sep 2023 14:14:27 +0000 (08:14 -0600)]
spl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN

Use the new SPL/TPL/VPL_SYS_MALLOC_F symbols to determine whether the
malloc pool exists.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
14 months agotpl: Enable CONFIG_TPL_SYS_MALLOC_F where needed
Simon Glass [Tue, 26 Sep 2023 14:14:26 +0000 (08:14 -0600)]
tpl: Enable CONFIG_TPL_SYS_MALLOC_F where needed

Enable CONFIG_TPL_SYS_MALLOC_F for boards which have a non-zero value
for CONFIG_TPL_SYS_MALLOC_F_LEN

Note that the default is yes in most cases, so no changes are needed to
board defconfig options.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Enable CONFIG_SPL_SYS_MALLOC_F where needed
Simon Glass [Tue, 26 Sep 2023 14:14:25 +0000 (08:14 -0600)]
spl: Enable CONFIG_SPL_SYS_MALLOC_F where needed

Enable CONFIG_SPL_SYS_MALLOC_F for boards which have a non-zero value
for CONFIG_SPL_SYS_MALLOC_F_LEN

Note that the default is yes in most cases, so no changes are needed to
board defconfig options.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Create proper symbols for enabling the malloc() pool
Simon Glass [Tue, 26 Sep 2023 14:14:24 +0000 (08:14 -0600)]
spl: Create proper symbols for enabling the malloc() pool

For U-Boot proper we have CONFIG_SYS_MALLOC_F which indicates that a
malloc() pool is available before relocation.

For SPL we only have CONFIG_SPL_SYS_MALLOC_F_LEN which indicates the
size of the pool.

In various places we use CONFIG_SPL_SYS_MALLOC_F_LEN == 0 to indicate
that there is no pool.

This differing approach is confusing. Add a new CONFIG_SPL_SYS_MALLOC_F
symbol for SPL (and similarly for TPL and VPL). Tidy up the Kconfig
help for clarity.

For now these symbols are not used. That is cleaned up in the following
patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agoserial: Drop mention of SPL/TPL_SYS_MALLOC_F
Simon Glass [Tue, 26 Sep 2023 14:14:23 +0000 (08:14 -0600)]
serial: Drop mention of SPL/TPL_SYS_MALLOC_F

These symbols do not (yet) exist, so drop the usage of them in the
serial Kconfig file. It has no effect.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Drop the switch() statement for OS selection
Simon Glass [Tue, 26 Sep 2023 14:14:22 +0000 (08:14 -0600)]
spl: Drop the switch() statement for OS selection

This code is pretty ugly, with many #ifdefs

There are quite a lot of IH_OS_U_BOOT values so the compiler struggles
to create a jump table here. Also, most of the options are normally
disabled.

Change it to an else...if construct instead. Add an accessor for the
spl_image field behind an #ifdef to avoid needing #ifdef in the C code.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Avoid #ifdef with CONFIG_SPL_PAYLOAD_ARGS_ADDR
Simon Glass [Tue, 26 Sep 2023 14:14:21 +0000 (08:14 -0600)]
spl: Avoid #ifdef with CONFIG_SPL_PAYLOAD_ARGS_ADDR

Move the condition to the header file to improve readability.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Drop #ifdefs for BOARD_INIT and watchdog
Simon Glass [Tue, 26 Sep 2023 14:14:20 +0000 (08:14 -0600)]
spl: Drop #ifdefs for BOARD_INIT and watchdog

Avoid using the preprocessor for these checks.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: mx6: powerpc: Drop the condition on timer_init()
Simon Glass [Tue, 26 Sep 2023 14:14:19 +0000 (08:14 -0600)]
spl: mx6: powerpc: Drop the condition on timer_init()

It doesn't make sense to have some boards do this differently. Drop the
condition in the hope that the maintainers can figure out any run-time
problems.

This has been tested on qemu-ppce500

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu>
14 months agospl: Avoid #ifdef with CONFIG_SPL_SYS_MALLOC
Simon Glass [Tue, 26 Sep 2023 14:14:18 +0000 (08:14 -0600)]
spl: Avoid #ifdef with CONFIG_SPL_SYS_MALLOC

Use IF_ENABLED_INT() to avoid needing to use the preprocessor.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Rename SYS_SPL_ARGS_ADDR to SPL_PAYLOAD_ARGS_ADDR
Simon Glass [Tue, 26 Sep 2023 14:14:17 +0000 (08:14 -0600)]
spl: Rename SYS_SPL_ARGS_ADDR to SPL_PAYLOAD_ARGS_ADDR

Rename this so that SPL is first, as per U-Boot convention. Also add
PAYLOAD_ since this is where in memory the parameters for the payload
have been stored.

Signed-off-by: Simon Glass <sjg@chromium.org>
14 months agospl: Use CONFIG_SPL... instead of CONFIG_..._SPL_...
Simon Glass [Tue, 26 Sep 2023 14:14:16 +0000 (08:14 -0600)]
spl: Use CONFIG_SPL... instead of CONFIG_..._SPL_...

We like to put the SPL first so it is clear that it relates to SPL. Rename
various malloc-related options which have crept in, to stick to this
convention.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
14 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Thu, 5 Oct 2023 17:26:44 +0000 (13:26 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv

+ ae350: modify memory layout and target name
+ ae350: use generic RISC-V timer driver in S-mode
+ Support bootstage report for RISC-V
+ Support C extension exception command for RISC-V
+ Add Starfive timer support

14 months agoMerge branch '2023-10-04-TI-dts-updates'
Tom Rini [Thu, 5 Oct 2023 14:48:21 +0000 (10:48 -0400)]
Merge branch '2023-10-04-TI-dts-updates'

- Resync some TI K3 DTS files, to fix booting on them.

14 months agoMerge tag 'dm-pull-4oct23' of https://source.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Wed, 4 Oct 2023 22:49:58 +0000 (18:49 -0400)]
Merge tag 'dm-pull-4oct23' of https://source.denx.de/u-boot/custodians/u-boot-dm

moveconfig: enhance output; rename to qconfig

14 months agoarm: dts: k3-j721e: Sync with v6.6-rc1
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:56 +0000 (18:39 +0530)]
arm: dts: k3-j721e: Sync with v6.6-rc1

Sync k3-j721e DTS with kernel.org v6.6-rc1.

* Use mcu_timer0 defined in k3-j721e-mcu-wakeup.dtsi and remove
  timer0, we have its clocks set up in clk-data now
* Remove hbmc node as support is buggy and needs to be fixed
* Remove aliases and chosen node, use them from Kernel
* Remove /delete-property/ and clock-frequency from sdhci,
  usbss, and mcu_uart nodes as we have them in clk and dev data
* Remove dummy_clocks as they are not needed
* Remove cpsw node as it is not required since it has been fixed
  in U-Boot
* Remove pcie nodes, they are not needed
* Remove mcu_i2c0 as it is used for tps659413 PMIC in j721e-sk
  for which support is not yet added
* Change secproxy nodes to their Linux definitions
* Remove overriding of ti,cluster-mode in MAIN R5 to default to
  lockstep mode same as Kernel
* Retain tps6594 node as TPS6594 PMIC support is still under
  review in the Kernel [1], cleanup will be taken post its merge

[1] https://lore.kernel.org/all/20230810-tps6594-v6-0-2b2e2399e2ef@ti.com/

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
14 months agoarm: dts: k3-j721e-r5: Clean up inclusion hierarchy
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:55 +0000 (18:39 +0530)]
arm: dts: k3-j721e-r5: Clean up inclusion hierarchy

Get rid of k3-j721e-r5-*-u-boot.dtsi as it is not
necessary. Change the inclusion hierarchy to be as follows:

k3-j721e-<board>.dts---
       -
        -->k3-j721e-r5-<board>.dts
       -
k3-j721e-<board>-u-boot.dtsi---

Reason for explicitly mentioning the inclusion of -u-boot.dtsi in code
although it could've been automatically done by U-Boot is to resolve
some of the dependencies that R5 file requires.

Also remove duplicate phandles while making this shift as well as remove
firmware-loader as it serves no purpose without "phandlepart" property.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
14 months agoconfigs: j721e: Remove HBMC_AM654 config
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:54 +0000 (18:39 +0530)]
configs: j721e: Remove HBMC_AM654 config

Kernel commit d93036b47f35 ("arm64: dts: ti: k3-j721e-mcu_wakeup: Add
HyperBus node") was merged to kernel without its dependent patch [1].
Similar fix is needed in U-Boot, and hbmc currently breaks boot. Till
this gets fixed in U-Boot, disable the config by default so that the
hbmc probe that happens in board/ti/j721e/evm.c will not take place
and lead to boot failure.

[1] https://lore.kernel.org/all/20230424184810.29453-1-afd@ti.com/

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
14 months agodrivers: firmware: ti_sci: Get SCI revision only if TIFS/SYSFW is up
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:53 +0000 (18:39 +0530)]
drivers: firmware: ti_sci: Get SCI revision only if TIFS/SYSFW is up

When setting up boot media to load the TIFS binary in legacy boot flow
(followed by J721E), get_timer() is called which calls dm_timer_init()
which then gets the tick-timer: mcu_timer0. mcu_timer0 uses k3_clks
(clock controller) and k3_pds (power controller) from the dmsc node that
forces probe of the ti_sci driver of TIFS that hasn't been loaded yet!
Running ti_sci_cmd_get_revision from the probe leads to panic since no
TIFS and board config binaries have been loaded yet. Resolve this by
moving ti_sci_cmd_get_revision to ti_sci_get_handle_from_sysfw as a
common point of invocation for both legacy and combined boot flows.

Before doing this, it is important to go through whether any sync points
exist where revision is needed before ti_sci_get_handle_from_sysfw is
invoked. Going through the code along with boot tests on both flows
ensures that there are none.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
14 months agoarm: mach-k3: j721e_init: Move clk_k3 probe before loading TIFS
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:52 +0000 (18:39 +0530)]
arm: mach-k3: j721e_init: Move clk_k3 probe before loading TIFS

When setting boot media to load the TIFS binary in legacy boot flow
(followed by J721E), get_timer() is called which eventually calls
dm_timer_init() to grab the tick-timer, which is mcu_timer0. Since we
need to set up the clocks before using the timer, move clk_k3 driver
probe before k3_sysfw_loader to ensure we have all necessary clocks set
up before.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
14 months agoarm: mach-k3: j721e: dev-data: Add mcu_timer0 ID
Neha Malcom Francis [Wed, 27 Sep 2023 13:09:51 +0000 (18:39 +0530)]
arm: mach-k3: j721e: dev-data: Add mcu_timer0 ID

U-Boot uses mcu_timer0 as the tick-timer, so add it to device list.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
14 months agoarm: dts: k3-am625-beagleplay: Fix Boot
Nishanth Menon [Mon, 2 Oct 2023 15:00:53 +0000 (10:00 -0500)]
arm: dts: k3-am625-beagleplay: Fix Boot

Since commit [1] A53 u-boot proper is broken. This is because nodes
marked as 'bootph-pre-ram' are not available at u-boot proper before
relocation.

To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'.

[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")

Reported-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>