]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
4 years agoarm64: mvebu: Use devicetree for SMBIOS settings on uDPU
Simon Glass [Thu, 5 Nov 2020 13:32:15 +0000 (06:32 -0700)]
arm64: mvebu: Use devicetree for SMBIOS settings on uDPU

Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoodroid-c2: Use devicetree for SMBIOS settings
Simon Glass [Thu, 5 Nov 2020 13:32:14 +0000 (06:32 -0700)]
odroid-c2: Use devicetree for SMBIOS settings

Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoimx: Use devicetree for SMBIOS settings on MYiR MYS-6ULX
Simon Glass [Thu, 5 Nov 2020 13:32:13 +0000 (06:32 -0700)]
imx: Use devicetree for SMBIOS settings on MYiR MYS-6ULX

Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agorockchip: Use devicetree for SMBIOS settings
Simon Glass [Thu, 5 Nov 2020 13:32:12 +0000 (06:32 -0700)]
rockchip: Use devicetree for SMBIOS settings

Add settings and enable the default sysinfo driver so that these can come
from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosysinfo: Provide a default driver to set SMBIOS values
Simon Glass [Thu, 5 Nov 2020 13:32:11 +0000 (06:32 -0700)]
sysinfo: Provide a default driver to set SMBIOS values

Some boards want to specify the manufacturer or product name but do not
need to have their own sysinfo driver.

Add a default driver which provides a way to specify this SMBIOS
information in the devicetree, without needing any board-specific
functionality.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosmbios: Add documentation and devicetree binding
Simon Glass [Thu, 5 Nov 2020 13:32:10 +0000 (06:32 -0700)]
smbios: Add documentation and devicetree binding

Add information about how to set SMBIOS properties using the devicetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosmbios: Add more properties
Simon Glass [Thu, 5 Nov 2020 13:32:09 +0000 (06:32 -0700)]
smbios: Add more properties

The current tables only support a subset of the available fields defined
by the SMBIOS spec. Add a few more.

We could use CONFIG_SYS_CPU or CONFIG_SYS_SOC as a default for family, but
the meaning of that value relates more to the whole system rather than
just the SoC.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosmbios: Allow properties to come from the device tree
Simon Glass [Thu, 5 Nov 2020 13:32:08 +0000 (06:32 -0700)]
smbios: Allow properties to come from the device tree

Support a way to put SMBIOS properties in the device tree. These can be
placed in a 'board' device in an 'smbios' subnode.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Pass an ofnode into each SMBIOS function
Simon Glass [Thu, 5 Nov 2020 13:32:07 +0000 (06:32 -0700)]
x86: Pass an ofnode into each SMBIOS function

As a first step to obtaining SMBIOS information from the devicetree, add
an ofnode parameter to the writing functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodoc: Add a binding for sysinfo
Simon Glass [Thu, 5 Nov 2020 13:32:06 +0000 (06:32 -0700)]
doc: Add a binding for sysinfo

Add a simple binding file for this, so that it is clear what this binding
directory is for.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoboard: Rename uclass to sysinfo
Simon Glass [Thu, 5 Nov 2020 13:32:05 +0000 (06:32 -0700)]
board: Rename uclass to sysinfo

This uclass is intended to provide a way to obtain information about a
U-Boot board. But the concept of a U-Boot 'board' is the whole system,
not just one circuit board, meaning that 'board' is something of a
misnomer for this uclass.

In addition, the name 'board' is a bit overused in U-Boot and we want to
use the same uclass to provide SMBIOS information.

The obvious name is 'system' but that is so vague as to be meaningless.
Use 'sysinfo' instead, since this uclass is aimed at providing information
on the system.

Rename everything accordingly.

Note: Due to the patch delta caused by the symbol renames, this patch
shows some renamed files as being deleted in one place and created in
another.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: zimage: Quieten down the zimage boot process
Simon Glass [Wed, 4 Nov 2020 16:59:15 +0000 (09:59 -0700)]
x86: zimage: Quieten down the zimage boot process

Much of the output is not very useful. The bootm command is quite a bit
quieter. Convert some output to use log_debug().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
4 years agox86: zimage: Sanity-check the kernel version before printing it
Simon Glass [Wed, 4 Nov 2020 16:59:14 +0000 (09:59 -0700)]
x86: zimage: Sanity-check the kernel version before printing it

With Chrome OS the kernel setup block is stored in a separate place from
the kernel, so it is not possible to access the kernel version string.
At present, garbage is printed.

Add a sanity check to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: zimage: Add a little more logging
Simon Glass [Wed, 4 Nov 2020 16:59:13 +0000 (09:59 -0700)]
x86: zimage: Add a little more logging

Add logging for each part of the boot process, using a new

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
4 years agox86: fsp: Adjust calculations for MTRR range and DRAM top
Simon Glass [Wed, 4 Nov 2020 16:57:43 +0000 (09:57 -0700)]
x86: fsp: Adjust calculations for MTRR range and DRAM top

At present the top of available DRAM is the same as the top of the range
of the low-memory MTRR.

In fact, U-Boot is allowed to use memory up until the start of the FSP
reserved memory. Use that value for low_end, since it makes more memory
available.

Keep the same calculation as before for mtrr_top, i.e. the top of
reserved memory.

A side-effect of this change is that the E820 tables have a single entry
that extends from the bottom of the memory used by U-Boot to the bottom
of the FSP reserved memory. This includes the bloblist, if ACPI tables
are placed there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: pinctrl: Silence the warning when a pin is not found
Simon Glass [Wed, 4 Nov 2020 16:57:42 +0000 (09:57 -0700)]
x86: pinctrl: Silence the warning when a pin is not found

This does not necessarily indicate a problem, since some pins are
optional. Let the caller show an error if necessary.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agox86: acpi: Don't show the UART address by default
Simon Glass [Wed, 4 Nov 2020 16:57:41 +0000 (09:57 -0700)]
x86: acpi: Don't show the UART address by default

This is useful when using Linux's earlycon since the MMIO address must be
provided on some platforms, e.g.:

   earlycon=uart8250,mmio32,0xddffc000,115200n8

However this is only for debugging, so don't show it by default.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: acpi: Include the TPMv1 table only if needed
Simon Glass [Wed, 4 Nov 2020 16:57:40 +0000 (09:57 -0700)]
x86: acpi: Include the TPMv1 table only if needed

This table is not needed if a v2 TPM is in use. Add a condition to avoid
adding it when not needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Silence some logging statements
Simon Glass [Wed, 4 Nov 2020 16:57:39 +0000 (09:57 -0700)]
x86: Silence some logging statements

Quite a few log_info() calls are included in the x86 code which should use
log_debug() instead. Convert them to reduce unwanted output.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: fsp: Convert fsp_dram to use log_debug()
Simon Glass [Wed, 4 Nov 2020 16:57:38 +0000 (09:57 -0700)]
x86: fsp: Convert fsp_dram to use log_debug()

Use log_debug() instead of debug() in this file, to enable the extra
features.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Boot coral into Chrome OS by default
Simon Glass [Wed, 4 Nov 2020 16:57:37 +0000 (09:57 -0700)]
x86: Boot coral into Chrome OS by default

Add a script to boot Chrome OS from the internal MMC. This involved adding
a few commands and options.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Set up Chrome OS to boot into developer mode
Simon Glass [Wed, 4 Nov 2020 16:57:36 +0000 (09:57 -0700)]
x86: Set up Chrome OS to boot into developer mode

Set up a few fields necessarily to make Chrome OS boot without showing a
firmware error.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Use CONFIG_CHROMEOS_VBOOT for verified boot
Simon Glass [Wed, 4 Nov 2020 16:57:35 +0000 (09:57 -0700)]
x86: Use CONFIG_CHROMEOS_VBOOT for verified boot

At present CONFIG_CHROMEOS is used to determine whether verified boot is
in use. The code to implement that is not in U-Boot mainline.

However, it is useful to be able to boot a Chromebook in developer mode
in U-Boot mainline without needing the verified boot code.

To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot
should be used, and CONFIG_CHROMEOS to indicate that the board supports
Chrome OS. That allows us to define CONFIG_CHROMEOS on coral.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Define the Chrome OS GNVS region
Simon Glass [Wed, 4 Nov 2020 16:57:34 +0000 (09:57 -0700)]
x86: Define the Chrome OS GNVS region

It is not possible to boot Chrome OS properly without passing some basic
information from U-Boot. This applies even if verified boot is not being
used. Add a structure definition for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Don't reset the tables with every new generation
Simon Glass [Wed, 4 Nov 2020 16:57:33 +0000 (09:57 -0700)]
acpi: Don't reset the tables with every new generation

At present if SSDT and DSDT code is created, only the latter is retained
for examination by the 'acpi items' command. Fix this by only resetting
the list when explicitly requested.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: acpi: Put the generated code first in DSDT
Simon Glass [Wed, 4 Nov 2020 16:57:32 +0000 (09:57 -0700)]
x86: acpi: Put the generated code first in DSDT

The current implementation for DSDT tables is not correct for the case
where there is generated code, as the length ends up being incorrect.
Also, we want the generated code to go first in the table.

Rewrite this piece to correct these problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: acpi: Allow the SSDT to be empty
Simon Glass [Wed, 4 Nov 2020 16:57:31 +0000 (09:57 -0700)]
x86: acpi: Allow the SSDT to be empty

If there is nothing in the SSDT we should not include it in the tables.
Update the implementation to check this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoacpi: Correct reset handling in acpi_device_add_power_res()
Simon Glass [Wed, 4 Nov 2020 16:57:30 +0000 (09:57 -0700)]
acpi: Correct reset handling in acpi_device_add_power_res()

If there is no reset line, this still emits ACPI code for the reset GPIO.
Fix it by updating the check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: sound: Correct error handling
Simon Glass [Wed, 4 Nov 2020 16:57:29 +0000 (09:57 -0700)]
x86: sound: Correct error handling

A few functions have changed to return pin numbers or I2C addresses. The
error checking for some of the callers is therefore wrong. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Show the interrupt pointer with 'irqinfo'
Simon Glass [Wed, 4 Nov 2020 16:57:28 +0000 (09:57 -0700)]
x86: Show the interrupt pointer with 'irqinfo'

It is useful for this command to show the address of the interrupt table.
Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: nhlt: Fix a few bugs in the table generation
Simon Glass [Wed, 4 Nov 2020 16:57:27 +0000 (09:57 -0700)]
x86: nhlt: Fix a few bugs in the table generation

At present these tables do not have the correct header, and there is an
occasional incorrect value due to uninited data. Fix these bugs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: nhlt: Correct output of bytes and 16-bit data
Simon Glass [Wed, 4 Nov 2020 16:57:26 +0000 (09:57 -0700)]
x86: nhlt: Correct output of bytes and 16-bit data

At present these functions are incorrect. Fix them and add some logging
and checking to avoid future problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Allow putting some tables in the bloblist
Simon Glass [Wed, 4 Nov 2020 16:57:25 +0000 (09:57 -0700)]
x86: Allow putting some tables in the bloblist

At present all tables are placed starting at address f0000 in memory, and
can be up to 64KB in size. If the tables are very large, this may not
provide enough space.

Also if the tables point to other tables (such as console log or a ramoops
area) then we must allocate other memory anyway.

The bloblist is a nice place to put these tables since it is contiguous,
which makes it easy to reserve this memory for linux using the 820 tables.

Add an option to put some of the tables in the bloblist. For SMBIOS and
ACPI, create suitable pointers from the f0000 region to the new location
of the tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: squashed in http://patchwork.ozlabs.org/project/uboot/patch/
 20201105062407.1.I8091ad931cbbb5e3b6f6ababdf3f8d5db0d17bb9@changeid/]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Use if instead of #ifdef in write_tables()
Simon Glass [Wed, 4 Nov 2020 16:57:24 +0000 (09:57 -0700)]
x86: Use if instead of #ifdef in write_tables()

Use if() to remove the extra build path in this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Add SMBIOS info for Coral
Simon Glass [Wed, 4 Nov 2020 16:57:22 +0000 (09:57 -0700)]
x86: Add SMBIOS info for Coral

This is required by Chrome OS so that the audio and other unibuild
features work correctly. Add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: coral: Drop the duplicate PCIe settings
Simon Glass [Wed, 4 Nov 2020 16:57:21 +0000 (09:57 -0700)]
x86: coral: Drop the duplicate PCIe settings

These settings are included twice. The second lot are correct, so drop the
others.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Don't bother clearing global NVS
Simon Glass [Wed, 4 Nov 2020 16:57:20 +0000 (09:57 -0700)]
x86: Don't bother clearing global NVS

The bloblist guarantees that blobs are zeroed so there is no need to do
an additional memset(). Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: acpi: Store the ACPI context in global_data
Simon Glass [Wed, 4 Nov 2020 16:57:19 +0000 (09:57 -0700)]
x86: acpi: Store the ACPI context in global_data

At present we create the ACPI context but then drop it after generation of
tables is complete. This is annoying because we have to then search for
tables later.

To fix this, allocate the context and store it in global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Allow writing tables to fail
Simon Glass [Wed, 4 Nov 2020 16:57:18 +0000 (09:57 -0700)]
x86: Allow writing tables to fail

At present write_tables() can fail but does not report this problem to its
caller. Fix this by changing the return type.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Add support for private files
Simon Glass [Wed, 4 Nov 2020 16:57:17 +0000 (09:57 -0700)]
x86: Add support for private files

Some boards need to include binary data into the image for use during the
boot process. Add a node for these.

An example is the audio-codec configuration used by some audio drivers on
Intel platforms. If no private files are provided, they will be omitted.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Add a layout for Chrome OS verified boot
Simon Glass [Wed, 4 Nov 2020 16:57:16 +0000 (09:57 -0700)]
x86: Add a layout for Chrome OS verified boot

Add definitions for part of the vboot context used with verified boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: apl: Add core init for the SoC
Simon Glass [Wed, 4 Nov 2020 16:57:15 +0000 (09:57 -0700)]
x86: apl: Add core init for the SoC

Set up MSRs required for Apollo Lake. This enables Linux to use the
timers correctly. Also write the fixed MSRs for this platform.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoAdd an assembly guard around linux/bitops.h
Simon Glass [Wed, 4 Nov 2020 16:57:14 +0000 (09:57 -0700)]
Add an assembly guard around linux/bitops.h

This file can be included by any header but it includes C code. Guard it
to avoid errors when compiling ASL, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agocoreboot: make use of smbios parser
Christian Gmeiner [Tue, 3 Nov 2020 14:34:52 +0000 (15:34 +0100)]
coreboot: make use of smbios parser

If u-boot gets used as coreboot payload it might be nice to get
vendor, model and bios version from smbios. I am not sure about
the output of all the read information.

With qemu target for coreboot this could look this:

CBFS: Found @ offset 14f40 size 3b188
Checking segment from ROM address 0xffc15178
Checking segment from ROM address 0xffc15194
Loading segment from ROM address 0xffc15178
  code (compression=1)
  New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150
Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150
using LZMA
Loading segment from ROM address 0xffc15194
  Entry Point 0x01110000
BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms
Jumping to boot code at 0x01110000(0x07fa7000)

U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200)

CPU: x86_64, vendor AMD, device 663h
DRAM:  127.1 MiB
MMC:
Video: No video mode configured in coreboot!
Video: No video mode configured in coreboot!
Vendor: QEMU
Model: Standard PC (i440FX + PIIX, 1996)
Bios Version: 4.12-3152-g326a499f6f-dirty
Net:   e1000: 52:54:00:12:34:56
       eth0: e1000#0
No working controllers found
Finalizing coreboot
Hit any key to stop autoboot:  0

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosmbios: add parsing API
Christian Gmeiner [Tue, 3 Nov 2020 14:34:51 +0000 (15:34 +0100)]
smbios: add parsing API

Add a very simple API to be able to access SMBIOS strings
like vendor, model and bios version.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: Fix up driver names to avoid dtoc warnings
Simon Glass [Mon, 5 Oct 2020 11:27:01 +0000 (05:27 -0600)]
x86: Fix up driver names to avoid dtoc warnings

At present there are a lot of dtoc warnings reported when building
chromebook_coral, of the form:

   WARNING: the driver intel_apl_lpc was not found in the driver list

Correct these by using driver names that matches their compatible string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agocros_ec: Fix up driver names to avoid dtoc warnings
Simon Glass [Mon, 5 Oct 2020 11:27:00 +0000 (05:27 -0600)]
cros_ec: Fix up driver names to avoid dtoc warnings

Fix the dtoc warning in these file by using a driver name that matches the
compatible string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoarch: Move NEEDS_MANUAL_RELOC symbol to Kconfig
Michal Simek [Wed, 4 Nov 2020 14:33:20 +0000 (15:33 +0100)]
arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig

CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoenv: sf: fix init function behaviour
Heiko Schocher [Tue, 3 Nov 2020 14:22:36 +0000 (15:22 +0100)]
env: sf: fix init function behaviour

Michael wrote:
commit 92765f45bb95 ("env: Access Environment in SPI flashes before
relocation") at least breaks the Kontron sl28 board. I guess it also
breaks others which use a (late) SPI environment.

reason is, that env_init() sets the init bit, if there
is no init function defined in an environment driver,
and use default return value -ENOENT in this case
later for setting the default environment.

Change:
Environment driver can now implement an init
function and return, if this function does nothing,
simply -ENOENT.

env_init() now handles -ENOENT correct by setting the
inited bit for the environment driver. And if there
is no other environment driver whose init function
returns 0, load than the default environment.

This prevents that each environment driver needs to set the
default environment.

Fixes: 92765f45bb95 ("env: Access Environment in SPI flashes before relocation")
Reported-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc> [For the SF environment]
Signed-off-by: Heiko Schocher <hs@denx.de>
4 years agoMerge tag 'u-boot-atmel-fixes-2021.01-a' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Mon, 2 Nov 2020 14:01:28 +0000 (09:01 -0500)]
Merge tag 'u-boot-atmel-fixes-2021.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel fixes for 2021.01 cycle:

This specific feature set includes the patches for DT required to fix
the warnings for newer DTC version (1.6.0+), i2c and spi bus unit
address.

4 years agoARM: dts: at91: sama5d3xmb_cmp: fix SPI bus unit address
Eugen Hristev [Mon, 26 Oct 2020 08:39:54 +0000 (10:39 +0200)]
ARM: dts: at91: sama5d3xmb_cmp: fix SPI bus unit address

w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoARM: dts: at91: sam9260ek: fix SPI bus unit address
Eugen Hristev [Mon, 26 Oct 2020 08:39:53 +0000 (10:39 +0200)]
ARM: dts: at91: sam9260ek: fix SPI bus unit address

w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoARM: dts: at91: sama5d3xmb: fix I2C bus unit address
Eugen Hristev [Mon, 26 Oct 2020 08:39:52 +0000 (10:39 +0200)]
ARM: dts: at91: sama5d3xmb: fix I2C bus unit address

w+arch/arm/dts/sama5d3xmb.dtsi:64.25-83.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f0018000/camera@0x30: I2C bus unit address format error, expected "30"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoARM: dts: at91: gurnard: fix SPI bus unit address
Eugen Hristev [Mon, 26 Oct 2020 08:39:51 +0000 (10:39 +0200)]
ARM: dts: at91: gurnard: fix SPI bus unit address

w+arch/arm/dts/.at91sam9g45-gurnard.dtb.pre.tmp:118.21-122.7: Warning (spi_bus_reg): /ahb/apb/spi@fffa4000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoARM: dts: at91: at91sam9g25ek: fix I2C bus unit address
Eugen Hristev [Mon, 26 Oct 2020 08:39:50 +0000 (10:39 +0200)]
ARM: dts: at91: at91sam9g25ek: fix I2C bus unit address

w+arch/arm/dts/.at91sam9g25ek.dtb.pre.tmp:28.25-47.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8010000/camera@0x30: I2C bus unit address format error, expected "30"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoARM: dts: at91: at91sam9g20ek_common: fix SPI bus unit address
Eugen Hristev [Mon, 26 Oct 2020 08:39:49 +0000 (10:39 +0200)]
ARM: dts: at91: at91sam9g20ek_common: fix SPI bus unit address

w+arch/arm/dts/at91sam9g20ek_common.dtsi:100.21-104.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoARM: dts: at91: at91sam9g20-taurus: fix SPI bus unit address
Eugen Hristev [Mon, 26 Oct 2020 08:39:48 +0000 (10:39 +0200)]
ARM: dts: at91: at91sam9g20-taurus: fix SPI bus unit address

w+arch/arm/dts/.at91sam9g20-taurus.dtb.pre.tmp:79.18-83.4: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoARM: dts: at91: at91sam9261ek: fix SPI unit address warning
Eugen Hristev [Mon, 26 Oct 2020 08:39:47 +0000 (10:39 +0200)]
ARM: dts: at91: at91sam9261ek: fix SPI unit address warning

w+arch/arm/dts/.at91sam9261ek.dtb.pre.tmp:124.15-144.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/tsc2046@0: SPI bus unit address format error, expected "2"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoARM: dts: at91: vinco: fix I2C warning bus unit address
Eugen Hristev [Mon, 26 Oct 2020 08:39:46 +0000 (10:39 +0200)]
ARM: dts: at91: vinco: fix I2C warning bus unit address

w+arch/arm/dts/.at91-vinco.dtb.pre.tmp:131.18-134.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8024000/rtc@64: I2C bus unit address format error, expected "32"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoMerge tag 'efi-2020-01-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sun, 1 Nov 2020 15:56:37 +0000 (10:56 -0500)]
Merge tag 'efi-2020-01-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc2 (2)

The series contains the following enhancements

* preparatory patches for UEFI capsule updates
* initialization of the emulated RTC using an environment variable

and a bug fix

* If DisconnectController() is called for a child controller that is the
  only child of the driver, the driver must be disconnected.

4 years agoMerge tag 'u-boot-rockchip-20201031' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Sat, 31 Oct 2020 02:55:16 +0000 (22:55 -0400)]
Merge tag 'u-boot-rockchip-20201031' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- New PX30 board: Engicam PX30.Core;
- Fix USB HID support for rock960;
- Remove host endianness dependency for rockchip mkimage;
- dts update for rk3288-tinker;
- Enable console MUX for some ROCKPi boards;
- Add config-based ddr selection for px30;

4 years agoMerge tag 'dm-pull-30oct20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Fri, 30 Oct 2020 19:24:30 +0000 (15:24 -0400)]
Merge tag 'dm-pull-30oct20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

of-platdata and dtoc improvements
sandbox SPL tests
binman support for compressed sections

4 years agolog: typo logl_pref in documentation
Heinrich Schuchardt [Fri, 30 Oct 2020 17:50:31 +0000 (18:50 +0100)]
log: typo logl_pref in documentation

The name of structure element logl_prev is not matched by the
documentation.

%s/logl_pref/logl_prev/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoMerge branch '2020-10-30-misc-changes'
Tom Rini [Fri, 30 Oct 2020 18:17:23 +0000 (14:17 -0400)]
Merge branch '2020-10-30-misc-changes'

- Additional log improvements
- SPI flash environment improvements

4 years agodoc: rockchip: Document Rockchip miniloader flashing
Jagan Teki [Wed, 28 Oct 2020 13:33:48 +0000 (19:03 +0530)]
doc: rockchip: Document Rockchip miniloader flashing

This would be useful and recommended boot flow for new boards
which has doesn't have the DDR support yet in mainline.

Sometimes it is very useful for debugging mainline DDR support.

Documen it for px30 boot flow.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agorockchip: Add Engicam PX30.Core C.TOUCH 2.0
Jagan Teki [Wed, 28 Oct 2020 13:33:47 +0000 (19:03 +0530)]
rockchip: Add Engicam PX30.Core C.TOUCH 2.0

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.

PX30.Core needs to mount on top of this Carrier board for creating
complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: px30: Add Engicam C.TOUCH 2.0
Jagan Teki [Wed, 28 Oct 2020 13:33:46 +0000 (19:03 +0530)]
arm64: dts: rockchip: px30: Add Engicam C.TOUCH 2.0

Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose
carrier board with capacitive touch interface.

Genaral features:
- TFT 10.1" industrial, 1280x800 LVDS display
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector

SOM's like PX30.Core needs to mount on top of this Carrier board
for creating complete PX30.Core C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agorockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit
Jagan Teki [Wed, 28 Oct 2020 13:33:45 +0000 (19:03 +0530)]
rockchip: Add Engicam PX30.Core EDIMM2.2 Starter Kit

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board from Engicam.

PX30.Core needs to mount on top of this Evaluation board for
creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agoboard: engicam: Attach i.MX6 common code
Jagan Teki [Wed, 28 Oct 2020 13:33:44 +0000 (19:03 +0530)]
board: engicam: Attach i.MX6 common code

The existing common code for Engicam boards uses i.MX6,
so attach that into i.MX6 Engicam boards so-that adding
new SoC variants of Engicam boards become meaningful.

Add support for it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agorockchip: px30: Add EVB_PX30 Kconfig help
Jagan Teki [Wed, 28 Oct 2020 13:33:43 +0000 (19:03 +0530)]
rockchip: px30: Add EVB_PX30 Kconfig help

TARGET_EVB_PX30 can be possible to use other px30 boards.

Add the help text for existing EVB, so-that the new boards
which are resuing this config option can mention their board
help text.

This would help to track which boards are using EVB_PX30 config.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Add Engicam PX30.Core SOM
Michael Trimarchi [Wed, 28 Oct 2020 13:33:42 +0000 (19:03 +0530)]
arm64: dts: rockchip: Add Engicam PX30.Core SOM

PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.

General features:
- Rockchip PX30
- Up to 2GB DDR4
- eMMC 4 GB expandible
- rest of PX30 features

PX30.Core needs to mount on top of Engicam baseboards for creating
complete platform boards.

Possible baseboards are,
- EDIMM2.2
- C.TOUCH 2.0

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: px30: Add Engicam EDIMM2.2 Starter Kit
Jagan Teki [Wed, 28 Oct 2020 13:33:41 +0000 (19:03 +0530)]
arm64: dts: rockchip: px30: Add Engicam EDIMM2.2 Starter Kit

Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.

Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out

SOM's like PX30.Core needs to mount on top of this Evaluation board
for creating complete PX30.Core EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
4 years agorockchip: mkimage: Remove host endianness dependency
Samuel Holland [Sat, 24 Oct 2020 16:43:17 +0000 (11:43 -0500)]
rockchip: mkimage: Remove host endianness dependency

The Rockchip boot ROM expects little-endian values in the image header.
When running mkimage on a big-endian machine, these values need to be
byteswapped before writing or verifying the header.

This change fixes cross-compiling U-Boot SPL for the RK3399 SoC from a
big-endian ppc64 host machine.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agorockchip: Enable Console MUX in ROCKPi N8
Jagan Teki [Fri, 23 Oct 2020 19:57:25 +0000 (01:27 +0530)]
rockchip: Enable Console MUX in ROCKPi N8

Enable Console multiplexing in ROCKPi N8 which would is
required to video out the console buffer.

Enable it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agovideo: rockchip: Support 4K resolution for rk3288, HDMI
Jagan Teki [Fri, 23 Oct 2020 19:57:24 +0000 (01:27 +0530)]
video: rockchip: Support 4K resolution for rk3288, HDMI

Like, rk3399 the rk3288 also supports 4K resolution.

So, enable it for rk3288 with HDMI platforms.

Right now, rockchip video drivers are supporting for rk3288,
rk3399 SoC families, so mark the 4K resolution by default
if it's an HDMI video out.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agoarm64: dts: rockchip: Add chosen node for ROCK-Pi N8
Jagan Teki [Fri, 23 Oct 2020 19:57:23 +0000 (01:27 +0530)]
arm64: dts: rockchip: Add chosen node for ROCK-Pi N8

Add chosen node in -u-boot.dtsi for ROCK-Pi N8 board.

This will help to get serial out messages.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agorockchip: Enable Console MUX in ROCKPi N10
Jagan Teki [Fri, 23 Oct 2020 19:57:22 +0000 (01:27 +0530)]
rockchip: Enable Console MUX in ROCKPi N10

Enable Console multiplexing in ROCKPi N10 which would is
required to video out the console buffer.

Enable it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
4 years agodoc: Update logging documentation
Sean Anderson [Tue, 27 Oct 2020 23:55:41 +0000 (19:55 -0400)]
doc: Update logging documentation

This updates logging documentation with some examples of the new commands
added in the previous commits. It also removes some items from the to-do
list which have been implemented.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodoc: Add log kerneldocs to documentation
Sean Anderson [Tue, 27 Oct 2020 23:55:40 +0000 (19:55 -0400)]
doc: Add log kerneldocs to documentation

The functions in log.h are already mostly documented, so add them to the
generated documentation.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotest: Add a test for log filter-*
Sean Anderson [Tue, 27 Oct 2020 23:55:39 +0000 (19:55 -0400)]
test: Add a test for log filter-*

This exercises a few success and failure modes of the log filter-*
commands. log filter-list is not tested because it's purely informational.
I don't think there's a good way to test it except by testing if the output
of the command exactly matches a sample run.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocmd: log: Add commands to manipulate filters
Sean Anderson [Tue, 27 Oct 2020 23:55:38 +0000 (19:55 -0400)]
cmd: log: Add commands to manipulate filters

This adds several commands to add, list, and remove log filters. Due to the
complexity of adding a filter, `log filter-list` uses options instead of
positional arguments.

These commands have been added as subcommands to log by using a dash to
join the subcommand and subsubcommand. This is stylistic, and they could be
converted to proper subsubcommands if it is wished.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotest: Add a test for getopt
Sean Anderson [Tue, 27 Oct 2020 23:55:37 +0000 (19:55 -0400)]
test: Add a test for getopt

A few of these tests were inspired by those in glibc. The syntax for
invoking test_getopt is a bit funky, but it's necessary so that the CPP can
parse the arguments correctly.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
4 years agolib: Add getopt
Sean Anderson [Tue, 27 Oct 2020 23:55:36 +0000 (19:55 -0400)]
lib: Add getopt

Some commands can get very unweildy if they have too many positional
arguments. Adding options makes them easier to read, remember, and
understand.

This implementation of getopt has been taken from barebox, which has had
option support for quite a while. I have made a few modifications to their
version, such as the removal of opterr in favor of a separate getopt_silent
function. In addition, I have moved all global variables into struct
getopt_context.

The getopt from barebox also re-orders the arguments passed to it so that
non-options are placed last. This allows users to specify options anywhere.
For example, `ls -l foo/ -R` would be re-ordered to `ls -l -R foo/` as
getopt parsed the options. However, this feature conflicts with the const
argv in cmd_tbl->cmd. This was originally added in 54841ab50c ("Make sure
that argv[] argument pointers are not modified."). The reason stated in
that commit is that hush requires argv to stay unmodified. Has this
situation changed? Barebox also uses hush, and does not have this problem.
Perhaps we could use their fix?

I have assigned maintenance of getopt to Simon Glass, as it is currently
only used by the log command. I would also be fine maintaining it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
4 years agocmd: log: Make "log level" print all log levels
Sean Anderson [Tue, 27 Oct 2020 23:55:35 +0000 (19:55 -0400)]
cmd: log: Make "log level" print all log levels

This makes the log level command print all valid log levels. The default
log level is annotated. This provides an easy way to see which log levels
are compiled-in.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocmd: log: Add commands to list categories and drivers
Sean Anderson [Tue, 27 Oct 2020 23:55:34 +0000 (19:55 -0400)]
cmd: log: Add commands to list categories and drivers

This allows users to query which categories and drivers are available on
their system. This allows them to construct filter-add commands without
(e.g.) adjusting the log format to show categories and drivers.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocmd: log: Split off log level parsing
Sean Anderson [Tue, 27 Oct 2020 23:55:33 +0000 (19:55 -0400)]
cmd: log: Split off log level parsing

Move parsing of log level into its own function so it can be re-used. This
also adds support for using log level names instead of just the integer
equivalent.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocmd: log: Use sub-commands for log
Sean Anderson [Tue, 27 Oct 2020 23:55:32 +0000 (19:55 -0400)]
cmd: log: Use sub-commands for log

This reduces duplicate code, and makes adding new sub-commands easier.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotest: Add test for LOGFF_MIN
Sean Anderson [Tue, 27 Oct 2020 23:55:31 +0000 (19:55 -0400)]
test: Add test for LOGFF_MIN

This tests log filters matching on a minimum level.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolog: Add filter flag to match greater than a log level
Sean Anderson [Tue, 27 Oct 2020 23:55:30 +0000 (19:55 -0400)]
log: Add filter flag to match greater than a log level

This is the complement of the existing behavior to match only messages with
a log level less than a threshold. This is primarily useful in conjunction
with LOGFF_DENY.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotest: Add tests for LOGFF_DENY
Sean Anderson [Tue, 27 Oct 2020 23:55:29 +0000 (19:55 -0400)]
test: Add tests for LOGFF_DENY

This adds some tests for log filters which deny if they match.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotest: log: Give tests names instead of numbers
Sean Anderson [Tue, 27 Oct 2020 23:55:28 +0000 (19:55 -0400)]
test: log: Give tests names instead of numbers

Now that the log test command is no more, we can give the log tests proper
names.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
4 years agotest: log: Convert log_test from python to C
Sean Anderson [Tue, 27 Oct 2020 23:55:27 +0000 (19:55 -0400)]
test: log: Convert log_test from python to C

When rebasing this series I had to renumber all my log tests because
someone made another log test in the meantime. This involved updaing a
number in several places (C and python), and it wasn't checked by the
compiler. So I though "how hard could it be to just rewrite in C?" And
though it wasn't hard, it *was* tedious. Tests are numbered the same as
before to allow for easier review.

A note that if a test fails, everything after it will probably also fail.
This is because that test won't clean up its filters.  There's no easy way
to do the cleanup, except perhaps removing all filters in a wrapper
function.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
4 years agolog: Add filter flag to deny on match
Sean Anderson [Tue, 27 Oct 2020 23:55:26 +0000 (19:55 -0400)]
log: Add filter flag to deny on match

Without this flag, log filters can only explicitly accept messages.
Allowing denial makes it easier to filter certain subsystems. Unlike
allow-ing filters, deny-ing filters are added to the beginning of the
filter list. This should do the Right Thing most of the time, but it's
less-universal than allowing filters to be inserted anywhere. If this
becomes a problem, then perhaps log_filter_add* should take a filter number
to insert before/after.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolog: Add function to create a filter with flags
Sean Anderson [Tue, 27 Oct 2020 23:55:25 +0000 (19:55 -0400)]
log: Add function to create a filter with flags

This function exposes a way to specify flags when creating a filter.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolog: Expose some helper functions
Sean Anderson [Tue, 27 Oct 2020 23:55:24 +0000 (19:55 -0400)]
log: Expose some helper functions

These functions are required by "cmd: log: Add commands to manipulate
filters" and "test: Add a test for log filter-*".

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolog: Use CONFIG_IS_ENABLED() for LOG_TEST
Sean Anderson [Tue, 27 Oct 2020 23:55:23 +0000 (19:55 -0400)]
log: Use CONFIG_IS_ENABLED() for LOG_TEST

Checkpatch complains about using #ifdef for CONFIG variables.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolog: Add additional const qualifier to arrays
Sean Anderson [Tue, 27 Oct 2020 23:55:22 +0000 (19:55 -0400)]
log: Add additional const qualifier to arrays

Both these arrays and their members are const. Fixes checkpatch complaint.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolog: Fix incorrect documentation of log_filter.cat_list
Sean Anderson [Tue, 27 Oct 2020 23:55:21 +0000 (19:55 -0400)]
log: Fix incorrect documentation of log_filter.cat_list

Logging category lists are terminated by LOGC_END, not LOGC_NONE.

Fixes: e9c8d49d54 ("log: Add an implementation of logging")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agolog: Fix missing negation of ENOMEM
Sean Anderson [Tue, 27 Oct 2020 23:55:20 +0000 (19:55 -0400)]
log: Fix missing negation of ENOMEM

Errors returned should be negative.

Fixes: 45fac9fc18 ("log: Correct missing free() on error in log_add_filter()")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoimx6: enable early spi environment access on aristainetos boards
Heiko Schocher [Sat, 10 Oct 2020 08:28:06 +0000 (10:28 +0200)]
imx6: enable early spi environment access on aristainetos boards

On aristianetos boards the display type is detected
through "panel" environment variable. Dependend on the
display type we detect the board type and this decides which
DTB we have to use for the board.

So we need early spi environment access.

Signed-off-by: Heiko Schocher <hs@denx.de>