Lokesh Vutla [Wed, 5 Aug 2020 17:14:26 +0000 (22:44 +0530)]
ram: k3-j721e: Relax version checks for memory controller
k3-j721e ddr driver sanity checks for product id and version number.
Version number gets changed for every minor update in the IP. So discard
the version check and just sanity check for product id.
Lokesh Vutla [Wed, 5 Aug 2020 17:14:24 +0000 (22:44 +0530)]
board: ti: j7200: Introduce support for j7200 build targets
j7200-evm has minor differences with j721e-evm based on the IPs
available in the SoC. Introduce separate build targets for j7200-evm
to incorporate the differences.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:23 +0000 (22:44 +0530)]
arm: mach-k3: j7200: Detect if ROM has already loaded sysfw
Detect if sysfw is already loaded by ROM and pass this information to
sysfw loader. Based on this information sysfw loader either loads the
sysfw image from boot media or just receives the boot notification
message form sysfw.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:22 +0000 (22:44 +0530)]
arm: mach-k3: j7200: Add support for storing extended boot info from ROM
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. ROM passes this information on number of images that are loaded
to bootloader at certain location. Add support for storing this
information before it gets corrupted.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:21 +0000 (22:44 +0530)]
arm: mach-k3: j7200: Add support for SOC detection
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
Add support for detection J7200 SoC
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:19 +0000 (22:44 +0530)]
arm: mach-k3: j721e: Add detection for j721e
Add an api soc_is_j721e(), and use it to enable certain functionality
that is available only on j721e. This detection is needed when DT is not
available.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:18 +0000 (22:44 +0530)]
arm: mach-k3: sysfw-loader: Add support for rom loading sysfw image
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. In such cases, SPL need not load sysfw from boot media, but need
to receive boot notification message from sysfw. So separate out
remoteproc calls for system controller from sysfw loader and just
receive the boot notification if sysfw is already loaded.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
arm: mach-k3: Fix platform hang when SPL_MULTI_DTB_FIT is not enabled
If SPL_MULTI_DTB_FIT is not enabled, then CONFIG_SPL_OF_LIST is not defined
And in turn tispl.bin ends up not embedding any DTB.
Fixing it by using CONFIG_DEFAULT_DEVICE_TREE if SPL_OF_LIST is empty.
Suman Anna [Wed, 5 Aug 2020 17:14:15 +0000 (22:44 +0530)]
board: ti: j721e: Update fdt fixup logic for interconnect nodes
The DT nodes on J721E SoCs currently use a node name "interconnect" for
the various interconnects. This name is not following the DT schema, and
should simply be "bus". Update the fdt fixup logic to use both the current
and the expected corrected path names so that this logic won't be broken
with newer kernels.
Lokesh Vutla [Wed, 5 Aug 2020 17:14:13 +0000 (22:44 +0530)]
board: ti: board_detect: Add stub functions for EEPROM detection apis
Current usage of eeprom apis produce a build failure when
CONFIG_TI_I2C_BOARD_DETECT is not defined. Add stub function for these
apis to avoid build failures.
Reviewed-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:09 +0000 (11:35 +0530)]
arm: mach-k3: am6_init: Do USB fixups to facilitate host and device boot modes
U-boot only supports either USB host or device mode for a node at a
time in dts. To support both host and dfu bootmodes, set "peripheral"
as the default dr_mode but fixup property to "host" if host bootmode
is detected.
This needs to happen before the dwc3 generic layer binds the usb device
to a host or device driver. Therefore, add an fdtdec_setup_board()
implementation to fixup the dt based on the boot mode.
Also use the same fixup function to set the USB-PCIe Serdes mux to PCIe
in both the host and device cases. This is required for accessing the
interface at USB 2.0 speeds.
Faiz Abbas [Mon, 3 Aug 2020 06:05:06 +0000 (11:35 +0530)]
armv7R: K3: am654: Use full malloc in SPL both pre and post reloc
In order to be able to use things like file system drivers early on in
SPL (before relocation) in a memory-constrained environment when DDR is
not yet available we cannot use the simple malloc scheme which does not
implement the freeing of previously allocated memory blocks. To address
this issue go ahead and enable the use of the full malloc by manually
initializing the required functionality inside board_init_f by creating
a full malloc pool inside the pre-relocation malloc pool.
Suman Anna [Wed, 29 Jul 2020 18:41:12 +0000 (13:41 -0500)]
board: ti: am65x: Update fdt fixup logic for interconnect nodes
The DT nodes on AM65x SoCs currently use a node name "interconnect" for
the various interconnects. This name is not following the DT schema, and
should simply be "bus". Update the fdt fixup logic to use both the
current and the expected corrected path names so that this logic won't
be broken with newer kernels.
The logic also corrects the crypto node name as the DT node
unit-addresses are all expected to be lower case.
Faiz Abbas [Wed, 29 Jul 2020 01:33:41 +0000 (07:03 +0530)]
mmc: am654_sdhci: Use MMC_MODES_END value instead of hardcoded value
The hardcoded array size leads to array overflows with changes in
speed modes enum in mmc core. Use MMC_MODES_END for otap_del_sel
array declaration to fix this.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Suman Anna [Fri, 24 Jul 2020 22:51:40 +0000 (17:51 -0500)]
arm: dts: k3-j721e: Fix interconnect node names
The various CBASS interconnect nodes on K3 J721E SoCs are defined
using the node name "interconnect". This is not a valid node name
as per the dt-schema. Fix these node names to use the standard name
used for SoC interconnects, "bus".
Suman Anna [Fri, 24 Jul 2020 22:51:39 +0000 (17:51 -0500)]
arm: dts: k3-am65: Fix interconnect node names
The various CBASS interconnect nodes on K3 AM65x SoCs are defined
using the node name "interconnect". This is not a valid node name
as per the dt-schema. Fix these node names to use the standard name
used for SoC interconnects, "bus".
Andrew F. Davis [Wed, 15 Jul 2020 21:02:36 +0000 (17:02 -0400)]
arm: mach-k3: Clean non-coherent lines out of L3 cache
When switching on or off the ARM caches some care must be taken to ensure
existing cache line allocations are not left in an inconsistent state.
An example of this is when cache lines are considered non-shared by
and L3 controller even though the lines are shared. To prevent these
and other issues all cache lines should be cleared before enabling
or disabling a coherent master's cache. ARM cores and many L3 controllers
provide a way to efficiently clean out all cache lines to allow for
this, unfortunately there is no such easy way to do this on current K3
MSMC based systems.
We could explicitly clean out every valid external address tracked by
MSMC (all of DRAM), or we could attempt to identify only the set of
addresses accessed by a given boot stage and flush only those
specifically. This patch attempts the latter. We start with cleaning the
SPL load address. More addresses can be added here later as they are
identified.
Note that we perform a flush operation for both the flush and invalidate
operations, this is not a typo. We do this to avoid the situation that
some ARM cores will promote an invalidate to a clean+invalidate, but only
emit the invalidation operation externally, leading to a loss of data.
Signed-off-by: Andrew F. Davis <afd@ti.com> Tested-by: Faiz Abbas <faiz_abbas@ti.com>
Jan Kiszka [Tue, 23 Jun 2020 11:15:10 +0000 (13:15 +0200)]
arm: dts: k3: Add RTI watchdogs
Add DT entries for main domain watchdog0 and 1 instances on the J721e
well as RTI1-based watchdog on the AM65x. RTI0 does not work for this
purpose on the AM65x, so leave it out.
On AM65x, we mark the power-domain as shared because RTI firmware such
as https://github.com/siemens/k3-rti-wdt may request it as well in order
to prevent accidental shutdown of the watchdog.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Tue, 23 Jun 2020 11:15:08 +0000 (13:15 +0200)]
watchdog: Add support for K3 RTI watchdog
This is based on the Linux kernel driver for the RTI watchdog.
To actually reset the system on an AM65x, it requires firmware running
on the R5 that accepts the NMI and issues the actual system reset via
TISCI. Kind of an iTCO, except that this watchdog hardware has support
for no-way-out, and only for that.
On the J721E, reset works without extra firmware help when routing the
RTI interrupt via the ESM.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tom Rini [Fri, 24 Jul 2020 21:14:47 +0000 (17:14 -0400)]
Convert CONFIG_SYS_MMC_ENV_DEV et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_MMC_ENV_DEV
CONFIG_SYS_MMC_ENV_PART
Note that with this conversion we now have consistent behavior with
respect to ensuring that we have always selected the correct MMC
device and hardware partition.
Simon Glass [Fri, 7 Aug 2020 15:44:11 +0000 (09:44 -0600)]
Makefile: sunxi: Don't use binman to build ATF image
At present with sunxi 64-bit, the Makefile builds
u-boot-sunxi-with-spl.bin and then binman overwrites it with its own
version. But the binman definition lacks some parts, in particular
BL31.
For now, work around this with a hack.
Tested-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 42b18df80fd ("x86: Makefile: Drop explicit targets built by binman")
test: py: test_shell_run() with CONFIG_HUSH_PARSER=n
The hush parser not enabled for some boards, e.g.
sipeed_maix_bitm_defconfig.
With CONFIG_HUSH_PARSER=n a double quotation mark is not interpreted as the
beginning of a string. Use a single quotation mark instead.
Furthermore without the hush parser variables have to be referenced as
${varname}. Add the missing braces.
Reported-by: Sean Anderson <seanga2@gmail.com> Fixes: 8b86c609b860 ("test/py: add test of basic shell functionality") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Jway Lin [Wed, 1 Jul 2020 04:08:07 +0000 (21:08 -0700)]
board: presidio: add LED support
Add LED support for Cortina Access Presidio Engineering Board
Signed-off-by: Jway Lin <jway.lin@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Reviewed-by: Simon Glass <sjg@chromium.org> CC: Simon Glass <sjg@chromium.org>
Jway Lin [Wed, 1 Jul 2020 04:08:06 +0000 (21:08 -0700)]
led: led_cortina: Add CAxxx LED support
Add Cortina Access LED controller support for CAxxxx SOCs
Signed-off-by: Jway Lin <jway.lin@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Simon Glass <sjg@chromium.org>
Add head file fixed link error and remove unused flashing function Reviewed-by: Simon Glass <sjg@chromium.org>
Add Python scripts to test 'ls' and 'load' commands. The scripts
generate a SquashFS image and clean the directory after the assertions,
or if an exception is raised.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
include/u-boot, lib/zlib: add sources for zlib decompression
Add zlib (v1.2.11) uncompr() function to U-Boot. SquashFS depends on
this function to decompress data from a raw disk image. The actual
support for zlib into SquashFS sources will be added in a follow-up
commit.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>
Simon Glass [Wed, 29 Jul 2020 01:41:14 +0000 (19:41 -0600)]
cmd: Update the memory-search command
Add various fixes and improvements to this command that were missed in
the original version. Unfortunately I forgot to send v2.
- Fix Kconfig name
- Use a separate variable for the remaining search length
- Correct a minor bug
- Move into a separate test suite
- Add -q flag to the 'quiet' test to test operation when console is enabled
- Enable the feature for sandbox
Simon Glass [Wed, 29 Jul 2020 01:41:12 +0000 (19:41 -0600)]
dm: Rename DM test flags to make them more generic
The test flags used by driver model are currently not available to other
tests. Rather than creating two sets of flags, make these flags generic
by changing the DM_ prefix to UT_ and moving them to the test.h header.
This will allow adding other test flags without confusion.
Simon Glass [Wed, 29 Jul 2020 01:41:11 +0000 (19:41 -0600)]
console: Always define the console-recording functions
On boards without console recording these function are currently missing.
It is more convenient for them to be present but to return dummy values.
That way if we know that a test needs recording, we can check if it is
available, and skip the test if not, while avoiding #ifdefs.
Update the header file according and adjust console_record_reset_enable()
to return an error if recording is not available.
Simon Glass [Wed, 29 Jul 2020 01:41:10 +0000 (19:41 -0600)]
test: Add a way to check part of a console line or skip it
Some lines of the output are not worth testing, or not worth testing in
their entirety. For example, when checking a hex dump we know that the
hex-dump routine can display ASCII so we only need to check the hex bytes,
not the ASCII dump. Add a new test macros which can check only part of
a console line.
Sometimes it is useful to skip a line altogether, so add a macro for that
also.
Previously mkimage would process any node matching the regex cipher.*
and apply the ciphers to the image data in the order they appeared in
the FDT. This meant that data could be inadvertently ciphered multiple
times.
Switch to processing a single cipher node which exactly matches
FIT_CIPHER_NODENAME.
Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
common/board_r: Move blkcache_init call earlier in the boot sequence
blkcache_init manually relocates blkcache list pointers when
CONFIG_NEEDS_MANUAL_RELOC is enabled. However, it is called very late in
the boot sequence, which could be a problem if previous boot calls execute
blkcache operations with the non-relocated pointers. For example, mmc is
initialized earlier and might call blkcache_invalidate (in
mmc_select_hwpart()) when trying to load the environment from mmc via
env_load().
To fix this issue, move blkcache_init boot call earlier, before mmc gets
initialized.
blkcache: Extend blkcache_init to cover CONFIG_NEEDS_MANUAL_RELOC
Extend manual relocation of block_cache list pointers to all platforms that
enable CONFIG_NEEDS_MANUAL_RELOC. Remove m68k-specific checks and provide a
single implementation that adds gd->reloc_off to the pre-relocation
pointers.
Acked-by: Angelo Dureghello <angelo.dureghello@timesys.com> Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Eric Nelson <eric@nelint.com> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
[trini: Add guard around DECLARE_GLOBAL_DATA_PTR to avoid size growth] Signed-off-by: Tom Rini <trini@konsulko.com>
drivers: serial: Make serial_initialize return int
serial_initialize is called only during the common init sequence, after
relocation (in common/board_r.c). Because it has a void return value, it
has to wrapped in initr_serial. In order to be able to get rid of this
indirection, make serial_initialize return int.
Remove extern from prototype in order to silence the following checkpatch
warning:
check: extern prototypes should be avoided in .h files
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
dm: blk: Use IS_ENABLED() instead of #ifdefs in blk_post_probe
Use IS_ENABLED() instead of #ifdef in blk_post_probe function.
No functional change intended.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
[trini: Fix thinko and use CONFIG_HAVE_BLOCK_DEVICE in IS_ENABLED()] Signed-off-by: Tom Rini <trini@konsulko.com>
board_f: Move sram bdinfo assignments to generic code
Move sram related bdinfo from arch-specific setup_board_part1 to generic
code in setup_bdinfo. Also use "if (IS_ENABLED(CONFIG_SYS_HAS_SRAM))"
instead of "#ifdef CONFIG_SYS_SRAM_BASE".
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo
Move all assignments to gd->bd->bi_mem{start,size} to generic code in
setup_bdinfo.
Xtensa architecture is special in this regard as it defines its own
handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
a weak SDRAM function, let arch_setup_bdinfo overwrite the generic flags.
For ARC architecture, remove ARCH_EARLY_INIT_R from Kconfig since it is
not needed anymore.
Also, use gd->ram_base to populate bi_memstart to avoid an ifdef.
Certain architectures (ppc, mips, sh, m68k) use setup board_part1 and
setup_board_part2 calls during pre-relocation init to populate gd->bd
boardinfo fields. This makes the generic init sequence cluttered with
arch-specific ifdefs.
In order to clean these arch-specific sequences from generic init,
introduce arch_setup_bdinfo weak initcall so that everyone can define their
own bdinfo setup routines.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
cmd: bdinfo: Move sram info prints to generic code
bi_sramstart and bi_sramsize are generic members of the bd_info structure,
so move the m68k/powerpc-specific prints to generic code. Also, print them
only if SRAM support is enabled via CONFIG_SYS_HAS_SRAM.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
In order to be able to replace "#ifdef CONFIG_SYS_SRAM_BASE" sequences
with the IS_ENABLED() equivalent, introduce a new boolean Kconfig option
that signals whether the platform has SRAM support.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Tom Rini [Fri, 24 Jul 2020 21:13:17 +0000 (17:13 -0400)]
mvebu: bubt: Drop dead code
The code around CONFIG_SYS_MMC_ENV_PART has been untested since merge.
This can be seen by it referencing 'mmc->part_num' which was migrated
elsewhere prior to this code being merged.
Cc: Joel Johnson <mrjoel@lixil.net> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
projects / u-boot.git / log