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17 months agoMerge tag 'u-boot-imx-20230713' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Fri, 14 Jul 2023 00:38:24 +0000 (20:38 -0400)]
Merge tag 'u-boot-imx-20230713' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20230713
-------------------

Merge for 2023.10.

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16888

17 months agomx7dsabresd: Retrieve the second MAC address from fuses
Fabio Estevam [Tue, 11 Jul 2023 21:57:57 +0000 (18:57 -0300)]
mx7dsabresd: Retrieve the second MAC address from fuses

Currently, a random MAC address is assigned to eth1 in Linux.

Fix this behavor by retrieving the second MAC address from the fuses.

Signed-off-by: Fabio Estevam <festevam@denx.de>
17 months agoarm64: imx: imx8mp-beacon: Enable LTO
Adam Ford [Mon, 29 May 2023 18:08:34 +0000 (13:08 -0500)]
arm64: imx: imx8mp-beacon: Enable LTO

With LTO enabled, SPL shrinks about 10K and U-Boot shrinks
about 30K.

Signed-off-by: Adam Ford <aford173@gmail.com>
17 months agoconfig: xea: Disable support for FAT file system
Lukasz Majewski [Wed, 12 Jul 2023 10:20:47 +0000 (12:20 +0200)]
config: xea: Disable support for FAT file system

On the XEA (imx287) system the FAT file system is not used neither in
SPL nor u-boot proper.

Hence, to save ~6KiB of u-boot.img size - it has been disabled.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
17 months agoconfig: xea: Disable support for boot methods EXTLINUX and VBE
Lukasz Majewski [Wed, 12 Jul 2023 10:20:46 +0000 (12:20 +0200)]
config: xea: Disable support for boot methods EXTLINUX and VBE

The XEA system (imx287 based) is not using support for EXTLINUX and VBE.
As those configuration options have been enabled by default with modern
Kconfig it is safe to explicitly disable them.

After that change the u-boot.img size has been reduced by ~16 KiB.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
17 months agomx23_olinuxino: Convert to CONFIG_DM_SERIAL
Fabio Estevam [Tue, 11 Jul 2023 21:09:03 +0000 (18:09 -0300)]
mx23_olinuxino: Convert to CONFIG_DM_SERIAL

The conversion to CONFIG_DM_SERIAL is mandatory, so select this option.

Signed-off-by: Fabio Estevam <festevam@denx.de>
17 months agomx23evk: Convert to CONFIG_DM_SERIAL
Fabio Estevam [Tue, 11 Jul 2023 21:09:02 +0000 (18:09 -0300)]
mx23evk: Convert to CONFIG_DM_SERIAL

The conversion to CONFIG_DM_SERIAL is mandatory, so select this option.

Signed-off-by: Fabio Estevam <festevam@denx.de>
17 months agomx28evk: Convert to CONFIG_DM_SERIAL
Fabio Estevam [Tue, 11 Jul 2023 21:09:01 +0000 (18:09 -0300)]
mx28evk: Convert to CONFIG_DM_SERIAL

The conversion to CONFIG_DM_SERIAL is mandatory, so select this option.

Signed-off-by: Fabio Estevam <festevam@denx.de>
17 months agoarm64: dts: verdin-imx8mp: add ctrl_sleep_moci# hog
Andrejs Cainikovs [Tue, 11 Jul 2023 09:09:18 +0000 (11:09 +0200)]
arm64: dts: verdin-imx8mp: add ctrl_sleep_moci# hog

Drive CTRL_SLEEP_MOCI# high at boot (SPL) using a GPIO hog, this signal
may be used to control some power-rails on the carrier board, therefore
it should be set to high when the module is booting.

To do this as early as possible is generally a good idea and the issue
was noticed on the Yavia carrier board where it is needed to power the
I2C EEPROM on the carrier board.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
17 months agoconfigs: verdin-imx8mp: enable spl_gpio_hog
Andrejs Cainikovs [Tue, 11 Jul 2023 09:09:17 +0000 (11:09 +0200)]
configs: verdin-imx8mp: enable spl_gpio_hog

Enable CONFIG_SPL_GPIO_HOG option to be able to control GPIO hogs from
SPL.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
17 months agoarm64: dts: verdin-imx8mm: add ctrl_sleep_moci# hog
Andrejs Cainikovs [Tue, 11 Jul 2023 09:09:16 +0000 (11:09 +0200)]
arm64: dts: verdin-imx8mm: add ctrl_sleep_moci# hog

Drive CTRL_SLEEP_MOCI# high at boot (SPL) using a GPIO hog, this signal
may be used to control some power-rails on the carrier board, therefore
it should be set to high when the module is booting.

To do this as early as possible is generally a good idea and the issue
was noticed on the Yavia carrier board where it is needed to power the
I2C EEPROM on the carrier board.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
17 months agoconfigs: verdin-imx8mm: enable spl_gpio_hog
Andrejs Cainikovs [Tue, 11 Jul 2023 09:09:15 +0000 (11:09 +0200)]
configs: verdin-imx8mm: enable spl_gpio_hog

Enable CONFIG_SPL_GPIO_HOG option to be able to control GPIO hogs from
SPL.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
17 months agoverdin-imx8mm/verdin-imx8mp: synchronise device trees with linux
Marcel Ziswiler [Tue, 11 Jul 2023 09:09:14 +0000 (11:09 +0200)]
verdin-imx8mm/verdin-imx8mp: synchronise device trees with linux

Synchronise device trees with linux v6.5-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
17 months agoarm: dts: imx8mp-beacon-kit: Enable USB Power domains
Adam Ford [Tue, 30 May 2023 22:49:34 +0000 (17:49 -0500)]
arm: dts: imx8mp-beacon-kit: Enable USB Power domains

The USB Power domains should not have been removed as it causes
the board to hang if the USB is started.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
17 months agoarm: dts: imx8mp: Sync the DT with kernel 6.4-rc4
Adam Ford [Tue, 30 May 2023 22:45:58 +0000 (17:45 -0500)]
arm: dts: imx8mp: Sync the DT with kernel 6.4-rc4

Several changes have been made to the device tree
in the kernel, so update that as well as the
corresponding imx8mp-u-boot.dtsi files to prevent
breaking the booting.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
17 months agoclk: imx8mp: Update clocks based on kernel 6.4-RC4
Adam Ford [Tue, 30 May 2023 22:45:57 +0000 (17:45 -0500)]
clk: imx8mp: Update clocks based on kernel 6.4-RC4

There are some newer clocks added to the kernel recently,
so to fix prepare for resycing the device trees, update
the clock list.  Since there are some minor changes to
the USB clocks, update which USB clocks are enabled
to match with the upstream kernel as well.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
17 months agoboard: colibri-imx8x: initialize snvs
Andrejs Cainikovs [Mon, 3 Apr 2023 11:14:26 +0000 (13:14 +0200)]
board: colibri-imx8x: initialize snvs

Initialize Secure Non-Volatile Storage, aka SNVS.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
17 months agoimx8mn-var-som: adjust PHY reset gpios according to hardware configuration
Hugo Villeneuve [Thu, 25 May 2023 21:02:29 +0000 (17:02 -0400)]
imx8mn-var-som: adjust PHY reset gpios according to hardware configuration

For SOM with the EC configuration, the ethernet PHY is located on the
SOM itself, and connected to the CPU ethernet controller. It has a
reset line controlled via GPIO1_IO9. In this configuration, the PHY
located on the carrier board is not connected to anything and is
therefore not used.

For SOM without EC configuration, the ethernet PHY on the carrier
board is connected to the CPU ethernet controller. It has a reset line
controlled via the GPIO expander PCA9534_IO5.

The hardware configuration (EC) is determined at runtime by
reading from the SOM EEPROM.

To support both hardware configurations (EC and non-EC), adjust/fix
the PHY reset gpios according to the hardware configuration
read at runtime from the SOM EEPROM. This adjustement is done in
U-Boot (OF_BOARD_FIXUP) and kernel (OF_BOARD_SETUP) device trees.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
17 months agoARM: dts: imx: Fix eMMC boot on Data Modul i.MX8M Plus eDM SBC
Marek Vasut [Wed, 5 Jul 2023 23:26:10 +0000 (01:26 +0200)]
ARM: dts: imx: Fix eMMC boot on Data Modul i.MX8M Plus eDM SBC

In case the i.MX8M Plus starts from eMMC BOOT1/BOOT2 HW partitions, the
flash.bin container is stored at offset 0 from the start, that means the
fitImage itb is at offset 0x2c0 instead of 0x300 sectors from the start.
Handle this difference in custom spl_mmc_get_uboot_raw_sector() .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
17 months agoimx93_evk: defconfig: add adc support
Luca Ellero [Wed, 5 Jul 2023 12:56:17 +0000 (14:56 +0200)]
imx93_evk: defconfig: add adc support

iMX93 ADC features:
    - 4 channels
    - 12 bit resolution

Signed-off-by: Luca Ellero <l.ellero@asem.it>
17 months agodm: adc: add iMX93 ADC support
Luca Ellero [Wed, 5 Jul 2023 12:56:16 +0000 (14:56 +0200)]
dm: adc: add iMX93 ADC support

This commit adds driver for iMX93 ADC.

The driver is implemented using driver model and provides
ADC uclass's methods for ADC single channel operations:
    - adc_start_channel()
    - adc_channel_data()
    - adc_stop()

ADC features:
    - channels: 4
    - resolution: 12-bit

Signed-off-by: Luca Ellero <l.ellero@asem.it>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
17 months agoARM: imx: romapi: Fix signed integer bitwise ops misuse
Marek Vasut [Sun, 2 Jul 2023 01:03:51 +0000 (03:03 +0200)]
ARM: imx: romapi: Fix signed integer bitwise ops misuse

Bitwise operations on signed integers are not defined,
replace them with per-call checks.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
17 months agoconfigs: imx8m: Prepare imx8m-venice boards for HAB support
Tim Harvey [Fri, 23 Jun 2023 16:44:59 +0000 (09:44 -0700)]
configs: imx8m: Prepare imx8m-venice boards for HAB support

In order to enable HAB, FSL_CAAM, ARCH_MISC_INIT and
SPL_CRYPTO should be enabled in Kconfig like other i.MX8M
boards.

This also needs to occur in the SPL so enable CONFIG_SPL_BOARD_INIT and
add a void spl_board_init function which calls arch_misc_init to probe
the CAAM driver.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
17 months agoboard: gateworks: venice: switch to 2-bank dram config
Tim Harvey [Fri, 23 Jun 2023 16:44:17 +0000 (09:44 -0700)]
board: gateworks: venice: switch to 2-bank dram config

Switch to a 2-bank dram config to properly support 4GiB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
17 months agoboard: phytec: phycore_imx8mm: Update lpddr4_timing
Cem Tenruh [Fri, 16 Jun 2023 08:28:13 +0000 (10:28 +0200)]
board: phytec: phycore_imx8mm: Update lpddr4_timing

Update RAM Timings for 2GB RAM based on DDR Controller Configuration
Spreadsheet revision 22. Including the update of the refresh
rate to workaround errata ERR050805.

Signed-off-by: Cem Tenruh <c.tenruh@phytec.de>
17 months agomx8m: csf.sh: use vars for keys to avoid file edits when signing
Tim Harvey [Thu, 15 Jun 2023 15:21:08 +0000 (08:21 -0700)]
mx8m: csf.sh: use vars for keys to avoid file edits when signing

The csf_spl.txt and csf_fit.txt templates contain file paths which must
be edited for the location of your NXP CST generated key files.

Streamline the process of signing an image by assigning unique var names
to these which can be expended from env variables in the csf.sh script.

The following vars are used:
 SRK_TABLE - full path to SRK_1_2_3_4_table.bin
 CSF_KEY - full path to the CSF Key CSF1_1_sha256_4096_65537_v3_usr_crt.pem
 IMG_KEY - full path to the IMG Key IMG1_1_sha256_4096_65537_v3_usr_crt.pem

Additionally provide an example of running the csf.sh script.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: fsl_sec: preprocessor casting issue with addresses involving math
Utkarsh Gupta [Thu, 15 Jun 2023 10:09:27 +0000 (18:09 +0800)]
imx: fsl_sec: preprocessor casting issue with addresses involving math

The sec_in32 preprocessor is defined as follows in include/fsl_sec.h file:
When address "a" is calculated using math for ex: addition of base address and
an offset, then casting is applied only to the first address which in this
example is base address.

caam_ccbvid_reg = sec_in32(CONFIG_SYS_FSL_SEC_ADDR + CAAM_CCBVID_OFFSET)
resolves to:
caam_ccbvid_reg = in_le32((ulong *)(ulong)CONFIG_SYS_FSL_SEC_ADDR +
 CAAM_CCBVID_OFFSET)
instead it should resolve to:
caam_ccbvid_reg = in_le32((ulong *)(ulong)(CONFIG_SYS_FSL_SEC_ADDR +
 CAAM_CCBVID_OFFSET))

Thus add parenthesis around the address "a" so that however the address is
calculated, the casting is applied to the final calculated address.

Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: priblob: Update to use structure
Maximus Sun [Thu, 15 Jun 2023 10:09:26 +0000 (18:09 +0800)]
imx: priblob: Update to use structure

Use structure to avoid define CAAM_SCFGR for each platform

Signed-off-by: Maximus Sun <maximus.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: imx8m: add CAAM_BASE_ADDR
Peng Fan [Thu, 15 Jun 2023 10:09:25 +0000 (18:09 +0800)]
imx: imx8m: add CAAM_BASE_ADDR

Add CAAM_BASE_ADDR which will be used by priblob.c

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: imx8: ahab: sha256: enable image verification using ARMv8 crypto extension
Gaurav Jain [Thu, 15 Jun 2023 10:09:24 +0000 (18:09 +0800)]
imx: imx8: ahab: sha256: enable image verification using ARMv8 crypto extension

add support for SHA-256 secure hash algorithm using the ARM v8
SHA-256 instructions for verifying image hash.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: ahab: Update AHAB for iMX8 and iMX8ULP
Ye Li [Thu, 15 Jun 2023 10:09:23 +0000 (18:09 +0800)]
imx: ahab: Update AHAB for iMX8 and iMX8ULP

Abstract common interfaces for AHAB authentication operations.
Then share some common codes for AHAB and SPL container authentication

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: parse-container: Use malloc for container processing
Nitin Garg [Thu, 15 Jun 2023 10:09:22 +0000 (18:09 +0800)]
imx: parse-container: Use malloc for container processing

If the container has image which conflicts with
spl_get_load_buffer address, there are processing failures.
Use malloc instead of spl_get_load_buffer.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: imx8m: clock: not configure reserved SRC register
Peng Fan [Thu, 15 Jun 2023 10:09:21 +0000 (18:09 +0800)]
imx: imx8m: clock: not configure reserved SRC register

i.MX8M[M,N,P] SRC not has 0x1004 offset register, so drop it.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: imx8: bootaux: Add i.MX8 M4 boot support
Ye Li [Thu, 15 Jun 2023 10:09:20 +0000 (18:09 +0800)]
imx: imx8: bootaux: Add i.MX8 M4 boot support

1. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download
   M4 image to any DDR address first. Then use the
   "bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0
   or CM4_1, the default core id is 0 for CM4_0.

   Since current M4 only supports running in TCM. The bootaux will copy
   the M4 image from DDR to its TCML.

2. Implment bootaux for HIFI on QXP
   command: bootaux 0x81000000 1

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: bootaux: Fix bootaux issue when running on ARM64
Ye Li [Thu, 15 Jun 2023 10:09:19 +0000 (18:09 +0800)]
imx: bootaux: Fix bootaux issue when running on ARM64

The bootaux uses ulong to read private data and write to M4 TCM,
this cause problem on ARM64 platform where the ulong is 8bytes.
Fix it by using u32 to replace ulong.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: bootaux: change names of MACROs used to boot MCU on iMX devices
Peng Fan [Thu, 15 Jun 2023 10:09:18 +0000 (18:09 +0800)]
imx: bootaux: change names of MACROs used to boot MCU on iMX devices

The current bootaux supports i.MX8M and i.MX93, but the name "_M4_"
implies that the SoCs have Cortex-M4. Actually i.MX8MM/Q use Cortex-M4,
i.MX8MN/P use Cortex-M7, i.MX93 use Cortex-M33, so use "_MCU_" in place
of "_M4_" to simplify the naming.

Signed-off-by: faqiang.zhu <faqiang.zhu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: iamge-container: support secondary container
Peng Fan [Thu, 15 Jun 2023 10:09:17 +0000 (18:09 +0800)]
imx: iamge-container: support secondary container

Add the support for loading image from secondary container set on
iMX8QM B0, iMX8QXP C0.

Using the SCFW API to get container set index, if it is the secondary
boot, get the offset from fuse and apply to offset of current container
set beginning for loading.

Also override the emmc boot partition to check secondary boot and switch
to the other boot part.

This patch is modified from NXP downstream:
imx8: Fix the fuse used by secondary container offset
imx: container: Skip container set check for ROM API
imx8: spl: Support booting from secondary container set

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: image-container: Fix container header checking
Ye Li [Thu, 15 Jun 2023 10:09:16 +0000 (18:09 +0800)]
imx: image-container: Fix container header checking

Checking container header tag and version is wrong, it causes to fail
to bypass invalid container

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: hab: Fix coverity issue in HAB event decoding
Ye Li [Thu, 15 Jun 2023 10:09:15 +0000 (18:09 +0800)]
imx: hab: Fix coverity issue in HAB event decoding

Fix below coverity issues caused by get_idx function where "-1" is
compared with uint8_t "element"
343336 Unsigned compared with neg
343337 Operands don't affect result

Additional, this function returns "-1" will cause overflow to
event string array.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: imx8ulp: start the ELE RNG at boot
Peng Fan [Thu, 15 Jun 2023 10:09:14 +0000 (18:09 +0800)]
imx: imx8ulp: start the ELE RNG at boot

On the imx8ulp A1 SoC, the ELE RNG needs to be manually started.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: misc: ele_mu: Update ELE MU driver
Ye Li [Thu, 15 Jun 2023 10:09:13 +0000 (18:09 +0800)]
imx: misc: ele_mu: Update ELE MU driver

Extend the RX timeout value to 10s, because when authentication is failed
the ELE needs long time (>2s for 28M image) to return the result. Print
rx wait info per 1s.

Also correct TX and RX status registers in debug.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: misc: ele_mu: Update MU TR registers count
Ye Li [Thu, 15 Jun 2023 10:09:12 +0000 (18:09 +0800)]
imx: misc: ele_mu: Update MU TR registers count

According to SRM, the Sentinel MU has 8 TR and 4 RR registers. All
of them are used for ELE message. So update TR count to 8 and fix a
typo in receive msg

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: cmd_dek: add ELE DEK Blob generation support
Clement Faure [Thu, 15 Jun 2023 10:09:11 +0000 (18:09 +0800)]
imx: cmd_dek: add ELE DEK Blob generation support

Add ELE DEK Blob generation for the cmd_dek command.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: cmd_dek: Fix Uninitialized pointer read
Ye Li [Thu, 15 Jun 2023 10:09:10 +0000 (18:09 +0800)]
imx: cmd_dek: Fix Uninitialized pointer read

Fix Coverity (CID 21143558).
When tee_shm_register returns failure, the shm_input pointer is
invalid, should not free it. Same issue also exists on registering
shm_output.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: ele_api: add DEK Blob generation
Peng Fan [Thu, 15 Jun 2023 10:09:09 +0000 (18:09 +0800)]
imx: ele_api: add DEK Blob generation

- Add crc computation.
- Add ele_generate_dek_blob API for encrypted boot support.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: ele_api: support program secure fuse and return lifecycle
Peng Fan [Thu, 15 Jun 2023 10:09:08 +0000 (18:09 +0800)]
imx: ele_api: support program secure fuse and return lifecycle

Add two ELE API: ele_return_lifecycle_update and ele_write_secure_fuse
Add two cmd: ahab_return_lifecycle and ahab_sec_fuse_prog

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: ele_ahab: use hextoul
Peng Fan [Thu, 15 Jun 2023 10:09:07 +0000 (18:09 +0800)]
imx: ele_ahab: use hextoul

Use hextoul which looks a bit simpler.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: parse-container: fix build warning
Peng Fan [Thu, 15 Jun 2023 10:09:06 +0000 (18:09 +0800)]
imx: parse-container: fix build warning

Fix build warning:
warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 3
has type ‘u64’ {aka ‘long long unsigned int’} [-Wformat=]
         printf("can't find memreg for image %d load address 0x%x, error %d\n",
warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but
argument 3 has type ‘sc_faddr_t’ {aka ‘long long unsigned int’} [-Wformat=]
          debug("memreg %u 0x%lx -- 0x%lx\n", mr, start, end);

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: use generic name ele(EdgeLockSecure Enclave)
Peng Fan [Thu, 15 Jun 2023 10:09:05 +0000 (18:09 +0800)]
imx: use generic name ele(EdgeLockSecure Enclave)

Per NXP requirement, we rename all the NXP EdgeLock Secure Enclave
code including comment, folder and API name to ELE to align.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: scu_api: update to version 1.16 and add more APIs
Peng Fan [Thu, 15 Jun 2023 10:09:04 +0000 (18:09 +0800)]
imx: scu_api: update to version 1.16 and add more APIs

Upgrade SCFW API to 1.16
Add more APIs:
 sc_misc_get_button_status
 sc_pm_reboot
 sc_seco_v2x_build_info

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: congatec/cgtqmx8: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:09:03 +0000 (18:09 +0800)]
imx: congatec/cgtqmx8: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
17 months agoimx: advantech: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:09:02 +0000 (18:09 +0800)]
imx: advantech: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
17 months agoimx: siemens/capricorn: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:09:01 +0000 (18:09 +0800)]
imx: siemens/capricorn: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: toradex/colibri-imx8x: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:09:00 +0000 (18:09 +0800)]
imx: toradex/colibri-imx8x: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: toradex/apalis-imx8: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:08:59 +0000 (18:08 +0800)]
imx: toradex/apalis-imx8: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoimx: mach: correct SCU API usage
Peng Fan [Thu, 15 Jun 2023 10:08:58 +0000 (18:08 +0800)]
imx: mach: correct SCU API usage

The return value is int type, not sc_err_t(u8), correct the usage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
17 months agoconfigs: phycore-imx8mm_defconfig: Enable LTO
Teresa Remmet [Wed, 14 Jun 2023 12:36:48 +0000 (14:36 +0200)]
configs: phycore-imx8mm_defconfig: Enable LTO

Enable LTO for binary size reduction.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
17 months agoconfigs: phycore-imx8mp_defconfig: Enable LTO
Teresa Remmet [Wed, 14 Jun 2023 12:36:47 +0000 (14:36 +0200)]
configs: phycore-imx8mp_defconfig: Enable LTO

Enable LTO for binary size reduction.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
17 months agocolibri_imx6: fix RALAT and WALAT values
Stefan Eichenberger [Wed, 14 Jun 2023 09:01:37 +0000 (11:01 +0200)]
colibri_imx6: fix RALAT and WALAT values

Running a memtest in U-Boot and Linux shows that some Colibri iMX6
produce bitflips at temperatures above 60°C. This happens because the
RALAT and WALAT values on the Colibri iMX6 are too low. The problems
were introduced by commit 09dbac8174c4 ("mx6: ddr: Restore ralat/walat
in write level calibration") before the calibration process overwrote
the values and set them to the maximum value. With this commit, we make
sure that the RALAT and WALAT values are set to the maximum values
again. This has been proven to work for years.

Fixes: 09dbac8174c4 ("mx6: ddr: Restore ralat/walat in write level calibration")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
17 months agodoc: board: phytec: add phycore_imx8mp
Yannic Moog [Wed, 14 Jun 2023 07:12:20 +0000 (09:12 +0200)]
doc: board: phytec: add phycore_imx8mp

Add documentation on how to build a bootable U-Boot image for the PHYTEC
phyCORE-i.MX 8M Plus.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
17 months agodoc: board: phytec: add phycore_imx8mm
Yannic Moog [Wed, 14 Jun 2023 07:12:19 +0000 (09:12 +0200)]
doc: board: phytec: add phycore_imx8mm

Add documentation on how to build a bootable U-Boot image for the PHYTEC
phyCORE-i.MX 8M Mini.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
17 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Wed, 12 Jul 2023 17:10:04 +0000 (13:10 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv

- Add ethernet driver for StarFive JH7110 SoC
- Add ACLINT mtimer and mswi devices support
- Add Lichee PI 4A board

17 months agodoc: t-head: lpi4a: document Lichee PI 4A board
Yixun Lan [Sat, 8 Jul 2023 11:24:35 +0000 (19:24 +0800)]
doc: t-head: lpi4a: document Lichee PI 4A board

Reviewed-by: Wei Fu <wefu@redhat.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
17 months agoconfigs: th1520_lpi4a_defconfig: Add initial config
Yixun Lan [Sat, 8 Jul 2023 11:24:34 +0000 (19:24 +0800)]
configs: th1520_lpi4a_defconfig: Add initial config

Add basic config for Sipeed Lichee PI 4A board which make it capable of
booting into serial console.

Reviewed-by: Wei Fu <wefu@redhat.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
17 months agoriscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A board
Yixun Lan [Sat, 8 Jul 2023 11:24:33 +0000 (19:24 +0800)]
riscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A board

Only add basic support for CPU, PLIC UART and Timer.

Reviewed-by: Wei Fu <wefu@redhat.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
17 months agoriscv: t-head: licheepi4a: initial support added
Yixun Lan [Sat, 8 Jul 2023 11:24:32 +0000 (19:24 +0800)]
riscv: t-head: licheepi4a: initial support added

Add support for Sipeed's Lichee Pi 4A board which based on T-HEAD's
TH1520 SoC, only minimal device tree and serial console are enabled,
so it's capable of chain booting from T-HEAD's vendor u-boot.

Reviewed-by: Wei Fu <wefu@redhat.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
17 months agoriscv: Rename SiFive CLINT to RISC-V ALINT
Bin Meng [Wed, 21 Jun 2023 15:11:46 +0000 (23:11 +0800)]
riscv: Rename SiFive CLINT to RISC-V ALINT

As the RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V
ALINT in the source tree to be future-proof.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
17 months agoriscv: clint: Update the sifive clint ipi driver to support aclint
Bin Meng [Wed, 21 Jun 2023 15:11:45 +0000 (23:11 +0800)]
riscv: clint: Update the sifive clint ipi driver to support aclint

This RISC-V ACLINT specification [1] defines a set of memory mapped
devices which provide inter-processor interrupts (IPI) and timer
functionalities for each HART on a multi-HART RISC-V platform.

The RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, however the device tree binding
is a new one. This change updates the sifive clint ipi driver to
support ACLINT mswi device, by checking the per-driver data field of
the ACLINT mtimer driver to determine whether a syscon based approach
needs to be taken to get the base address of the ACLINT mswi device.

[1] https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
17 months agoriscv: timer: Update the sifive clint timer driver to support aclint
Bin Meng [Wed, 21 Jun 2023 15:11:44 +0000 (23:11 +0800)]
riscv: timer: Update the sifive clint timer driver to support aclint

This RISC-V ACLINT specification [1] defines a set of memory mapped
devices which provide inter-processor interrupts (IPI) and timer
functionalities for each HART on a multi-HART RISC-V platform.

The RISC-V ACLINT specification is defined to be backward compatible
with the SiFive CLINT specification, however the device tree binding
is a new one. This change updates the sifive clint timer driver to
support ACLINT mtimer device, using a per-driver data field to hold
the mtimer offset to the base address encoded in the mtimer node.

[1] https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.adoc

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
17 months agoboard: starfive: Dynamic configuration of DT for 1.2A and 1.3B
Yanhong Wang [Thu, 15 Jun 2023 09:36:52 +0000 (17:36 +0800)]
board: starfive: Dynamic configuration of DT for 1.2A and 1.3B

The main difference between StarFive VisionFive 2 1.2A and 1.3B is gmac.
You can read the PCB version of the current board by
get_pcb_revision_from_eeprom(), and then dynamically configure the
difference of gmac in spl_perform_fixups() according to different PCB
versions, so that one DT and one defconfig can support both 1.2A and
1.3B versions, which is more user-friendly.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
17 months agoram: starfive: Read memory size information from EEPROM
Yanhong Wang [Thu, 15 Jun 2023 09:36:51 +0000 (17:36 +0800)]
ram: starfive: Read memory size information from EEPROM

StarFive VisionFive 2 has two versions, 1.2A and 1.3B, each version of
DDR capacity includes 2G/4G/8G, a DT can not support multiple
capacities, so the capacity size information is recorded to EEPROM, when
DDR initialization required capacity size information is read from
EEPROM.

If there is no information in EEPROM, it is initialized with the default
size defined in DT.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
17 months agoconfigs: starfive: Enable ID EEPROM configuration
Yanhong Wang [Thu, 15 Jun 2023 09:36:50 +0000 (17:36 +0800)]
configs: starfive: Enable ID EEPROM configuration

Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-By: Leo Yu-Chi Linag <ycliang@andestech.com>
17 months agoriscv: dts: starfive: Add support eeprom device tree node
Yanhong Wang [Thu, 15 Jun 2023 09:36:49 +0000 (17:36 +0800)]
riscv: dts: starfive: Add support eeprom device tree node

Add support "atmel,24c04" eeprom for StarFive VisionFive2 board.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
17 months agoeeprom: starfive: Enable ID EEPROM configuration
Yanhong Wang [Thu, 15 Jun 2023 09:36:48 +0000 (17:36 +0800)]
eeprom: starfive: Enable ID EEPROM configuration

Enabled ID_EEPROM configuration for StarFive VisionFive2 board.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
17 months agoconfigs: starfive: Enable ethernet configuration for StarFive VisionFive2
Yanhong Wang [Thu, 15 Jun 2023 09:36:47 +0000 (17:36 +0800)]
configs: starfive: Enable ethernet configuration for StarFive VisionFive2

Enable DWC_ETH_QOS and PHY_MOTORCOMM configuration to support ethernet
function for StarFive VisionFive 2 board,including versions 1.2A and
1.3B.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
17 months agodoc: board: starfive: Reword the make defconfig information
Yanhong Wang [Thu, 15 Jun 2023 09:36:46 +0000 (17:36 +0800)]
doc: board: starfive: Reword the make defconfig information

The defconfig file name for StarFive VisionFive2 has been changed, and
the documentation description has also changed.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
17 months agoriscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B
Yanhong Wang [Thu, 15 Jun 2023 09:36:45 +0000 (17:36 +0800)]
riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B

The difference between 1.2A and 1.3B is dynamically configured according
to the PCB version, and there is no difference on the board device tree,
so the same DT file can be used.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
17 months agoriscv: dts: jh7110: Add ethernet device tree nodes
Yanhong Wang [Thu, 15 Jun 2023 09:36:44 +0000 (17:36 +0800)]
riscv: dts: jh7110: Add ethernet device tree nodes

Add ethernet device tree node to support StarFive ethernet driver for
the JH7110 RISC-V SoC.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
17 months agonet: dwc_eth_qos: Add StarFive ethernet driver glue layer
Yanhong Wang [Thu, 15 Jun 2023 09:36:43 +0000 (17:36 +0800)]
net: dwc_eth_qos: Add StarFive ethernet driver glue layer

The StarFive ETHQOS hardware has its own clock and reset,so add a
corresponding glue driver to configure them.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
17 months agonet: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy
Yanhong Wang [Thu, 15 Jun 2023 09:36:42 +0000 (17:36 +0800)]
net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy

Add a driver for the motorcomm yt8531 gigabit ethernet phy. We have
verified the driver on StarFive VisionFive2 board.

Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
17 months agoMerge tag 'efi-2023-07-rc7' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Tue, 11 Jul 2023 17:27:32 +0000 (13:27 -0400)]
Merge tag 'efi-2023-07-rc7' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2023-07-rc7

Documentation:

* Fix links to Linux kernel documentation

UEFI:

* Fix memory leak in efidebug dh subcommand
* Fix underflow when calculating remaining variable store size
* Increase default variable store size to 64 KiB
* mkeficapsule: fix efi_firmware_management_capsule_header data type

17 months agoMakefile: Drop -rc6
Tom Rini [Tue, 11 Jul 2023 13:55:53 +0000 (09:55 -0400)]
Makefile: Drop -rc6

When tagging and releasing v2023.07 I forgot to drop the -rc6 tag. For
regular use, I've made a v2023.07.01 tag, but for here we can just drop
the -rc6 tag.

Signed-off-by: Tom Rini <trini@konsulko.com>
17 months agoboard: gateworks: venice: add imx8mp-gw7905-2x support
Tim Harvey [Fri, 9 Jun 2023 16:54:51 +0000 (09:54 -0700)]
board: gateworks: venice: add imx8mp-gw7905-2x support

The Gateworks imx8mp-venice-gw7905-2x consists of a SOM + baseboard.

The GW702x SOM contains the following:
 - i.MX8M Plus SoC
 - LPDDR4 memory
 - eMMC Boot device
 - Gateworks System Controller (GSC) with integrated EEPROM, button
   controller, and ADC's
 - PMIC
 - SOM connector providing:
  - eQoS GbE MII
  - 1x SPI
  - 2x I2C
  - 4x UART
  - 2x USB 3.0
  - 1x PCI
  - 1x SDIO (4-bit 3.3V)
  - 1x SDIO (4-bit 3.3V/1.8V)
  - GPIO

The GW7905 Baseboard contains the following:
 - GPS
 - microSD
 - off-board I/O connector with I2C, SPI, GPIO
 - EERPOM
 - PCIe clock generator
 - 1x full-length miniPCIe socket with PCI/USB3 (via mux) and USB2.0
 - 1x half-length miniPCIe socket with USB2.0 and USB3.0
 - USB 3.0 HUB
 - USB Type-C with USB PD Sink capability and peripheral support
 - USB Type-C with USB 3.0 host support

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
17 months agoboard: gateworks: venice: display dram speed
Tim Harvey [Fri, 9 Jun 2023 16:54:01 +0000 (09:54 -0700)]
board: gateworks: venice: display dram speed

Display dram speed during configuration.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
17 months agoboard: gateworks: venice: assume emmc device for USB boot
Tim Harvey [Fri, 9 Jun 2023 16:51:46 +0000 (09:51 -0700)]
board: gateworks: venice: assume emmc device for USB boot

When booting from USB (SDP) setup firmware-update environment
for emmc device.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
17 months agoimx8m: beacon: Update MAINTAINER file to include beacon rst files
Adam Ford [Sun, 28 May 2023 19:18:04 +0000 (14:18 -0500)]
imx8m: beacon: Update MAINTAINER file to include beacon rst files

With variou README files migrated to rst, add them to the
MAINTAINER file for Beacon.

Signed-off-by: Adam Ford <aford173@gmail.com>
17 months agoimx8m: imx8mn-beacon: Migrate README to rst
Adam Ford [Sun, 28 May 2023 19:18:03 +0000 (14:18 -0500)]
imx8m: imx8mn-beacon: Migrate README to rst

Since U-Boot builds HTML documentation, migrate the contents
of the README file to an rst file which can generate the
proper outputs.

Signed-off-by: Adam Ford <aford173@gmail.com>
17 months agoimx: imx8mn-beacon: Move environment definition to env file
Adam Ford [Sun, 28 May 2023 19:18:02 +0000 (14:18 -0500)]
imx: imx8mn-beacon: Move environment definition to env file

Instead of cluttering up a header file with a bunch of defines,
move the default environmental variables to a file called
imx8mn_beacon.env and reference it from the defconfigs.

Signed-off-by: Adam Ford <aford173@gmail.com>
17 months agoimx8m: imx8mm-beacon: Migrate README to rst
Adam Ford [Sun, 28 May 2023 19:18:01 +0000 (14:18 -0500)]
imx8m: imx8mm-beacon: Migrate README to rst

Since U-Boot builds HTML documentation, migrate the contents
of the README file to an rst file which can generate the
proper outputs.

Signed-off-by: Adam Ford <aford173@gmail.com>
17 months agoimx: imx8mm-beacon: Move environment definition to env file
Adam Ford [Sun, 28 May 2023 19:18:00 +0000 (14:18 -0500)]
imx: imx8mm-beacon: Move environment definition to env file

Instead of cluttering up a header file with a bunch of defines,
move the default environmental variables to a file called
imx8mm_beacon.env and reference it from the defconfig.

Signed-off-by: Adam Ford <aford173@gmail.com>
17 months agoimx8mn-var-som: read eth MAC address from EEPROM
Hugo Villeneuve [Thu, 25 May 2023 21:02:28 +0000 (17:02 -0400)]
imx8mn-var-som: read eth MAC address from EEPROM

Read ethernet MAC address from EEPROM located on the SOM.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
17 months agoarm: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay
Hugo Villeneuve [Thu, 25 May 2023 21:02:27 +0000 (17:02 -0400)]
arm: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay

While testing the ethernet interface on a Variscite symphony carrier
board using an imx8mn SOM with an onboard ADIN1300 PHY (EC hardware
configuration), the ethernet PHY is not detected.

The ADIN1300 datasheet indicate that the "Management interface
active (t4)" state is reached at most 5ms after the reset signal is
deasserted.

The device tree in Variscite custom git repository uses the following
property:

    phy-reset-post-delay = <20>;

Add a new MDIO property 'reset-deassert-us' of 20ms to have the same
delay inside the ethphy node. Adding this property fixes the problem
with the PHY detection.

Note that this SOM can also have an Atheros AR8033 PHY. In this case,
a 1ms deassert delay is sufficient. Add a comment to that effect.

Fixes: c4c1ed68c1e8 ("imx8mn_var_som: Add support for Variscite
VAR-SOM-MX8M-NANO board")

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
17 months agoimx8mn-var-som: fix non-applied PHY reset-gpios properties
Hugo Villeneuve [Thu, 25 May 2023 21:02:26 +0000 (17:02 -0400)]
imx8mn-var-som: fix non-applied PHY reset-gpios properties

Select DM_ETH_PHY so that the reset-gpios property of the ethphy node
can be used.

Also select DM_PCA953X, which is needed for resetting the
ethernet PHY on the carrier board via the PCA9534 I/O expander.

Commit 4e5114daf9eb ("imx8mn: synchronise device tree with linux") did
synchronise device tree with linux, which in effect removed obsolete
PHY reset properties and replaced them with new mdio DM
properties. But the commit didn't activate DM_ETH_PHY or DM_PCA953X.

Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
17 months agoimx8mn-var-som: read and print SoM infos from eeprom on startup
Hugo Villeneuve [Thu, 25 May 2023 21:02:25 +0000 (17:02 -0400)]
imx8mn-var-som: read and print SoM infos from eeprom on startup

Enable support to read and display configuration/manufacturing infos
from 4Kbit EEPROM located on SOM board.

Note: CONFIG_DISPLAY_BOARDINFO is automatically selected for ARM arch.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
17 months agoimx8m: soc.c: demote some printfs to debug
Rasmus Villemoes [Mon, 22 May 2023 09:27:28 +0000 (11:27 +0200)]
imx8m: soc.c: demote some printfs to debug

Getting

  Found /vpu_g1@38300000 node
  Modify /vpu_g1@38300000:status disabled
  Found /vpu_g2@38310000 node
  Modify /vpu_g2@38310000:status disabled

etc. on the console on every boot is needlessly verbose. Demote the
"Found ..." lines to debug(), which is consistent with other instances
in soc.c.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
17 months agoconfig: xea: Enable DM_SERIAL for the XEA - single binary (SB) u-boot
Lukasz Majewski [Fri, 19 May 2023 10:43:58 +0000 (12:43 +0200)]
config: xea: Enable DM_SERIAL for the XEA - single binary (SB) u-boot

The single binary version of u-boot for XEA board is used to debrick and
factory programming.

The produced u-boot.sb is a single file, which allows having fully
operational u-boot prompt loaded with imx287 ROM.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
17 months agoconfig: xea: Enable DM_SERIAL for the XEA (imx287 based) board
Lukasz Majewski [Fri, 19 May 2023 10:43:57 +0000 (12:43 +0200)]
config: xea: Enable DM_SERIAL for the XEA (imx287 based) board

The XEA board now supports the DM_SERIAL feature in u-boot.

The SPL is using the SPL_OF_PLATDATA - i.e. NOT SPL_DM_SERIAL to
reduce the overall size of the SPL binary.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
17 months agoarm: Kconfig: Switch XEA (imx287 based) board to use CONFIG_PL01X_SERIAL
Lukasz Majewski [Fri, 19 May 2023 10:43:56 +0000 (12:43 +0200)]
arm: Kconfig: Switch XEA (imx287 based) board to use CONFIG_PL01X_SERIAL

The CONFIG_PL011 used by all other ARCH_MX28 based boards is not
supporting DM_SERIAL. Instead, other define - namely CONFIG_PL01X_SERIAL
shall be used by boards supporting DM_SERIAL.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
17 months agoarm: xea: Call spl_early_init() before DM serial console is enabled in SPL
Lukasz Majewski [Fri, 19 May 2023 10:43:55 +0000 (12:43 +0200)]
arm: xea: Call spl_early_init() before DM serial console is enabled in SPL

The in-spl enabled DM serial console requires the board setup to be
able to parse SPL_OF_PLATDATA based serial driver (pl01x) for the
imx28 based XEA board.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
17 months agoarm: mxs: Prevent serial console init when in very early SPL boot code
Lukasz Majewski [Fri, 19 May 2023 10:43:54 +0000 (12:43 +0200)]
arm: mxs: Prevent serial console init when in very early SPL boot code

When DM_SERIAL is enabled on mxs (i.e. imx28) platform, the console
early initialization must be postponed until the driver model is
correctly setup.

Signed-off-by: Lukasz Majewski <lukma@denx.de>