Tom Rini [Fri, 9 Aug 2024 22:03:21 +0000 (16:03 -0600)]
Merge patch series "Universal Payload initial series"
Simon Glass <sjg@chromium.org> says:
Universal Payload (UPL) is an Industry Standard for firmware
components[1]. UPL is designed to improve interoperability within the
firmware industry, allowing mixing and matching of projects with less
friction and fewer project-specific implementations. UPL is
cross-platform, supporting ARM, x86 and RISC-V initially.
This series provides some initial support for this, targeting 0.9.1 and
sandbox only.
Features still to come include:
- Support for architectures
- FIT validation
- Handoff validation
- Interoperability tests
Simon Glass [Wed, 7 Aug 2024 22:47:39 +0000 (16:47 -0600)]
upl: Add an end-to-end test
Now that sandbox_vpl supports UPL, add a test that checks that the
payload can be loaded by SPL and the handoff information passed through
to U-Boot proper.
Simon Glass [Wed, 7 Aug 2024 22:47:28 +0000 (16:47 -0600)]
upl: Add support for writing a upl handoff
Universal Payload provides a standard way of handing off control between
two firmware phases. Add support for writing the handoff information from
a structure.
Simon Glass [Wed, 7 Aug 2024 22:47:27 +0000 (16:47 -0600)]
upl: Add support for reading a upl handoff
Universal Payload provides a standard way of handing off control between
two firmware phases. Add support for reading the handoff information into
a structure.
Simon Glass [Wed, 7 Aug 2024 22:47:26 +0000 (16:47 -0600)]
sandbox: Set up global_data earlier
It is possible for U-Boot functions such as printf() to be called
within state_init(). This can end up checking gd->flags (e.g. in putc())
before global_data is set up.
Move the setup earlier to avoid this. This fixes the suppression of some
debug output in memory allocation (when enabled).
Simon Glass [Wed, 7 Aug 2024 22:47:24 +0000 (16:47 -0600)]
sandbox: Return error code from read/write/seek
The existing API for these functions is different from the rest of
U-Boot, in that any error code must be obtained from the errno variable
on failure. This variable is part of the C library, so accessing it
outside of the special 'sandbox' shim-functions is not ideal.
Adjust the API to return an error code, to avoid this. Update existing
uses to check for any negative value, rather than just -1.
Simon Glass [Wed, 7 Aug 2024 22:47:23 +0000 (16:47 -0600)]
sandbox: fdt: Avoid overwriting an existing fdt
Since the removal of OF_HOSTFILE logic in board_fdt_blob_setup(), the
logic for obtaining the DT is handled in the OF_BOARD option. If a
devicetree comes from a bloblist it is immediately overwritten by this
function.
Fix this by skipping the function if a devicetree is already present.
This is sort-of a fix for e7fb7896 ("sandbox: Remove OF_HOSTFILE") but
it has only come to light since bloblist was added, so I have not added
a Fixes tag.
Unfortunately it is not possible to report the correct FDT source with
the current code. It might be best to use an error-return code for
board_fdt_blob_setup() so that an error can be reported if the board
does not provide the DT.
Tom Rini [Wed, 7 Aug 2024 14:49:18 +0000 (08:49 -0600)]
Merge patch series "alist: Implement a pointer list / array of structs"
Simon Glass <sjg@chromium.org> says:
This data structure provides a list of pointers / array of structures.
I was planning to use it for the lmb restructure, to allow it to
support any number of entries, but then I gave up on it.
There are quite a few places in U-Boot where such a list would be
useful, since it supports growing the array.
Simon Glass [Tue, 30 Jul 2024 14:39:37 +0000 (08:39 -0600)]
alist: Add support for an allocated pointer list
In various places it is useful to have an array of structures, but allow
it to grow. In some cases we work around it by setting maximum number of
entries, using a Kconfig option. In other places we use a linked list,
which does not provide for random access and can complicate the code.
Introduce a new data structure, which is a variable-sized list of structs
each of the same, pre-set size. It provides O(1) access and is reasonably
efficient at expanding linearly, since it doubles in size when it runs out
of space.
Simon Glass [Tue, 30 Jul 2024 14:39:35 +0000 (08:39 -0600)]
malloc: Support testing with realloc()
At present in tests it is possible to cause an out-of-memory condition
with malloc() but not realloc(). Add support to realloc() too, so code
which uses that function can be tested.
omap3: sniper: Convert to device-tree control and DM I2C
This converts the sniper board (LG P970) to device-tree control
and DM I2C, both for SPL and U-Boot.
Note that we lose the call to board_mmc_power_init to enable power
for MMC2. This is now expected to take place through proper
regulators, which are not yet available with the twl4030 driver.
The call to twl4030_power_mmc_init is moved to spl_board_init for now.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
am33xx: Use regular spl_board_init instead of am33xx_spl_board_init
The am33xx_spl_board_init function was introduced as a way to add
board-specific SPL init for AM33xx devices since the spl_board_init
function was already used for SoC-specific init.
Now that the SoC-specific SPL init was moved to spl_soc_init, we can
use spl_board_init for this purpose and get rid of
am33xx_spl_board_init.
Rename the function in board files and enable the related config
option for concerned boards.
Signed-off-by: Paul Kocialkowski <paulk@sys-base.io> Reviewed-by: Tom Rini <trini@konsulko.com>
Both spl_board_init and spl_soc_init are available as ways to run
specific code in the SPL's board_init_r. Use the former for init
code that is specific to the SoC and leave spl_board_init available
for boards to use.
Signed-off-by: Paul Kocialkowski <paulk@sys-base.io> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 7 Aug 2024 00:33:08 +0000 (18:33 -0600)]
Merge patch series "omap configuration cleanups"
Paul Kocialkowski <paulk@sys-base.io> says:
Here is a bunch of configuration cleanups for OMAP boards, mostly
unifying and moving common configuration from board-specific defconfigs
to Kconfig definitions.
There's also a cleanup of the sniper (LG Optimus Black) defconfig,
prior to migrating it to DM/DT in a future follow-up series.
Remove custom config options that are not particularly necessary.
Align them with OMAP3 defaults used on other boards (especially for
memory locations).
Also enable Thumb build to reduce the SPL size and remove the custom
prompt text.
This makes the config a lot more minimalistic, maintainable and easier
to read.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
dra7xx: Remove explicit DRAM banks number from defconfigs
The common EMIF init code used for DRA7xx does not explicitly fill
the gd->bd->bi_dram entries (like OMAP3 does), so there is no reason
to set an explicit number of DRAM banks which doesn't correspond to
anything in particular.
Remove the CONFIG_NR_DRAM_BANKS option from the concerned defconfigs.
The dram_init_banksize default implementation will be fine with the
default value for the config option.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
omap3: Define DRAM banks number in Kconfig instead of defconfigs
The number of DRAM banks was defined to the same value in each OMAP3
board defconfig, which is expected and hardcoded in the code. Move the
common definition to the Kconfig option declaration instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
omap3: Define maximum SPL size in Kconfig instead of defconfigs
The maximum SPL size was defined to the same value in each OMAP3
board defconfig. Move the common definition to the Kconfig option
declaration instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
omap3: Define maximum U-Boot size in Kconfig instead of defconfigs
The maximum U-Boot size was defined to the same value in each OMAP3
board defconfig. Move the common definition to the Kconfig option
declaration instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
dra7xx: Define common init stack pointer address in Kconfig
The init stack pointer was defined to the same value in each DRA7xx
board defconfig. Move the common definition to the Kconfig option
declaration instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
dra7xx: Unify init stack pointer address across boards
The DRA7xx EVM board use a slightly different init stack pointer
address compared to the AM57xx EVM board, for no particular reason.
Align the address with the AM57xx EVM board (which matches the usual
offset to the end of SRAM used by other OMAP devices) prior to removing
it as a per-board option in a later commit.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
am43xx: Define common init stack pointer address in Kconfig
The init stack pointer was defined to the same value in each AM43xx
board defconfig. Move the common definition to the Kconfig option
declaration instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
am33xx: Define common init stack pointer address in Kconfig
The init stack pointer was defined to the same value in each AM33xx
board defconfig. Move the common definition to the Kconfig option
declaration instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
am33xx: Unify init stack pointer address across boards
The AM33xx chiliboard and guardian boards use a slightly different
init stack pointer address compared to other AM33xx boards, for no
particular reason.
Align the address with other AM33xx boards prior to removing it as a
per-board option in a later commit.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
omap3: Define common init stack pointer address in Kconfig
The init stack pointer was defined to the same value in each OMAP3
board defconfig. Move the common definition to the Kconfig option
declaration instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
omap3: Define common SPL text base in Kconfig instead of defconfigs
The SPL text base was defined to the same value in each OMAP3 board
defconfig. Move the common definition to the Kconfig option
declaration instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Derald D. Woods <woods.technical@gmail.com>
Tom Rini [Mon, 5 Aug 2024 18:15:44 +0000 (12:15 -0600)]
Merge patch series "Bug-fixes for a few boards"
Simon Glass <sjg@chromium.org> says:
This series includes fixes to get some rockchip and nvidia boards
working again. It also drops the broken Beaglebone Black config and
provides a devicetree fix for coral (x86).
Simon Glass [Thu, 1 Aug 2024 12:47:23 +0000 (06:47 -0600)]
rockchip: Avoid #ifdefs in RK3399 SPL
The code here is confusing due to large blocks which are #ifdefed out.
Add a function phase_sdram_init() which returns whether SDRAM init
should happen in the current phase, using that as needed to control the
code flow.
This increases code size by about 500 bytes in SPL when the cache is on,
since it must call the rather large rockchip_sdram_size() function.
Simon Glass [Wed, 31 Jul 2024 14:49:05 +0000 (08:49 -0600)]
fdt: Correct condition for bloblist existing
On some boards, the bloblist is created in SPL once SDRAM is ready. It
cannot be accessed until that point, so is not available early in SPL.
Add a condition to avoid a hang in this case.
This fixes a hang in chromebook_coral
Fixes: 70fe2385943 ("fdt: Allow the devicetree to come from a bloblist") Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Raymond Mao <raymond.mao@linaro.org>
Hou Zhiqiang [Thu, 1 Aug 2024 03:59:55 +0000 (11:59 +0800)]
cmd: cpu: add release subcommand
Add a new subcommand 'release' to bring up a core to run baremetal
and RTOS applications.
For example on i.MX8M Plus EVK, release the LAST core to run a RTOS
application, passing the sequence number of the CPU core to release,
here it is 3:
u-boot=> cpu list
0: cpu@0 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 31C
1: cpu@1 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 30C
2: cpu@2 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 31C
3: cpu@3 NXP i.MX8MP Rev1.1 A53 at 1200 MHz at 31C
u-boot=> load mmc 1:2 c0000000 /hello_world.bin
66008 bytes read in 5 ms (12.6 MiB/s)
u-boot=> dcache flush; icache flush
u-boot=> cpu release 3 c0000000
Released CPU core (mpidr: 0x3) to address 0xc0000000
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Hou Zhiqiang [Thu, 1 Aug 2024 03:59:47 +0000 (11:59 +0800)]
cpu: add release_core callback
Add a new callback release_core to the cpu_ops, which is used to
release a CPU core to run baremetal or RTOS application on a SoC
with multiple CPU cores.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Hou Zhiqiang [Thu, 1 Aug 2024 03:59:46 +0000 (11:59 +0800)]
clk: imx8m: register ARM A53 core clock
Register ARM A53 core clock for i.MX 8M Mini, Nano and Plus, preparing
for enabling the 'cpu' command, which depends on this to print CPU core
frequency.
Instead of using the local imx7s-warp devicetree copies from U-Boot,
convert the imx7s-warp board to OF_UPSTREAM so that the upstream
kernel devicetree can be used instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Alexander Dahl [Fri, 3 May 2024 07:20:09 +0000 (09:20 +0200)]
clk: Revise help text for clk_get_parent_rate()
The function returns the rate of the parent clock, the previous text
made no sense at all.
Fixes: 4aa78300a025 ("dm: clk: Define clk_get_parent_rate() for clk operations") Signed-off-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
Jan Kiszka [Sat, 9 Mar 2024 12:27:09 +0000 (13:27 +0100)]
clk: Fix error message in clk_get_bulk
Fix a logical inversion of the printed text.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tom Rini [Thu, 1 Aug 2024 21:32:54 +0000 (15:32 -0600)]
Merge patch series "clk: mediatek: add OPs to support OF_UPSTREAM"
Christian Marangi <ansuelsmth@gmail.com> says:
This series doesn't currently change anything and it does add all the
additional OPs to make support of OF_UPSTREAM.
While converting the mt7681/7686/7688/7623/7622 it was notice lots of
discrepancy between the downstream dtsi and the upstream one and the
clock ID between downstream clock ID and upstream clock ID.
Upstream reference clock by names and clock are handled by the
CCF (Common Clock Framework). The same can't be used here as we would
quickly reach the max space allocated before relocation.
The current mediatek clock driver reference all the parents and clocks
with offset from the clk ID related to the different tables.
Discrepancy between clock ID and the order in the clocks table cause
one clock referenced for another or even crash for trying to access
a clock at an offset that doesn't exist.
To handle this and permit use of OF_UPSTREAM, various measure and
changes are done to the mediatek clock driver to support it.
This series have all the generic clock changes. Once this is merged,
series for each SoC will came that will just change files in their
dedicated clock driver. This is to prevent massive patch and to
permit to split series, one for each SoC.
As said at the start, these changes doesn't cause regression and are
just expansion to the current API. Current behaviour is saved in every
possible way (aside from the first 2 patch that fixes latent bugs)
clk: mediatek: add support for GATEs for APMIXED OPs
Add support for GATEs for APMIXED OPs. It's possible that some APMIXED
have also gates on top of PLL. This is the case for mt7622. Add support
for this.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
clk: mediatek: implement MUX_FLAGS and MUX_MIXED_FLAGS macro
Some simple MUX might require flags to specify the parent source.
Implement MUX_FLAGS as a variant of the MUX macro that takes custom
flags as last arg.
Also implement MUX_MIXED_FLAGS for PARENT_MIXED implementation and
MUX_MIXED with no additional flags.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Upstream kernel linux might have a different clock ID order in their
<soc>-clk.h header. This is the case of some clock ID for mt7623 that
upstream use the shared header clk-mt7601.h
This header doesn't have a well distincted order and have factor or mux
in the middle of the CLK ID list. This is problematic with the mtk clock
driver that expect everything well organized in block and apply offset
to reference the clk in the different array.
To solve this problem, implement in the mtk_clk_tree an additional
option .id_offs_map, an array where each CLK ID can be remapped to what
the driver expect permitting to reorganize the clock following the
expected logic of fixed, factor, mux and gates.
Each clock function is updated to tranparently handle this by first
converting the clk ID to the remapped one.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
clk: mediatek: provide common clk init function for infrasys
Provide common clk init function for infrasys that defaults to topckgen
driver if clock-parent is not defined. This is the case for upstream
DTSI that doesn't provide this entry.
This is needed for infracfg driver that will make use of the unified
gates + muxes implementation.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
clk: mediatek: add support for gate clock to reference topckgen clock
Add support for gate clock get_rate to reference topckgen clock for
infracfg-ao implementation.
In infracfg-ao implementation topckgen is on second level of parent with
infracfg in the middle.
To correctly detect this, check the driver of the dev parent and use the
second level parent if it's not mtk_clk_topckgen.
Due to all the dependency, parent tree must be filled before a gate is
used, hence is safe to assume it will be there.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
clk: mediatek: add support for parent mux from different source for topckgen
As done for infracfg, also add support for parent mux from different
source for topckgen. This is needed as upstream linux doesn't use 1/1
factor and use directly the APMIXED clocks.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
clk: mediatek: add support for parent mux from different source
There is a current limitation where parents for a mux can be all declared
as they are from a common source. This is not true as there are some MUX
that can have parent from both infracfg or from topckgen.
To handle this, implement a new flag for the mux, CLK_PARENT_MIXED, and
a new entry for the mux parent_flags.
To use this, CLK_PARENT_MIXED must be used and parent_flags will be used
instead of the parent variable.
Entry in parent_flags are just a struct of ID and flags where it will be
defined where that parent comes from with the usage of
CLK_PARENT_INFRASYS or CLK_PARENT_TOPCKGEN.
This permits to have MUX with parents from infracfg or topckgen.
Notice that with CLK_PARENT_MIXED applied the CLK_BYPASS_XTAL is
ignored.
With CLK_PARENT_MIXED declare CLK_PARENT_XTAL for the relevant parent
instead.
Also alias for the CLK_PARENT macro are provided to better clear their
usage. CLK_PARENT_MIXED require these alias that describe the clk type
to be defined in the clk_tree flags to prevent clk ID clash from
different subsystem that may have equal clk ID.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add support to clk_gate ops to reference the clk ID at an offset by
using the just introduced gates_offs value from the unified muxes +
gates implementation.
Gate clock that doesn't have gates_offs set won't be affected as the
offset will simply be 0 and won't be offset of any value.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
clk: mediatek: add support for gates in clk_tree for infrasys
Add support for gates in clk_tree for infrasys ops.
Infracfg clks can have a sum of gates and muxes, and current solution
handle this by duplicating the driver and split clks for mux and clks
for gates. Upstream linux kernel handle this differently and doesn't
have this distinction.
To be closer to the upstream kernel clock definition, implement
additional logic to have gates defined in the clk_tree and implement
variant for the infrasys ops to handle gates defined in the tree.
Similar to how it's done with factor and mux, we introduce gates_offs.
Upstream kernel follow the similar logic with all the ID defined as
FDIVS, MUXES and finally GATES.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
clk: mediatek: return XTAL rate for infrasys get_mux_rate
We currently return 0 if XTAL rate is requested in get_mux_rate. This
deviates from what is done in get_factor_rate and is totally wrong as it
can cause unwanted results (division by 0 crash)
For infrasys that makes use of CLK_XTAL, assume xtal_rate to be defined
in clk_tree and return the rate when BYPASS_XTAL is not enabled with
clk ID 0 index parents.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
clk: mediatek: return XTAL rate directly for gates with XTAL parent
There is currently a massive bug that makes any gate clk that have
CLK_XTAL as parent to return the wrong clock.
Following the code, with CLK_XTAL defined as TOPCKGEN parent, the
topckgen get_rate is called. The clk ID (0) is parsed and only in some
corner case (scenario where fixed clock are not defined) the correct
XTAL rate will be returned as get_factor or get_mux is called (that have
correct handling for CLK_XTAL). With fixed clock defined, the rate that
will be returned will always be the FIRST ELEMENT of the fixed clock
table instead of the hardcoded XTAL rate.
To handle this, add additional logic and if the flag is set to
PARENT_XTAL for the gate, return the XTAL rate directly.
We assume the clk_tree to have xtal_rate defined with clk gates that
have XTAL as parents.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
projects / u-boot.git / log