Marek Vasut [Thu, 6 Jun 2024 13:01:48 +0000 (15:01 +0200)]
ARM: dts: stm32: Auto-detect second MAC on STM32MP15xx DH electronics DHCOM
Test whether this system is compatible with STM32MP15xx DHCOM SoM,
if so, test whether R292 pull up is populated on pin PC3, which is
an indication that the second MAC chip, KS8851-16MLL, is populated.
Use this information to patch 'status' DT property into the second
ethernet MAC DT node and enable/disable the MAC on systems where
the chip is/isn't populated respectively.
Use spl_perform_fixups() to patch the U-Boot proper DT from SPL and
ft_board_setup() to patch Linux DT from U-Boot proper. This way both
software components are configured the same way.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Thu, 16 May 2024 23:47:04 +0000 (01:47 +0200)]
ARM: dts: stm32: Add generic SoM compatible to STM32MP15xx DH electronics DHSOM
Add generic SoM compatible string into machine compatible string
for all STM32MP15xx based DH electronics DHSOM. This way, common
board code can match on this compatible. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
ARM: dts: stm32: use internal clock for Tx for stm32mp157c-odyssey
In Odyssey board, we should use the internal clock from RCC as the
transmit clock, instead of the external clock from ETH_CLK125 pad. This
commit adds a property, st,eth-clk-sel, so that the ETH_CLK_SEL mux
selects ETH_CLK.
Marek Vasut [Tue, 19 Mar 2024 02:45:08 +0000 (03:45 +0100)]
ARM: dts: stm32: Make PWR regulator driver available on STM32MP13xx
This patch makes STM32 PWR regulators available on stm32mp13xx.
This requires TFA to clear RCC_SECCFGR, is disabled by default
on stm32mp13xx and can only be enabled on board config level.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Tue, 19 Mar 2024 02:45:07 +0000 (03:45 +0100)]
ARM: dts: stm32: add PWR regulators support on stm32mp131
This patch adds STM32 PWR regulators DT support on stm32mp131.
This requires TFA to clear RCC_SECCFGR, is disabled by default
and can only be enabled on board DT level.
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Since commit 7b78d6438a2b3 ("efi_loader: Reserve unaccessible memory")
memory region above ram_top is tagged in EFI memory map as
EFI_BOOT_SERVICES_DATA.
In case of STM32MP1/STM32MP13 platforms, above ram_top, there is one
reserved-memory region tagged "no-map" dedicated to OP-TEE :
_ addr=de000000 size=2000000 for stm32mp157x-dkx and stm32mp135f-dk
_ addr=fe000000 size=2000000 for stm32mp157c-ev1
Before booting kernel, EFI memory map is first built, the OPTEE region is
tagged as EFI_BOOT_SERVICES_DATA and when reserving LMB, the tag LMB_NONE
is used.
Then after, the LMB are completed by boot_fdt_add_mem_rsv_regions()
which try to add again the same OPTEE region (addr=de000000 size=2000000
in case of stm32mp157x-dkx / stm32mp135f-dk or addr=fe000000 size=2000000
in case for stm2mp157c-ev1)
but now with LMB_NOMAP tag which produces the following error message :
_ for stm32mp157x-dkx / stm32mp135f-dk :
"ERROR: reserving fdt memory region failed (addr=de000000 size=2000000 flags=4)"
_ for stm32mp157c-ev1 :
"ERROR: reserving fdt memory region failed (addr=fe000000 size=2000000 flags=4)"
To avoid this, OPTEE area shouldn't be used by EFI, so we need to mark
it as reserved.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Mon, 17 Jun 2024 17:01:35 +0000 (11:01 -0600)]
Merge tag 'xilinx-for-v2024.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
AMD/Xilinx changes for v2024.10-rc1
common:
- spl: Introduce SoC specific init function
xilinx:
- Enable FF-A and NVMEM
- Rename spl_board_init() to spl_soc_init()
zynqmp:
- DT alignments
- Enable reset from SPL
- Enable USB3 for KD240
- Align multiboot register on Kria for proper reboot
- Allow multiboot environment write even in saved environment
- Move zynqmp commands from board/ to arch/
- Clean up xilinx_zynqmp.h
versal:
- Do not prioritize boot device if driver is not enabled
versal-net:
- Setup location for redundant variables in SPI
versal2:
- Add support for new SOC
mmc:
- Fix tap delay for SD on Versal NET
spi:
- Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash part
ENV_OFFSET_REDUND config is by default set to 0 for flashes.
Saving the env variables is overwriting data at 0 offset,
which is wrong. So add default redund env offset
ENV_OFFSET_REDUND at 0x7F00000 for Versal NET platform.
Neal Frager [Tue, 4 Jun 2024 08:38:54 +0000 (09:38 +0100)]
arm64: zynqmp: Enable usb3 for k24 som
This patch corrects the mio and pll configuration registers for using usb3
on the kd240 starter kit. Without this patch, the usb3 to sd card bridge does
not initialize correctly and u-boot is unable to find the OS located on the
kd240 starter kit sd card.
In addition, this patch correctly configures mio76 and mio77 as gpio pins
which are used as reset gpio pins on the kd240 starter kit.
Michal Simek [Mon, 3 Jun 2024 13:09:01 +0000 (15:09 +0200)]
arm64: zynqmp: Setup multiboot register to 0
On Kria when board starts from Image A or Image B partition multiboot
register is already setup to that location. When reset command is called
board is issuing soft reset which start SW at already used location (offset
of multiboot * 32k).
But board should continue to run from multiboot offset 0 (start of QSPI)
and call early bootloader every reboot that's why clear multiboot register
to 0 by default to go that route all the time.
Michal Simek [Wed, 29 May 2024 14:47:58 +0000 (16:47 +0200)]
arm64: versal2: Add support for AMD Versal Gen 2
Add support for AMD Versal Gen 2. SoC is based on Cortex-a78ae 4 cluster/2
cpu core each. A lot of IPs are shared with previous families. There are
couple of new IP blocks where the most interesting from user point of view
is UFS.
xilinx: versal: Do not prioritize boot device if driver is not enabled
SOC can boot out of the device which is not accessible from APU and running
this is detected as a warning, as the device is not accessible.For example
getting below warning when the boot mode is OSPI and OSPI is not enabled in
device tree.
Invalid bus 0 (err=-19)
Failed to initialize SPI flash at 0:0 (error -19)
Ignoring the prioritization of the boot device which driver is not enabled
and continue with the default boot_targets. Recommendation is to use custom
boot_targets via environment file as is done for example for Kria via
zynqmp_kria.env file.
Prasad Kummari [Wed, 8 May 2024 05:27:50 +0000 (10:57 +0530)]
mtd: spi-nor: Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash part
Added SPI_NOR_OCTAL_READ flag for Macronix mx66uw2g345gx0 2Gb(256MB)
NOR Flash memory. Initial testing was conducted on the Versal NET board
using SDR mode, which included basic erase, write, and read-back
operations.
Lukas Funke [Wed, 27 Mar 2024 12:11:53 +0000 (13:11 +0100)]
arm64: zynq(mp): Rename spl_board_init() to spl_soc_init()
Rename spl_board_init() to spl_soc_init(). SoC specific
implementation should be separated from board specific implementation
in order to be extended by board developers.
Lukas Funke [Wed, 27 Mar 2024 12:11:52 +0000 (13:11 +0100)]
spl: Introduce SoC specific init function
Some architectures use spl_board_init() in their SoC specific
implementation. Board developers should be able to add board specific
implementation via spl_board_init(). Hence, introduce a spl_soc_init()
method which is called right before spl_board_init() for SoC
specific implementation.
Kory Maincent [Wed, 29 May 2024 10:01:06 +0000 (12:01 +0200)]
xilinx: zynqmp: Allow multiboot environment write even in saved environment
Once the environment was saved, the current multiboot image information
became unreachable. When dealing with firmware updates, this information
is necessary alongside the saved environment to know the booted image.
Move the multiboot environment set operation before the saved environment
check to ensure this information is always available.
Simek, Michal [Thu, 18 Apr 2024 08:06:13 +0000 (20:06 -1200)]
sdhci: zynq: Fix tap delay for SD on Versal NET
I can't see any way how tap delays are setup on Versal NET platform because
xlnx,versal-8.9a compatible string is also used there but driver is not
letting to setup tap delays. Not sure if versal_iclk_phases[] is also valid
for Versal NET but the patch is made to investigate it.
Charlie Johnston [Wed, 10 Apr 2024 19:50:08 +0000 (12:50 -0700)]
board: zynqmp: Move zynqmp commands from board/ to arch/
The zynqmp cmds.c is currently tied to the board but the commands
contained within are more closely tied to the architecture. To
allow usage of those commands when the architecture is ZynqMP but
the board is not, this change moves the cmds into the arch/ tree.
The source file is renamed to zynqmp.c to reflect the command name
as well.
For getting it work above DT changes are required but also CONFIG_NVMEM
should be enabled. That's why enable it by default in generic defconfigs
to be able to use it directly by changing DT only.
Rasmus Villemoes [Tue, 28 May 2024 11:13:25 +0000 (13:13 +0200)]
powerpc: mpc85xx: remove dead watchdog-related code
Nothing in-tree calls watchdog_reset() anymore (that stopped two years
ago with the removal of the WATCHDOG_RESET macro). So that function is
dead code.
That was the only caller of reset_85xx_watchdog(), so that
can obviously also be removed.
Finally, init_85xx_watchdog() is/was also not called from anywhere, so
that can go away as well, which nicely also removes a bit of
arch-specific code from the generic watchdog.h header.
Rasmus Villemoes [Tue, 28 May 2024 11:13:24 +0000 (13:13 +0200)]
powerpc: mpc83xx: remove unused watchdog_reset() function
There is no longer any code in tree that calls a watchdog_reset()
function. The macro WATCHDOG_RESET, which used to emit a call to
watchdog_reset(), got removed two years ago.
Rasmus Villemoes [Tue, 28 May 2024 11:13:22 +0000 (13:13 +0200)]
sh4: move reset_cpu() from watchdog.c to cpu.c
The next patch will remove all the other code from watchdog.c, which
would leave just this function in there. It seems just as natural for
this function to be defined in cpu.c, allowing us to delete watchdog.c
completely.
Rasmus Villemoes [Tue, 28 May 2024 11:13:20 +0000 (13:13 +0200)]
wdt-uclass: watchdog_reset cleanup
watchdog_reset() is no longer called from anywhere, so we do not need
to define a dummy no-op function. Remove that definition, and update
references to say schedule() instead.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Stefan Roese <sr@denx.de>
Rasmus Villemoes [Tue, 28 May 2024 11:13:19 +0000 (13:13 +0200)]
m68k: remove dead code
There are no calls of "watchdog_reset()" anymore anywhere in the tree
since the WATCHDOG_RESET macro got removed in 942d07df0e79 ("watchdog:
Remove WATCHDOG_RESET macro").
The only places the identifiers watchdog_disable and watchdog_init are
called are in arch/arm/mach-omap2/, so those can obviously not refer
to these instances.
Hence these functions are not actually used at all and can be
removed. As a bonus, this also removes two leftover references to
WATCHDOG_RESET.
Cc: Huan Wang <alison.wang@nxp.com> Cc: Angelo Dureghello <angelo@kernel-space.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Stefan Roese <sr@denx.de>
Rasmus Villemoes [Tue, 21 May 2024 08:46:52 +0000 (10:46 +0200)]
cyclic: make clients embed a struct cyclic_info in their own data structure
There are of course not a whole lot of examples in-tree yet, but
before they appear, let's make this API change: Instead of separately
allocating a 'struct cyclic_info', make the users embed such an
instance in their own structure, and make the convention that the
callback simply receives the 'struct cyclic_info *', from which the
clients can get their own data using the container_of() macro.
This has a number of advantages.
First, it means cyclic_register() simply cannot fail, simplifying the
code. The necessary storage will simply be allocated automatically
when the client's own structure is allocated (often via
uclass_priv_auto or similar).
Second, code for which CONFIG_CYCLIC is just an option can more easily
be written without #ifdefs, if we just provide an empty struct
cyclic_info {}. For example, the nested CONFIG_IS_ENABLED()s in
https://lore.kernel.org/u-boot/20240316201416.211480-1-marek.vasut+renesas@mailbox.org/
are mostly due to the existence of the 'struct cyclic_info *' member
being guarded by #ifdef CONFIG_CYCLIC.
And we do probably want to avoid the extra memory overhead of that
member when !CONFIG_CYCLIC. But that is automatic if, instead of a
'struct cyclic_info *', one simply embeds a 'struct cyclic_info',
which will have size 0 when !CONFIG_CYCLIC. Also, the no-op
cyclic_register() function can just unconditionally be called, and the
compiler will see that (1) the callback is referenced, so not emit a
warning for a maybe-unused function and (2) see that it can actually
never be reached, so not emit any code for it.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Currently, the cyclic_register() done in wdt_start() is not undone in
wdt_stop(). Moreover, calling wdt_start multiple times (which is
perfectly allowed on an already started device, e.g. to change the
timeout value) will result in another struct cyclic_info being
registered, referring to the same watchdog device.
This can easily be seen on e.g. a wandboard:
=> cyclic list
function: watchdog@20bc000, cpu-time: 22 us, frequency: 1.01 times/s
=> wdt list
watchdog@20bc000 (imx_wdt)
=> wdt dev watchdog@20bc000
=> wdt start 50000
WDT: Started watchdog@20bc000 with servicing every 1000ms (50s timeout)
=> cyclic list
function: watchdog@20bc000, cpu-time: 37 us, frequency: 1.03 times/s
function: watchdog@20bc000, cpu-time: 241 us, frequency: 1.01 times/s
=> wdt start 12345
WDT: Started watchdog@20bc000 with servicing every 1000ms (12s timeout)
=> cyclic list
function: watchdog@20bc000, cpu-time: 36 us, frequency: 1.03 times/s
function: watchdog@20bc000, cpu-time: 100 us, frequency: 1.04 times/s
function: watchdog@20bc000, cpu-time: 299 us, frequency: 1.00 times/s
So properly unregister the watchdog device from the cyclic framework
in wdt_stop(). In wdt_start(), we cannot just skip the registration,
as the (new) timeout value may mean that we have to ask the cyclic
framework to call us more often. So if we're already running,
first unregister the old cyclic instance.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Rasmus Villemoes [Tue, 21 May 2024 08:46:50 +0000 (10:46 +0200)]
cyclic: stop strdup'ing name in cyclic_register()
We are not checking the return value of strdup(), nor
freeing the string in cyclic_unregister().
However, all current users either pass a string literal or the
dev->name of the client device. So in all cases the name string will
live at least as long as the cyclic_info is registered, so just make
that a requirement.
Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Add combined binaries for all Verdin AM62 variants.
These binaries can be used to flash the U-Boot via single
binary instead of few as it is done at the moment.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Tom Rini [Fri, 14 Jun 2024 16:42:50 +0000 (10:42 -0600)]
Merge patch series "introduce basic support for TI's am625-lp-sk"
Bryan Brattlof <bb@ti.com> says:
Hello Again Everyone!
The am625-lp-sk is a variant of the am625-sk showcasing the low-power
features of the am625 SoC Family. Because it's essentially a board and
package spin of the am625-sk I've inherited the am625 configuration and
overridden what was needed.
This is a new spin of Nitin's original work which has been updated
significantly since October 2023
This also works around a buildman issue not following #include
directives. To get around this I've redefined the variables it's looking
for inside the lp-sk defconfig to keep it happy for now. I made a pull
request on github and everything seems like it's happy
Tom Rini [Fri, 14 Jun 2024 16:40:26 +0000 (10:40 -0600)]
Merge patch series "arm: dts: am625/am62a7: Switch over to OF_UPSTREAM"
Nishanth Menon <nm@ti.com> says:
Cleanup am625 on by switching over the last two platforms (SK and
beagleplay) over to OF_UPSTREAM, and while at it, switch over am62a7
(last of the am62* family) over as well.
This superscedes the previous version of beagleplay only patch[1]
Dhruva Gole [Fri, 7 Jun 2024 08:56:41 +0000 (14:26 +0530)]
arm: dts: k3: binman: am62p: add support for signing TIFSStub images
Adds TIFS stub binaries, this is required for deepsleep functionality.
This implements the same change as commit 128f81290b7d ("arm: dts: k3:
binman: am625: add support for signing TIFSSTUB Images") did for TI AM62
SK board.
Dhruva Gole [Fri, 7 Jun 2024 08:56:40 +0000 (14:26 +0530)]
arm: dts: k3: binman: am62a: add support for signing TIFSStub Images
Add support for signing of TIFSSTUB images for HSSE, HSFS and GP devices
and include them in tispl.bin and tispl.bin_unsigned.
This implements the same change as commit 128f81290b7d ("arm: dts: k3:
binman: am625: add support for signing TIFSSTUB Images") did for TI AM62
SK board.
tools: Build mkeficapsule tool by default if EFI_LOADER is set
Trigger the building of the mkeficapsule tool if EFI_LOADER is enabled.
Previously it was triggered on EFI_CAPSULE_ON_DISK, but mkeficapsule is
needed when a capsule is being generated for a bootloader stage, not just
from the stage applying them. EFI_LOADER is a more accurate approximation
of when a capsule may need to be generated.
Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Bryan Brattlof [Fri, 7 Jun 2024 22:06:13 +0000 (17:06 -0500)]
configs: add defconfigs for the am625-lp-sk
The am62x-lp-sk is a package and reference board spin of the am62x-sk to
showcase the low-power features of the am62x SoC family. Because it so
closely resembles the am62x-sk board, use the preprocessor to inherit
its configuration making the needed changes for this board where
necessary.
Nishanth Menon [Wed, 5 Jun 2024 15:27:52 +0000 (10:27 -0500)]
arm: dts: am62a7_sk: Switch to OF_UPSTREAM
Enable OF_UPSTREAM for am62a7-sk board. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.10-rc1).
Nishanth Menon [Wed, 5 Jun 2024 15:27:51 +0000 (10:27 -0500)]
arm: dts: am625_sk: Switch to OF_UPSTREAM
Enable OF_UPSTREAM for am625-sk board. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.10-rc1).
Nishanth Menon [Wed, 5 Jun 2024 15:27:50 +0000 (10:27 -0500)]
arm: dts: am625_beagleplay: Switch to OF_UPSTREAM
Enable OF_UPSTREAM for AM625-beagleplay board. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.10-rc1).
Tom Rini [Wed, 5 Jun 2024 01:37:42 +0000 (19:37 -0600)]
block: Update BLK to be def_bool
At this point in the DM migration, all platforms enable DM. BLK requires
DM. Make BLK "def_bool y" in the cases it had been "default y" to make
this clearer. Now remove the symbol requirement from other places as it
is redundant here.
Tom Rini [Wed, 5 Jun 2024 01:37:40 +0000 (19:37 -0600)]
efi_loader: select BLK not depends on BLK
The BLK symbol is used both for "we have a block device subsystem
enabled" and "we need to utilize the block device library functions". In
the case of efi_loader, it is the case of "we need to utilize the block
device library", so select rather than depends on it. In turn, also
disable EFI_LOADER on platforms which did not have it on previously due
to a lack of block devices. They can enable it themselves if desired.
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
Heiko Stuebner [Mon, 10 Jun 2024 13:13:37 +0000 (15:13 +0200)]
arm64: dts: rockchip: add dual-role usb3 hosts to rk3588 Tiger-Haikou
Apart from the host-only usb3 controller (host2) the rk3588 also provides
two dual-role controllers. On the Tiger-Haikou combination these are
connected to the lower usb3-host port in host-only mode and the micro-usb3
port for dual-role operation.
Add the necessary controllers, phys to the Tiger-Haikou board and enable
the usb-id extcon.
Heiko Stuebner [Mon, 10 Jun 2024 13:13:36 +0000 (15:13 +0200)]
arm64: dts: rockchip: add usb-id extcon on rk3588 tiger
The Q7 standard specifies a usb-id pin on the connector to distiuish
between host and device mode. Model this via the usb-id extcon binding.
While the pin is part of the Q7 standard, so part of the module, the
extcon stays disabled in the som dtsi and will only be enabled in a
baseboard using it.
Heiko Stuebner [Mon, 10 Jun 2024 13:13:32 +0000 (15:13 +0200)]
arm64: dts: rockchip: move uart2 pinmux to dtsi on rk3588-tiger
The association of uart2 to the q7-uart pins is part of the module
itself and not the baseboard used. Therefore move the pinctrl over
to the tiger dtsi.
Quentin Schulz [Thu, 6 Jun 2024 08:45:36 +0000 (10:45 +0200)]
rockchip: ringneck-px30: fix TPL_MAX_SIZE
Ringneck was mistakenly set to allow up to 128KiB for the TPL code size
while PX30 SoC only has 16KiB of SRAM.
Therefore, let's use the default value of TPL_MAX_SIZE from the SoC
(which is 10KiB) so that the max code size is actually checked and
useful.
Fixes: c925be73a0a8 ("rockchip: add support for PX30 Ringneck SoM on Haikou Devkit") Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Quentin Schulz [Thu, 6 Jun 2024 08:45:35 +0000 (10:45 +0200)]
power: rk8xx: properly print all supported PMICs name
The ID of the PMIC is stored in the 2 16b registers but the only part
that matters right now is the 3 MSB, which make the 3 digits (in hex) of
the part number.
Right now, only RK808 was properly displayed, with this all currently
supported PMICs should display the proper part number.
Additionally, when the PMIC variant is not found, print that value
instead of the masked unshifted value as all PMICs we support for now
have their LSB ignored to represent the actual part number.
Tested on RK806 (RK3588 Jaguar), RK808 (RK3399 Puma) and RK809 (PX30
Ringneck).
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
On px30-ringneck the FIT payload is located at sector 0x200 compared to
the more Rockchip common sector 0x4000 offset:
SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
Because FIT payload is located at sector 0x200 and the TPL+SPL is
located at sector 64, the combined size of TPL+SPL cannot take up more
than 224KiB:
(0x200 - 64) x 512 = 0x38000 (224 KiB)
Adjust SPL_PAD_TO to match the used 0x200 sector offset.
While at it, update the px30-ringneck-u-boot.dtsi to remove the now
unnecessary override of simple-bin:fit:offset since SPL_PAD_TO matches
with the current formula.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Since commit 6007b69d544e ("rockchip: rk3399-puma: Update SPL_PAD_TO
Kconfig option"), SPL_PAD_TO matches
(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512 and the default
value for simple-bin:fit:offset in rockchip-u-boot.dtsi is
SPL_PAD_TO, so let's remove this override.
Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Jianfeng Liu [Tue, 28 May 2024 17:04:06 +0000 (01:04 +0800)]
board: rockchip: add ArmSoM Sige7 Rk3588 board
ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by
ArmSoM.
There are two variants depending on the DRAM size : 8G and 16G.
Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16GB memory LPDDR4x
Mali G610MC4 GPU
2x MIPI CSI 2 multiple lanes connector
64GB/128GB on board eMMC
uSD slot
1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
1x HDMI 2.1 output
2x 2.5 Gbps Ethernet port
40-pin IO header including UART, SPI and I2C
USB PD over USB Type-C
Size: 92mm x 62mm
Niklas Cassel [Tue, 28 May 2024 17:04:03 +0000 (01:04 +0800)]
arm64: dts: rockchip: add rk3588 pcie and php IOMMUs
The mmu600_pcie is connected with the five PCIe controllers.
The mmu600_php is connected with the USB3 controller, the GMAC
controllers, and the SATA controllers.
See 8.2 Block Diagram, in rk3588 TRM (Technical Reference Manual).
The IOMMUs are disabled by default, as further patches are needed to
program the SID/SSIDs in to the IOMMUs.
Additionally, the IOMMU correctly triggers an IOMMU fault when
a PCIe device performs a write (since the device hasn't been
assigned a SID/SSID):
arm-smmu-v3 fc900000.iommu: event 0x02 received:
arm-smmu-v3 fc900000.iommu: 0x0000010000000002
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
arm-smmu-v3 fc900000.iommu: 0x0000000000000000
While this doesn't provide much value as is, having the devices as
disabled in the device tree will allow developers to see that the rk3588
actually has IOMMUs on the SoC.
(cherry picked from commit ea9a34aa0d786cbf4b87f1ba528e69b07219738f) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit c7ed588e14f7dd04a92fb55f12680f94c7b14edf) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 5110caca9865718616cf7093ed4a9a1bc54780db) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit f6835a60a8a28ff14ffb3dd80c99ce1c137d06c5) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 5a3e4638492497ae81b9bd4a8627f4727e312ccc) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit bbf7c16f2f1208b96349f6f6648b69cfaa1a482b) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 3cd15354ea0c8668812bc0b3a4136606c10803e9) Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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