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4 years agopci: pci-uclass: Check validity of ofnode
Suneel Garapati [Tue, 5 May 2020 04:25:25 +0000 (21:25 -0700)]
pci: pci-uclass: Check validity of ofnode

Add check if the referenced ofnode is valid.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
4 years agopci: pci-uclass: Add support for Alternate-RoutingID capability
Suneel Garapati [Thu, 24 Oct 2019 01:40:36 +0000 (18:40 -0700)]
pci: pci-uclass: Add support for Alternate-RoutingID capability

If ARI capability is found on device, use it to update next function
number in bus scan and also helps to skip unnecessary bdf scans.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
4 years agopci: pci-uclass: Add VF BAR map support for Enhanced Allocation
Suneel Garapati [Sat, 19 Oct 2019 23:34:16 +0000 (16:34 -0700)]
pci: pci-uclass: Add VF BAR map support for Enhanced Allocation

Makes dm_pci_map_bar API available to map BAR for Virtual function
PCI devices which support Enhanced Allocation.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
4 years agopci: pci-uclass: Add support for Single-Root I/O Virtualization
Suneel Garapati [Sat, 19 Oct 2019 23:07:20 +0000 (16:07 -0700)]
pci: pci-uclass: Add support for Single-Root I/O Virtualization

SR-IOV - Single Root I/O Virtualization
PF - Physical Function VF - Virtual Function

If SR-IOV capability is present, use it to initialize Virtual Function
PCI device instances. pci_sriov_init function will read SR-IOV
registers to create VF devices under the PF PCI device and also bind
driver if available. This function needs to be invoked from Physical
function device driver which expects VF device support, creating
minimal impact on existing framework.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
4 years agopci: pci-uclass: Add support for Enhanced Allocation in Bridges
Suneel Garapati [Sat, 19 Oct 2019 22:52:32 +0000 (15:52 -0700)]
pci: pci-uclass: Add support for Enhanced Allocation in Bridges

If Enhanced Allocation capability is present in bridges, use it
to read the fixed sub-ordinate bus number.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
4 years agopci: pci-uclass: Add multi entry support for memory regions
Suneel Garapati [Sun, 20 Oct 2019 00:10:20 +0000 (17:10 -0700)]
pci: pci-uclass: Add multi entry support for memory regions

Enable PCI memory regions in ranges property to be of multiple entry.
This helps to add support for SoC's like OcteonTX/TX2 where every
peripheral is on PCI bus.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
4 years agopci: pci-uclass: Make DT subnode parse optional
Suneel Garapati [Sat, 19 Oct 2019 23:02:48 +0000 (16:02 -0700)]
pci: pci-uclass: Make DT subnode parse optional

Parse subnode DT properties only if parent node is valid.
Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode
from dev_for_each_subnode.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
4 years agopci: pci-uclass: Fix incorrect argument in map_physmem
Suneel Garapati [Sat, 19 Oct 2019 23:44:35 +0000 (16:44 -0700)]
pci: pci-uclass: Fix incorrect argument in map_physmem

Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar().
Additinally minor spelling correction.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
4 years agopci: pci-uclass: Dynamically allocate the PCI regions
Stefan Roese [Thu, 23 Jul 2020 14:34:10 +0000 (16:34 +0200)]
pci: pci-uclass: Dynamically allocate the PCI regions

Instead of using a fixed length pre-allocated array of regions, this
patch moves to dynamically allocating the regions based on the number
of available regions plus the necessary regions for DRAM banks.

Since MAX_PCI_REGIONS is not needed any more, its removed completely
with this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
4 years agoARM: renesas: Drop unnecessary function ft_board_setup()
Stefan Roese [Thu, 6 Aug 2020 15:49:49 +0000 (17:49 +0200)]
ARM: renesas: Drop unnecessary function ft_board_setup()

Marek explained on IRC, that ft_board_setup() is not used / necessary
at all. So its best to just drop it completely, as it interferes with
the cleanup of CONFIG_MAX_PCI_REGIONS (completely removed).

Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set
Stefan Roese [Thu, 23 Jul 2020 14:26:07 +0000 (16:26 +0200)]
pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set

Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for
all boards. Hence we can remove the conditional compilation and the code
path that will never get compiled.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
4 years agodm: core: Add API to read PCI bus-range property
Stefan Roese [Wed, 5 Aug 2020 11:56:11 +0000 (13:56 +0200)]
dm: core: Add API to read PCI bus-range property

Add dev_read_pci_bus_range() to read bus-range property values

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agofdtdec: Add API to read pci bus-range property
Suneel Garapati [Sat, 19 Oct 2019 22:19:35 +0000 (15:19 -0700)]
fdtdec: Add API to read pci bus-range property

Add fdtdec_get_pci_bus_range to read bus-range property
values.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoMerge tag 'u-boot-clk-24Aug2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk
Tom Rini [Mon, 24 Aug 2020 13:06:02 +0000 (09:06 -0400)]
Merge tag 'u-boot-clk-24Aug2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk

- Add CCF clocks definitions for iMX6Q enet (ETH)
- Several fixes for CCF framework - the most notable is the one, which
  adds get_rate helper to clk-mux.c
- Improvements for clk command - better visibility and alignment.

4 years agoclk: ccf: Add missing #include <dm/uclass.h> to clk-mux.c
Lukasz Majewski [Mon, 24 Aug 2020 09:12:18 +0000 (11:12 +0200)]
clk: ccf: Add missing #include <dm/uclass.h> to clk-mux.c

After adding custom get_rate helper function it was necessary to include
<dm/uclass.h> to avoid warnings about missing uclass_get_device_by_name.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Series-to: u-boot
4 years agocmd: clk: correctly handle depth for clk dump
Patrick Delaunay [Thu, 30 Jul 2020 12:04:10 +0000 (14:04 +0200)]
cmd: clk: correctly handle depth for clk dump

Update depth only when clock uclass is found to have correct display
of command "clk dump".

Without this patch, the displayed depth is the binding depth for
all the uclass and that can be strange as only clock uclass nodes
are displayed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocmd: clk: cosmetic: correct code alignment in show_clks
Patrick Delaunay [Thu, 30 Jul 2020 12:04:09 +0000 (14:04 +0200)]
cmd: clk: cosmetic: correct code alignment in show_clks

Correct code alignment in show_clks() function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoclk: ccf: mux: change the get_rate helper
Dario Binacchi [Wed, 3 Jun 2020 13:36:25 +0000 (15:36 +0200)]
clk: ccf: mux: change the get_rate helper

The previous version of the get_rate helper does not work if the mux
clock parent is changed after the probe. This error has not been
detected because this condition has not been tested. The error occurs
because the set_parent helper does not change the parent of the clock
device but only the clock selection register. Since changing the parent
of a probed device can be tricky, the new version of the get_rate helper
provides the rate of the selected clock and not that of the parent.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
4 years agoclk: ccf: mux: fix access to the sandbox register
Dario Binacchi [Sat, 2 May 2020 15:58:33 +0000 (17:58 +0200)]
clk: ccf: mux: fix access to the sandbox register

The tests developed for the mux clock are run on the sandbox. They don't
call the clk_mux_set_parent routine and therefore they do not detect
this error.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
4 years agoclk: ccf: mux: fix typo
Dario Binacchi [Sat, 2 May 2020 15:58:32 +0000 (17:58 +0200)]
clk: ccf: mux: fix typo

Close the opening bracket.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
4 years agoclk: ccf: mux: change include order
Dario Binacchi [Sat, 2 May 2020 15:58:31 +0000 (17:58 +0200)]
clk: ccf: mux: change include order

Apply u-boot coding style on include files order.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
4 years agoclk: fix the console output of clk_register
Dario Binacchi [Sat, 2 May 2020 15:38:11 +0000 (17:38 +0200)]
clk: fix the console output of clk_register

The parent->name variable can be used only in case the
uclass_get_device_by_name routine returns successfully.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
4 years agoclk: set flags in the ccf registration routines
Dario Binacchi [Mon, 13 Apr 2020 12:36:27 +0000 (14:36 +0200)]
clk: set flags in the ccf registration routines

The top-level framework flags are passed as parameter to the common
clock framework (ccf) registration routines without being used.
Checks of the flags setting added by the patch have been added in the
ccf test.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
4 years agodm: test: clk: add the test for the ccf gated clock
Dario Binacchi [Mon, 13 Apr 2020 12:36:26 +0000 (14:36 +0200)]
dm: test: clk: add the test for the ccf gated clock

Unlike the other clock types, in the case of the gated clock, a new
driver has been developed which does not use the registering routine
provided by the common clock framework.
The addition of the ecspi0 clock to sandbox therefore allows testing
the ccf gate clock.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoclk: imx6: Add definition for IMX6QDL_CLK_ENET_REF clock
Lukasz Majewski [Mon, 24 Feb 2020 13:55:26 +0000 (14:55 +0100)]
clk: imx6: Add definition for IMX6QDL_CLK_ENET_REF clock

After commit 673f6597321d ("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF need
to provide PTP clock.

On the i.MX6Q this clock is provided with IMX6QDL_CLK_ENET_REF in the Linux
kernel's CCF.

Code in this change models the simplest case when enet reference clock is
generated from 'osc' clock.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
4 years agoclk: imx: Add support for pllv3 enet clock
Lukasz Majewski [Mon, 24 Feb 2020 13:55:25 +0000 (14:55 +0100)]
clk: imx: Add support for pllv3 enet clock

This code has been ported from Linux kernel v5.5.5 (tag) and has been
adjusted to U-Boot's DM.

It adds support for correct recognition of IMX_PLLV3_ENET flag in the
clk-pllv3.c driver.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
4 years agoclk: imx6: Add definition for IMX6QDL_CLK_ENET clock
Lukasz Majewski [Mon, 24 Feb 2020 13:55:24 +0000 (14:55 +0100)]
clk: imx6: Add definition for IMX6QDL_CLK_ENET clock

After commit 673f6597321d ("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF
need to provide IMX6QDL_CLK_ENET.

This change defines the missing clock in i.MX6Q's CCF.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
4 years agoclk: ICS8N3QV01 remove superfluous code
Heinrich Schuchardt [Sat, 15 Feb 2020 20:27:38 +0000 (21:27 +0100)]
clk: ICS8N3QV01 remove superfluous code

Do not calculate a unused value of n which is overwritten in both branches
of the subsequent if statement.

Identified by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
4 years agoMerge tag 'dm-pull-22aug20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
Tom Rini [Sun, 23 Aug 2020 20:06:38 +0000 (16:06 -0400)]
Merge tag 'dm-pull-22aug20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

replace devfdt_get_addr_ptr() with dev_read_addr_ptr()
binman fixes for portage
various minor fixes
'bind' command improvements

4 years agoMerge branch '2020-08-21-stdio-cleanup'
Tom Rini [Sun, 23 Aug 2020 19:53:10 +0000 (15:53 -0400)]
Merge branch '2020-08-21-stdio-cleanup'

- Clean up common/stdio.c and migrate some related options to Kconfig

4 years agostdio: Tidy up the coding style
Simon Glass [Tue, 11 Aug 2020 17:23:41 +0000 (11:23 -0600)]
stdio: Tidy up the coding style

Bring the coding style in this file up to the current level.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agostdio: Drop brackets around &devs.list
Simon Glass [Tue, 11 Aug 2020 17:23:40 +0000 (11:23 -0600)]
stdio: Drop brackets around &devs.list

These brackets are not needed. Drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agostdio: Update to use compiler for Kconfig checks
Simon Glass [Tue, 11 Aug 2020 17:23:39 +0000 (11:23 -0600)]
stdio: Update to use compiler for Kconfig checks

Drop use of the preprocessor where possible.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agostdio: Drop #ifdefs in the header file
Simon Glass [Tue, 11 Aug 2020 17:23:38 +0000 (11:23 -0600)]
stdio: Drop #ifdefs in the header file

These prevent the use of IS_ENABLED() and are unnecessary. Drop them and
fix a few code-style nits nearby.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agostdio: Tidy up use of CONFIG_SYS_DEVICE_NULLDEV
Simon Glass [Tue, 11 Aug 2020 17:23:37 +0000 (11:23 -0600)]
stdio: Tidy up use of CONFIG_SYS_DEVICE_NULLDEV

Now that this is in Kconfig we can move the logic at the top of the file
to Kconfig, and use if() instead of #if. Update the file with these
changes.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoConvert CONFIG_SYS_DEVICE_NULLDEV to Kconfig
Simon Glass [Tue, 11 Aug 2020 17:23:36 +0000 (11:23 -0600)]
Convert CONFIG_SYS_DEVICE_NULLDEV to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_DEVICE_NULLDEV

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoConvert CONFIG_SPLASH_SCREEN et al to Kconfig
Simon Glass [Tue, 11 Aug 2020 17:23:35 +0000 (11:23 -0600)]
Convert CONFIG_SPLASH_SCREEN et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SPLASH_SCREEN
   CONFIG_SPLASH_SCREEN_ALIGN
   CONFIG_SPLASHIMAGE_GUARD
   CONFIG_SPLASH_SOURCE

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agomoveconfig: Skip binary and ELF files
Simon Glass [Tue, 11 Aug 2020 17:23:34 +0000 (11:23 -0600)]
moveconfig: Skip binary and ELF files

Add a few more file extensions to the list of files that should not be
processed. This avoids unicode errors, for example.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoConvert CONFIG_NETCONSOLE to Kconfig
Tom Rini [Sun, 23 Aug 2020 17:06:36 +0000 (13:06 -0400)]
Convert CONFIG_NETCONSOLE to Kconfig

This converts the following to Kconfig:
   CONFIG_NETCONSOLE

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agosandbox: u-boot.lds: Remove bogus __bss_start symbol
Ovidiu Panait [Mon, 17 Aug 2020 18:27:51 +0000 (21:27 +0300)]
sandbox: u-boot.lds: Remove bogus __bss_start symbol

The sections described in the sandbox linker script are inserted before
data section via "INSERT BEFORE .data;". Running readelf -S on sandbox
u-boot binary shows that the bss section is located after the data
section:

  Section Headers:
  [Nr] Name              Type             Address           Offset
       Size              EntSize          Flags  Link  Info  Align
  ...
  [25] .u_boot_list      PROGBITS         000000000041d1c8  0021d1c8
       000000000000dd90  0000000000000000  WA       0     0     8
  [26] _u_boot_sandbox_g PROGBITS         000000000042af58  0022af58
       00000000000000a0  0000000000000000  WA       0     0     8
  [27] .data             PROGBITS         000000000042b000  0022b000
       000000000000f708  0000000000000000  WA       0     0     32
  [28] .bss              NOBITS           000000000043a720  0023a708
       0000000000018930  0000000000000000  WA       0     0     32

This means that the __bss_start assignment in the linker script is bogus,
as the actual bss section start is located elsewhere. Remove this
assignment, as the __bss_start symbol is not used on sandbox anyway.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
4 years agoboard_f: Remove dead code from init_func_i2c
Ovidiu Panait [Mon, 17 Aug 2020 18:27:50 +0000 (21:27 +0300)]
board_f: Remove dead code from init_func_i2c

Since commit 69153988a6f4 ("i2c: Finish dropping use of CONFIG_I2C_HARD")
init_func_i2c is wrapped only by "#if defined(CONFIG_SYS_I2C)". Because
of this, the second ifdef within becomes pointless:

 #if defined(CONFIG_SYS_I2C)
 static int init_func_i2c(void)
 <snip>
     #ifdef CONFIG_SYS_I2C
         ...
     #else
         ...
     #endif
 <snip>
 }
 #endif

Remove the dead #else preprocessor code.

Fixes: 69153988a6f ("i2c: Finish dropping use of CONFIG_I2C_HARD")
Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
4 years agobinman: Add a setup script for Python
Simon Glass [Wed, 5 Aug 2020 19:27:49 +0000 (13:27 -0600)]
binman: Add a setup script for Python

Allow binman to be installed by adding a suitable setup.py script.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodtoc: Add a setup script for Python
Simon Glass [Wed, 5 Aug 2020 19:27:48 +0000 (13:27 -0600)]
dtoc: Add a setup script for Python

Allow dtoc to be installed by adding a suitable setup.py script.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Correct some import statements
Simon Glass [Wed, 5 Aug 2020 19:27:47 +0000 (13:27 -0600)]
binman: Correct some import statements

Some of these were not converted when binman moved to use absolute paths.
Fix them.

Also drop the import of 'test' which is a directory, not a module.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Move GetEntryModules() to control
Simon Glass [Wed, 5 Aug 2020 19:27:46 +0000 (13:27 -0600)]
binman: Move GetEntryModules() to control

When binman is installed its main program is in a different directory
to its modules. This means that __file__ is different and we cannot use
it to obtain the path to etype/ from main.py

To fix this, move the function to the 'control' module, since it is
installed with all the other modules, including the etype/ directory.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agotreewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()
Masahiro Yamada [Tue, 4 Aug 2020 05:14:43 +0000 (14:14 +0900)]
treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()

When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To help this tedious work, this commit converts devfdt_get_addr_ptr()
to dev_read_addr_ptr() by coccinelle. I also removed redundant casts
because dev_read_addr_ptr() returns an opaque pointer.

To generate this commit, I ran the following semantic patch
excluding include/dm/.

  <smpl>
  @@
  type T;
  expression dev;
  @@
  -(T *)devfdt_get_addr_ptr(dev)
  +dev_read_addr_ptr(dev)
  @@
  expression dev;
  @@
  -devfdt_get_addr_ptr(dev)
  +dev_read_addr_ptr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoata: mvebu: use dev_read_addr() to get base address
Masahiro Yamada [Tue, 4 Aug 2020 05:14:42 +0000 (14:14 +0900)]
ata: mvebu: use dev_read_addr() to get base address

It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to ulong because you could use devfdt_get_addr() without casting.

Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agogpio: at91: use dev_read_addr() to get base address
Masahiro Yamada [Tue, 4 Aug 2020 05:14:41 +0000 (14:14 +0900)]
gpio: at91: use dev_read_addr() to get base address

It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to uint32 because you could use devfdt_get_addr() without casting.

Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotest: dm: Add test case for devfdt_get_addr_ptr
Ovidiu Panait [Mon, 3 Aug 2020 19:17:36 +0000 (22:17 +0300)]
test: dm: Add test case for devfdt_get_addr_ptr

Add flat tree test case to cover devfdt_get_addr_ptr function.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Fix devfdt_get_addr_ptr return value
Ovidiu Panait [Mon, 3 Aug 2020 19:17:35 +0000 (22:17 +0300)]
dm: core: Fix devfdt_get_addr_ptr return value

According to the description of devfdt_get_addr_ptr, this function should
return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE.

Fix this by making devfdt_get_addr_ptr return NULL on failure, as
described in the function comments. Also, update the drivers currently
checking (void *)FDT_ADDR_T_NONE to check for NULL.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodoc: add bind/unbind command documentation
Patrice Chotard [Tue, 28 Jul 2020 07:13:35 +0000 (09:13 +0200)]
doc: add bind/unbind command documentation

Add documentation in doc/drivel-model for the bind/unbind command.
Part of this documentation is extracted from original patch commit
message:
commit 49c752c93a78 ("cmd: Add bind/unbind commands to bind a device to a driver from the command line")

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotest/py: Update test_bind
Patrice Chotard [Tue, 28 Jul 2020 07:13:34 +0000 (09:13 +0200)]
test/py: Update test_bind

As bind-test is now binded at sandbox startup and no more by
test_bind.py, bind-test nodes are not located at the end of
"dm tree" output, but can be located everywhere in the tree, so
bind-test output could either be:

 simple_bus    0  [   ]   generic_simple_bus    |-- bind-test
 phy           0  [   ]   phy_sandbox           |   |-- bind-test-child1
 simple_bus    1  [   ]   generic_simple_bus    |   `-- bind-test-child2

or:

 simple_bus    5  [   ]   generic_simple_bus    `-- bind-test
 phy           2  [   ]   phy_sandbox               |-- bind-test-child1
 simple_bus    6  [   ]   generic_simple_bus        `-- bind-test-child2

in_tree() function need to be updated to take care of that change.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agosandbox: dts: Add compatible string for bind-test node
Patrice Chotard [Tue, 28 Jul 2020 07:13:33 +0000 (09:13 +0200)]
sandbox: dts: Add compatible string for bind-test node

Usage of lists_bind_fdt() in bind command imposes to add
a compatible string for bind-test node.

Others impacts are:
  - bind-test node is binded at sandbox start, so no need to bind it
    in test_bind_unbind_with_node() test.
  - As explained just above, after sandbox start, now a phy exist.
    In test/dm/phy.c, it was verified that a third phy didn't exist,
    now we must verified that a fourth phy doesn't exist.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agosandbox: phy: add driver_data for bind test cmd
Patrice Chotard [Tue, 28 Jul 2020 07:13:32 +0000 (09:13 +0200)]
sandbox: phy: add driver_data for bind test cmd

Add driver data to existing compatible string "sandbox,phy".
Add an additional compatible string without driver_data

This will verify that bind command parses, finds and passes the
correct driver data to device_bind_with_driver_data() by using
driver_data in the second sandbox_phy_ids table entry.
In sandbox_phy_bind() a check is added to validate driver_data
content.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocmd: bind: allow to bind driver with driver data
Patrice Chotard [Tue, 28 Jul 2020 07:13:31 +0000 (09:13 +0200)]
cmd: bind: allow to bind driver with driver data

Initial implementation invokes device_bind_with_driver_data()
with driver_data parameter equal to 0.
For driver with driver data, the bind command can't bind
correctly this driver or even worse causes data abort as shown below:

As example, for debug purpose on STM32MP1 platform, ethernet
(dwc_eth_qos.c) driver needed to be unbinded/binded.
This driver is using driver data:

static const struct udevice_id eqos_ids[] = {
    {
        .compatible = "nvidia,tegra186-eqos",
        .data = (ulong)&eqos_tegra186_config
    },
    {
        .compatible = "snps,dwmac-4.20a",
        .data = (ulong)&eqos_stm32_config
    },

    { }
};

After unbinding/binding this driver and probing it (with the dhcp command),
we got a prefetch abort as below:

STM32MP> unbind eth ethernet@5800a000
STM32MP> bind /soc/ethernet@5800a000 eth_eqos
STM32MP> dhcp
prefetch abort
pc : [<4310801c>]          lr : [<ffc8f4ad>]
reloc pc : [<035ba01c>]    lr : [<c01414ad>]
sp : fdaf19b0  ip : ffcea83c     fp : 00000001
r10: ffcfd4a0  r9 : fdaffed0     r8 : 00000000
r7 : ffcff304  r6 : fdc63220     r5 : 00000000  r4 : fdc5b108
r3 : 43108020  r2 : 00003d39     r1 : ffcea544  r0 : fdc63220
Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
Code: data abort
pc : [<ffc4f9c0>]          lr : [<ffc4f9ad>]
reloc pc : [<c01019c0>]    lr : [<c01019ad>]
sp : fdaf18b8  ip : 00000000     fp : 00000001
r10: ffcd69b2  r9 : fdaffed0     r8 : ffcd69aa
r7 : 00000000  r6 : 00000008     r5 : 4310801c  r4 : fffffffc
r3 : 00000001  r2 : 00000028     r1 : 00000000  r0 : 00000006
Flags: NzCv  IRQs on  FIQs on  Mode SVC_32 (T)
Code: 2f00 d1e9 2c00 dce9 (f855) 2024
Resetting CPU ...

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodm: fix ofnode_read_addr/size_cells()
Heinrich Schuchardt [Sat, 25 Jul 2020 19:38:49 +0000 (21:38 +0200)]
dm: fix ofnode_read_addr/size_cells()

In the case of the live tree ofnode_read_addr_cells() and
ofnode_read_size_cells() return the #address-cells and #size-cells defined
in the parent node. With the patch the same is done for a non-live tree.

The only consumer of these functions is currently the CFI flash driver.

This patch fixes the incorrect parsing of the device tree leading to
'saveenv' failing on qemu_arm64_defconfig.

For testing qemu-system-aarch64 has to be called with

    -drive if=pflash,format=raw,index=1,file=envstore.img

to provide the flash memory. envstore.img must be 64 MiB large.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agoMerge tag 'xilinx-for-v2020.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Thu, 20 Aug 2020 18:46:43 +0000 (14:46 -0400)]
Merge tag 'xilinx-for-v2020.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2020.10-rc3

- Fix fdtfile variable setup
- Fix bootm_*/fdt_high/initrd_high variables handling
- Fix Kconfig dependencies for Xilinx drivers
- Fix booting u-boot from lowest memory
- Fix firmware payload argument count for Versal
- Fix dfu configurations
- Fix mio_bank property handling
- Fix and align code around ID detection
- Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG
- Simplify logic around reading MAC from eeprom
- Decrease malloc length for zynqmp mini qspi
- Enable preboot for ZynqMP and Versal

i2c:
- Fix i2c eeprom partitions handling

mmc:
- Fix logic around HS mode enabling and use proper functions

4 years agoMerge branch '2020-08-19-mediatek-updates'
Tom Rini [Thu, 20 Aug 2020 12:38:10 +0000 (08:38 -0400)]
Merge branch '2020-08-19-mediatek-updates'

- Assorted updates for MediaTek platforms

4 years agoclk: versal: Move pm_query_id out of clock driver
Michal Simek [Thu, 23 Jul 2020 07:24:06 +0000 (09:24 +0200)]
clk: versal: Move pm_query_id out of clock driver

There is no reason to have firmware specific structure in clock driver.
Move it to generic location and also initialize enum values which is based
on https://lore.kernel.org/linux-arm-kernel/20200318125003.GA2727094@kroah.com/
recommended way to go to make sure that values guaranteed by compiler.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agommc: sdhci: Use upper/lower_32_bits macros
Michal Simek [Wed, 29 Jul 2020 13:42:26 +0000 (15:42 +0200)]
mmc: sdhci: Use upper/lower_32_bits macros

Instead of recasting and shifting use macros which are designed for taking
upper/lower 32bit value from 64bit variable.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agommc: sdhci: Enable high speed conditional on the corresponding bit
Faiz Abbas [Thu, 23 Jul 2020 04:12:19 +0000 (09:42 +0530)]
mmc: sdhci: Enable high speed conditional on the corresponding bit

The capabilities register has a field to indicate whether the host
supports high speed mode or not. Add high speed host_caps based on
this bit instead of enabling it by default.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Michal Simek <michal.simek@xilnx.com>
Tested-by: Michal Simek <michal.simek@xilnx.com>
(zcu104 with sdhci-caps-mask = <0 0x200000>;)

4 years agoxilinx: common: Change bootm_size variable setting
Michal Simek [Wed, 12 Aug 2020 10:17:53 +0000 (12:17 +0200)]
xilinx: common: Change bootm_size variable setting

Linux kernel for arm32 requires dtb and initrd to be placed in low memory
to work properly. This requirement is described in chapter 4b) and 5) in
Linux documentation (Documentation/arm/booting.rst).

There is an issue on arm32 with 2GB of memory that bootm_size is bigger
than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm
size on these systems not to be above 768MB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: common: Check return value from variable setup
Michal Simek [Wed, 12 Aug 2020 10:16:49 +0000 (12:16 +0200)]
xilinx: common: Check return value from variable setup

env_set..() can failed that's why check return status and report it back to
make sure that user is aware that's something went wrong.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: common: Get rid of initrd_high variable setup
Michal Simek [Wed, 12 Aug 2020 10:11:06 +0000 (12:11 +0200)]
xilinx: common: Get rid of initrd_high variable setup

When bootm_low/bootm_size are setup properly there is no need to setup any
initrd_high address. Location for initrd is determined through LMB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: common: Get rid of fdt_high variable
Michal Simek [Wed, 12 Aug 2020 10:04:50 +0000 (12:04 +0200)]
xilinx: common: Get rid of fdt_high variable

There is no need to setup this variable if bootm_low and bootm_size
variable are properly setup. If fdt_high variable is missing U-Boot is
asking LMB to return free memory which is not used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: Change logic around zynq_board_read_rom_ethaddr()
Michal Simek [Mon, 3 Aug 2020 10:59:28 +0000 (12:59 +0200)]
xilinx: Change logic around zynq_board_read_rom_ethaddr()

There is no reason to build private function when
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak
function which handles default case properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIG
Michal Simek [Tue, 28 Jul 2020 10:45:47 +0000 (12:45 +0200)]
xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIG

Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG to enable/disable updating
variables with run time information.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: versal: Enable i2c misc eeprom driver
Michal Simek [Mon, 3 Aug 2020 13:14:24 +0000 (15:14 +0200)]
xilinx: versal: Enable i2c misc eeprom driver

Enable this driver to be able to work with i2c based eeproms on Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: zynqmp: fix incorrect map not align with IPI HW
Ibai Erkiaga [Tue, 4 Aug 2020 22:17:32 +0000 (23:17 +0100)]
xilinx: zynqmp: fix incorrect map not align with IPI HW

Current IPI module register description is not align with IPI HW. The
registers with the wrong offset are not used so it does not cause real
issues. This patch aligns the register description.

Additionally comments added to explain why recv function does not check
any flag prior copying rx data.

Fixes: 660b0c77d816 ("mailbox: zynqmp: ipi mailbox driver")
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: zynqmp: remove chip_id function
Ibai Erkiaga [Tue, 4 Aug 2020 22:17:30 +0000 (23:17 +0100)]
xilinx: zynqmp: remove chip_id function

Remove chip_id function and integrate the firmware call in the
zynqmp_get_silicon_idcode_name function. The change avoids querying the
firmware twice and makes the code bit more clear.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: zynqmp: get chip ID at EL3
Ibai Erkiaga [Tue, 4 Aug 2020 22:17:29 +0000 (23:17 +0100)]
xilinx: zynqmp: get chip ID at EL3

Modify the board init function to allow getting the chip ID when U-Boot
proper is executed at EL3.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: zynqmp: get chip ID using firmware driver
Ibai Erkiaga [Tue, 4 Aug 2020 22:17:28 +0000 (23:17 +0100)]
xilinx: zynqmp: get chip ID using firmware driver

Current implementation for getting chip ID uses either raw access on EL3
or a SMC call to get the silicon information. Following change
simplifies the code using always the firmware driver.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: zynqmp: merge firmware calls for EL2 and EL3
Ibai Erkiaga [Tue, 4 Aug 2020 22:17:27 +0000 (23:17 +0100)]
xilinx: zynqmp: merge firmware calls for EL2 and EL3

This patch merges ZynqMP firmware calls under xilinx_pm_request in order
to make trainsparent the EL. Calls at EL3 are send through IPI messages
and EL2 through SMC calls.

The EL2 call uses fixed payload and arg size as the EL3 call. The
firmware is capable to handle PMUFW_PAYLOAD_ARG_CNT bytes but the
firmware API is limited by the SMC call size.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: zynqmp: synchronize firmware call return payload
Ibai Erkiaga [Tue, 4 Aug 2020 22:17:26 +0000 (23:17 +0100)]
xilinx: zynqmp: synchronize firmware call return payload

Removes duplicated definition of PAYLOAD_ARG_CNT and define it in the
firmware driver. Additionally fixes payload buffer declarations without
macro usage

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agommc: zynq: Fix default value for xlnx,mio-bank
Michal Simek [Wed, 22 Jul 2020 15:46:31 +0000 (17:46 +0200)]
mmc: zynq: Fix default value for xlnx,mio-bank

DT binding is saying that default value is 0 not -1 that's why fix it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
4 years agoxilinx: Fix xlnx,mio_bank property
Michal Simek [Wed, 22 Jul 2020 15:42:43 +0000 (17:42 +0200)]
xilinx: Fix xlnx,mio_bank property

s/xlnx,mio_bank/xlnx,mio-bank/g

DT binding is describing mio-bank not mio_bank that's why fix all DTSes and
also driver itself.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
4 years agoi2c: eeprom: Use reg property instead of offset and size
Michal Simek [Thu, 28 May 2020 09:48:55 +0000 (11:48 +0200)]
i2c: eeprom: Use reg property instead of offset and size

Remove adhoc dt binding for fixed-partition definition for i2c eeprom.
fixed-partition are using reg property instead of offset/size pair.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoxilinx: zynqmp: Enable DFU tftp support
Michal Simek [Wed, 15 Jul 2020 12:20:34 +0000 (14:20 +0200)]
xilinx: zynqmp: Enable DFU tftp support

Enable DFU tftp support for firmware update. Fill dfu_ram_tftp variable to
have command present for showing how to use it.

boot FIT image has been created from below fragment. Key part is that type
of image has to be firmware. Also based on experiment load property is
completely ignored and base addresses are taken from dfu_alt_info variable.

$ cat update_uboot.its
/dts-v1/;

/ {
description = "Automatic U-Boot update";
#address-cells = <1>;

images {
Image {
description = "Kernel";
data = /incbin/("/tftpboot/Image");
compression = "none";
arch = "arm64";
type = "firmware";
os = "linux";
load = <0x80000>;
entry = <0x80000>;
hash-1 {
algo = "sha1";
};
};
system.dtb {
description = "DTB";
data = /incbin/("/tftpboot/system.dtb");
compression = "none";
arch = "arm64";
type = "firmware";
load = <0>;
hash-1 {
algo = "sha1";
};
};
};
};

$ mkimage -f update_uboot.its /tftpboot/boot

When U-Boot starts get IP address and server IP.
dhcp
setenv serverip 192.168.0.105

And then run prepared command.
run dfu_ram_tftp

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: Align dfu ram with booti command
Michal Simek [Wed, 15 Jul 2020 13:43:52 +0000 (15:43 +0200)]
xilinx: Align dfu ram with booti command

Image should be loaded to 0x80000 address and not to $kernel_addr_r.
Also kernel_addr, fdt_addr and fdt_size in zynqmp case are not defined
that's why define it to be aligned with Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Reduce malloc memory for mini QSPI configuration
Ashok Reddy Soma [Mon, 6 Apr 2020 13:58:32 +0000 (07:58 -0600)]
arm64: zynqmp: Reduce malloc memory for mini QSPI configuration

Mini U-boot runs on lower foot print of 256KB OCM. Hence 8K memory
for malloc may not be required. Reduce it by 1.5K.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: versal: Use lowest memory for U-Boot
Michal Simek [Fri, 10 Jul 2020 10:42:09 +0000 (12:42 +0200)]
xilinx: versal: Use lowest memory for U-Boot

Find and use the lowest memory for Versal to make sure that we keep u-boot
as low as possible and never use memory above u-boot's maximum VA mapping.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agolib: fdt: Convert fdtdes_setup_mem..() to livetree API
Michal Simek [Fri, 10 Jul 2020 11:34:44 +0000 (13:34 +0200)]
lib: fdt: Convert fdtdes_setup_mem..() to livetree API

Convert fdtdec_setup_mem_size_base(), get_next_memory_node(),
fdtdec_setup_memory_banksize() and fdtdec_setup_mem_size_base_lowest() to
livetree API.

Tested on ZynqMP zcu104 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolib: fdt: Introduce fdtdec_setup_mem_size_base_lowest()
Michal Simek [Thu, 9 Jul 2020 12:09:52 +0000 (14:09 +0200)]
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest()

New function should be called from board dram_init() because it initialized
gd->ram_base/ram_size. It finds the lowest available memory.

On systems with multiple memory nodes finding out the first memory node by
fdtdec_setup_mem_size_base() is not enough because this memory can be above
actual U-Boot VA mapping. Currently only mapping till 39bit is supported
(Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove
non-full-va map code")).
If DT starts with the first memory node above 39bit address then system can
be unpredictable.

The function is available only when multiple memory bank support is
enabled.

Calling fdtdec_setup_memory_banksize() from dram_init() is not possible
because fdtdec_setup_memory_banksize() is saving dram information to bd
structure which is placed on stack but not initialized at this time. Also
stack is placed at location setup in dram_init().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoversal: fix versal PM ret payload size
Ibai Erkiaga [Wed, 1 Jul 2020 23:10:58 +0000 (00:10 +0100)]
versal: fix versal PM ret payload size

The PM return payload size is defined as 4 bytes for Versal arquitecture
while the PM calls implemented both in the Versal clock driver and
ZynqMP firmware driver expects 5 bytes length.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: versal: Add new versal loadpdi command
T Karthik Reddy [Wed, 24 Jun 2020 09:23:57 +0000 (03:23 -0600)]
xilinx: versal: Add new versal loadpdi command

Versal loadpdi command is used for loading secure & non-secure
pdi images.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoarm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB
Igor Lantsman [Wed, 24 Jun 2020 12:33:46 +0000 (14:33 +0200)]
arm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB

Origin function was calling strsep which replaced delimiter ',' by a null
byte ('\0'). Operation was done directly on FDT which ends up with the
following behavior:

ZynqMP>  printenv fdtfile
fdtfile=xilinx/zynqmp.dtb
ZynqMP> fdt addr $fdtcontroladdr
ZynqMP> fdt print / compatible
compatible = "xlnx", "zynqmp"

As is visible fdtfile was correctly composed but a null byte caused that
xlnx was separated from zynqmp.
This hasn't been spotted because in all Xilinx DTs there are at least 3
compatible string and only the first one was affected by this issue.
But for systems which only had one compatible string "xlnx,zynqmp" it was
causing an issue when U-Boot's DT was used by Linux kernel.

The patch removes strsep calling and strchr is called instead which just
locate the first char after deliminator ',' (variable called "name").
And using this pointer in fdtfile composing.

Fixes: 91d7e0c47f51 ("arm64: zynqmp: Create fdtfile from compatible string")
Reported-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: Enable preboot feature for ZynqMP and Versal
Michal Simek [Tue, 18 Aug 2020 12:15:01 +0000 (14:15 +0200)]
xilinx: Enable preboot feature for ZynqMP and Versal

Enable preboot functionality for ZynqMP and Versal platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agoxilinx: kconfig: Change Kconfig dependencies for Xilinx drivers
Michal Simek [Thu, 6 Aug 2020 13:18:36 +0000 (15:18 +0200)]
xilinx: kconfig: Change Kconfig dependencies for Xilinx drivers

Zynq/ZynqMP/Versal IPs should be possible to called also from Microblaze in
PL and vice versa. That's why change dependencies and do not limit enabling
just for some platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
4 years agoxilinx: Setup bootm variables
Michal Simek [Thu, 9 Jul 2020 13:57:56 +0000 (15:57 +0200)]
xilinx: Setup bootm variables

On system with PL DDR which is placed before PS DDR in DT
env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low
and bootm_size variables are taking by default gd->bd->bi_dram[0].start and
gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be
PS ddr and even can be memory above 39bit VA which is what U-Boot supports
now.
That's why setup bootm variables based on ram_base/ram_size setting to make
sure that boot images are placed to the same location as U-Boot is placed.
This location should be by default location where OS can boot from.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
4 years agodts: r64: add sata- and asm_sel nodes
Frank Wunderlich [Thu, 13 Aug 2020 08:20:48 +0000 (10:20 +0200)]
dts: r64: add sata- and asm_sel nodes

asm_sel is for switching between sata and pcie mode
on r64 there is GPIO90 connected to ASM1480 which
switches RX/TX pairs to PCIe/SATA connector
output-low means sata-controller is active

with 2020-10 now reg is also needed for the phy itself

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
4 years agoahci: mediatek: add ahci driver
Frank Wunderlich [Thu, 13 Aug 2020 08:20:47 +0000 (10:20 +0200)]
ahci: mediatek: add ahci driver

add AHCI driver ported from linux

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/ata/ahci_mtk.c

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
4 years agoreset: add basic reset controller for pciesys
Frank Wunderlich [Thu, 13 Aug 2020 08:20:46 +0000 (10:20 +0200)]
reset: add basic reset controller for pciesys

bind reset controller to pciesys

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
4 years agophy: mtk-tphy: add PHY_TYPE_SATA
Frank Wunderlich [Thu, 13 Aug 2020 08:20:45 +0000 (10:20 +0200)]
phy: mtk-tphy: add PHY_TYPE_SATA

add support for PHY_TYPE_SATA to Mediateks TPHY driver

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
4 years agoarm: dts: mt7622: add SATA reset constants
Frank Wunderlich [Thu, 13 Aug 2020 08:20:44 +0000 (10:20 +0200)]
arm: dts: mt7622: add SATA reset constants

add reset constants used for SATA to header file

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
4 years agoarm: dts: mt7622: add PCIe nodes for BananaPi-R64
Frank Wunderlich [Fri, 14 Aug 2020 07:10:17 +0000 (09:10 +0200)]
arm: dts: mt7622: add PCIe nodes for BananaPi-R64

this patch adds PCIe-Nodes for BananaPi R64

original nodes from Chuanjia Liu for mt7622-rfb

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
4 years agodts: r64: add r64 dts
Frank Wunderlich [Mon, 10 Aug 2020 14:45:46 +0000 (16:45 +0200)]
dts: r64: add r64 dts

add a separate DTS for BananaPi R64 because it has 1GB RAM and SATA-Support

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
4 years agoarm: dts: add watchdog-node for mt7622
Frank Wunderlich [Mon, 10 Aug 2020 14:45:45 +0000 (16:45 +0200)]
arm: dts: add watchdog-node for mt7622

adding a watchdog-node to mt7622 dtsi

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
4 years agoconfigs: mt7622: add PCIe controller related configs
Chuanjia Liu [Mon, 10 Aug 2020 08:17:12 +0000 (16:17 +0800)]
configs: mt7622: add PCIe controller related configs

Add PCIe command and related configs

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Signed-off-by: Henry Yen <henry.yen@mediatek.com>
4 years agoarm: dts: mediatek: add PCIe node for MT7622
Chuanjia Liu [Mon, 10 Aug 2020 08:17:11 +0000 (16:17 +0800)]
arm: dts: mediatek: add PCIe node for MT7622

This patch adds PCIe node in dts for Mediatek MT7622 Soc.

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Signed-off-by: Henry Yen <henry.yen@mediatek.com>
4 years agoPCI: mediatek: Add PCIe support for MT7622
Chuanjia Liu [Mon, 10 Aug 2020 08:17:10 +0000 (16:17 +0800)]
PCI: mediatek: Add PCIe support for MT7622

This patch adds PCIe support for the Mediatek MT7622 SOC.

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Signed-off-by: Henry Yen <henry.yen@mediatek.com>