Olliver Schinagl [Wed, 21 Nov 2018 18:05:31 +0000 (20:05 +0200)]
power: axp209: Limit inrush current for broken boards
Some boards feature a capacitance on LDO3's output that is too large,
causing inrush currents which as a result, shut down the AXP209. This
has been reported before, without knowing the actual cause.
A fix appeared to be done with
commit 0e6e34ac8dbb ("sunxi: Olimex A20 boards: Enable LDO3 and LDO4 regulators").
The description there is a bit misleading, the kernel does not hang
during AXP209 initialization, the PMIC shuts down, causing voltages to
drop and thus the whole system freezes.
While the AXP209 does have the ability to ramp up the voltage slowly, to
reduce these inrush currents, the voltage rate control (VRC) however is
not applicable when switching on the LDO3 output. Only when going from
an enabled lower voltage setting, to a higher voltage setting is the VRC
in effect.
To work around this problem, we set LDO3 to the lowest possible setting
of 0.7 V if it was not yet enabled, and then let the VRC (if enabled) do
its thing. It should be noted, that for some undocumented reason, there
is a short delay needed between setting the LDO3 voltage register and
enabling the power. One would expect that this delay ought to be just
after enabling the output power at 0.7 V, but this did not work.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Olliver Schinagl [Wed, 21 Nov 2018 18:05:30 +0000 (20:05 +0200)]
power: axp209: Add support for voltage rate control on LDO3
The AXP209 LDO3 regulator supports voltage rate control, or can set a
slew rate.
This allows for the power to gradually rise up to the desired voltage,
instead of spiking up as fast as possible. Reason to have this can be
to reduce the inrush currents for example.
There are 3 slopes to choose from, the default, 'none' is a voltage rise
of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise.
In ideal world (where vendors follow the recommended design guidelines)
this setting should not be enabled by default. Unless of course AXP209
crashes instead of reporting overcurrent condition as it normally should
do in this case.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Olliver Schinagl [Wed, 21 Nov 2018 18:05:26 +0000 (20:05 +0200)]
sunxi: pmic_bus: Decrease boot time by not writing duplicate data
When we clear a pmic_bus bit, we do a read-modify-write operation.
We waste some time however, by writing back the exact samea value
that was already set in the chip. Let us thus only do the write
in case data was changed.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Priit Laes <plaes@plaes.org> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tom Rini [Thu, 6 Dec 2018 15:15:08 +0000 (10:15 -0500)]
Merge tag 'for-master-20181206' of git://git.denx.de/u-boot-rockchip
- Changes the declaration of regs_phy in dwc2-otg to uintptr_t
to ensure it can be cast to void* for use with writel().
- Add the Rock960 and Ficus boards.
Add board support for Ficus EE board from Vamrs. This board utilizes
common Rock960 family support.
Following peripherals are tested and known to work:
* Gigabit Ethernet
* USB 2.0
* MMC
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
[Reworked based on common Rock960 family support] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
rockchip: rk3399: Add common Rock960 family from Vamrs
Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
96Boards.
Below are some of the key differences between both Rock960 and Ficus
boards:
1. Different host enable GPIO for USB
2. Different power and reset GPIO for PCI-E
3. No Ethernet port on Rock960
The common board support will be utilized by both boards. The device
tree has been organized in such a way that only the properties which
differ between both boards are placed in the board specific dts and
the reset of the nodes are placed in common dtsi file.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[Added instructions for SD card boot] Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
arm64: dts: rockchip: add some common pin-settings to rk3399
Those pins would be used by many boards.
Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Thu, 6 Dec 2018 00:26:39 +0000 (01:26 +0100)]
usb: dwc2-otg: make regs_phy (in platdata) a uintptr_t
The regs_phy field of the platform data structure for dwc2-otg is
today declared an unsigned int, but will eventually be cast into a
void* for a writel operation. This triggers errors on modern GCC
versions.
E.g. we get the following error with GCC 6.3:
drivers/usb/phy/rockchip_usb2_phy.c: In function 'property_enable':
arch/arm/include/asm/io.h:49:29: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
^
arch/arm/include/asm/io.h:117:48: note: in expansion of macro '__arch_putl'
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
^~~~~~~~~~~
drivers/usb/phy/rockchip_usb2_phy.c:61:2: note: in expansion of macro 'writel'
writel(val, pdata->regs_phy + reg->offset);
^~~~~~
This commit changes regs_phy to be a uintptr_t to ensure that it is
large enough to hold any valid pointer (and fix the associated
warning).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Boris Brezillon [Sun, 2 Dec 2018 09:54:32 +0000 (10:54 +0100)]
mtd: sf: Make sf_mtd.c more robust
SPI flash based MTD devs can be registered/unregistered at any time
through the sf probe command or the spi_flash_free() function.
This commit does not try to fix the root cause as it would probably
require rewriting most of the code and have an mtd_info object
instance per spi_flash object (not to mention that the the spi-flash
layer is likely to be replaced by a spi-nor layer ported from Linux).
Instead, we try to be as safe as can be by checking the code returned
by del_mtd_device() and complain loudly when there's nothing we can
do about the deregistration failure. When that happens we also reset
sf_mtd_info.priv to NULL, and check for NULL pointer in the mtd hooks
so that -ENODEV is returned instead of hitting a NULL pointer
dereference exception when the MTD instance is later accessed by a user.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
Boris Brezillon [Sun, 2 Dec 2018 09:54:31 +0000 (10:54 +0100)]
mtd: sf: Unregister the MTD device prior to removing the spi_flash obj
The DM implementation of spi_flash_free() does not unregister the MTD
device before removing the spi dev object. This leads to a use-after-free
bug when the MTD device is later accessed by a MTD user (observed when
attaching the device to UBI after env_sf_load() has called
spi_flash_free()).
Implement ->remove() and call spi_flash_mtd_unregister() from there.
Fixes: 9fe6d8716e09 ("mtd, spi: Add MTD layer driver") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Sun, 2 Dec 2018 09:54:30 +0000 (10:54 +0100)]
mtd: Don't stop MTD partition creation when it fails on one device
MTD partition creation code is a bit tricky. It tries to figure out
when things have changed (either MTD dev list or mtdparts/mtdids vars)
and when that happens it first deletes all the partitions that had been
previously created and then creates the new ones based on the new
mtdparts/mtdids values.
But before deleting the old partitions, it ensures that none of the
currently registered parts are being used and bails out when that's
not the case. So, we end up in a situation where, if at least one MTD
dev has one of its partitions used by someone (UBI for instance), the
partitions update logic no longer works for other devs.
Rework the code to relax the logic and allow updates of MTD parts on
devices that are not being used (we still refuse to updates parts on
devices who have at least one of their partitions used by someone).
Boris Brezillon [Sun, 2 Dec 2018 09:54:29 +0000 (10:54 +0100)]
mtd: Make sure we don't parse MTD partitions belonging to another dev
The mtdparts variable might contain partition definitions for several
MTD devices. Each partition layout is separated by a ';', so let's
make sure we don't pick a wrong name when mtdparts is malformed.
Boris Brezillon [Sun, 2 Dec 2018 09:54:26 +0000 (10:54 +0100)]
mtd: Use get_mtdids() instead of env_get("mtdids") in mtd_search_alternate_name()
The environment is not guaranteed to contain a valid mtdids variable
when called from mtd_search_alternate_name(). Call get_mtdids() instead
of env_get("mtdids").
Fixes: ff4afa8a981e ("mtd: uboot: search for an equivalent MTD name with the mtdids") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
Boris Brezillon [Sun, 2 Dec 2018 09:54:25 +0000 (10:54 +0100)]
mtd: sf: Make sure we don't register the same device twice
spi_flash_mtd_register() can be called several times and each time it
will register the same mtd_info instance like if it was a new one.
The MTD ID allocation gets crazy when that happens, so let's track the
status of the sf_mtd_info object to avoid that.
Fixes: 9fe6d8716e09 ("mtd, spi: Add MTD layer driver") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Sun, 2 Dec 2018 09:54:22 +0000 (10:54 +0100)]
mtd: Add a function to report when the MTD dev list has been updated
We need to parse mtdparts/mtids again everytime a device has been
added/removed from the MTD list, but there's currently no way to know
when such an update has been done.
Add an ->updated field to the idr struct that we set to true every time
a device is added/removed and expose a function returning the value
of this field and resetting it to false.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Heiko Schocher <hs@denx.de>
Andy Shevchenko [Tue, 20 Nov 2018 21:52:33 +0000 (23:52 +0200)]
dm: serial: Introduce ->getinfo() callback
New callback will give a necessary information to fill up ACPI SPCR table,
for example. Maybe used later for other purposes.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Change ADR_SPACE_SYSTEM_IO to SERIAL_ADDRESS_SPACE_IO to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org>
Andy Shevchenko [Tue, 20 Nov 2018 21:52:32 +0000 (23:52 +0200)]
dm: serial: Add ->getconfig() callback
In some cases it would be good to know the settings, such as parity,
of current serial console. One example might be an ACPI SPCR table
to generate using these parameters.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Thu, 15 Nov 2018 12:45:31 +0000 (13:45 +0100)]
power: regulator: denied disable on always-on regulator
Don't disable regulator which are tagged as "regulator-always-on" in DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jack Mitchell <jack@embed.me.uk> Tested-by: Jack Mitchell <jack@embed.me.uk> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Richard Röjfors <richard@puffinpack.se> Tested-by: Richard Röjfors <richard@puffinpack.se> Reviewed-by: Felix Brack <fb@ltec.ch> Tested-by: Felix Brack <fb@ltec.ch>
dm: core: add functions to get/remap I/O addresses by name
This functions allow us to get and remap I/O addresses by name, which is useful when there are multiple reg addresses indexed by reg-names property.
This is needed in bmips dma/eth patch series, but can also be used on many
other drivers.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich [Sun, 25 Nov 2018 18:38:54 +0000 (19:38 +0100)]
dm: (re)sort uclass ids alphabetically
The comment in uclass-id.h states that
"U-Boot uclasses start here - in alphabetical order"
but the subsequent list is not sorted alphabetically.
This reestablishes order.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Notice that the first pattern has dashes throughout, while the second has
dashes throughout except just before the target architecture which has an
underscore.
The "dash throughout" versions from kernel.org are:
8.1.0, 6.4.0, 5.5.0, 4.9.4, 4.8.5, 4.6.1
while the "dash and underscore" versions from kernel.org are:
This tweak allows the code to handle both versions. Note that this tweak also
causes the architecture parsing to get confused and find the following two
bogus architectures, "2.0" and "64", which are explicitly checked for, and
removed.
Signed-off-by: Trevor Woerner <trevor@toganlabs.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Change single quotes to double quotes: Signed-off-by: Simon Glass <sjg@chromium.org>
Trevor Woerner [Wed, 21 Nov 2018 08:31:12 +0000 (03:31 -0500)]
buildman/toolchain.py: fix toolchain directory
The hexagon toolchain (4.6.1) from kernel.org, for example, was packaged in
a way that is different from most toolchains. The first entry when unpacking
most toolchain tarballs is:
gcc-<version>-nolib/<targetarch>-<system>
e.g.:
gcc-8.1.0-nolibc/aarch64-linux/
The first entry of the hexagon toolchain, however, is:
gcc-4.6.1-nolibc/
This causes the buildman logic in toolchain.py::ScanPath() to not be able to
find the "*gcc" executable since it looks in gcc-4.6.1-nolib/{.|bin|usr/bin}
instead of gcc-4.6.1/hexagon-linux/{.|bin|usr/bin}. Therefore when buildman
tries to download a set of toolchains that includes hexagon, the script fails.
This update takes the second line of the tarball unpacking (which works for
all the toolchains I've tested from kernel.org) and parses it to take the
first two elements, separated by '/'. It makes this logic a bit more robust.
Signed-off-by: Trevor Woerner <trevor@toganlabs.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 24 Nov 2018 04:29:43 +0000 (21:29 -0700)]
Add inttypes.h
Even if U-Boot does not use this, some libraries do. Add back this header
file so that the build does not fall back to using the host version, which
may include stdint.h and break the build due to conflicts with uint64_t,
etc.
This partially reverts commit dee37fc99d94 ("Remove <inttypes.h> includes
and PRI* usages in printf() entirely")
The only change from the file that was in U-Boot until recently is that it
now comes twice as close to passing checkpatch. The remaining warnings
pertain to the typedefs, which checkpatch does not like.
Simon Glass [Sat, 24 Nov 2018 04:29:42 +0000 (21:29 -0700)]
Add UINT32_MAX and UINT64_MAX
These constants are defined by stdint.h but not by kernel.h, which is
its stand-in in U-Boot. Add the definitions so that libraries which expect
stdint.h constants can work.
Simon Glass [Sat, 24 Nov 2018 04:29:40 +0000 (21:29 -0700)]
time: Update mdelay() to delay in one large chunk
The current function delays in one millisecond at a time. This does not
work well on sandbox since it results in lots of calls to usleep(1000) in
a tight loop. This makes the sleep duration quite variable since each call
results in a sleep of *at least* 1000us, but possibly more. Depending on
how busy the machine is, the sleep time can change quite a bit.
We cannot fix this in general, but we can reduce the effect by doing a
single sleep. The multiplication works fine with an unsigned long argument
up until a sleep time of about 4m milliseconds. This is over an hour and
we can be sure that delays of that length are not useful.
Update the mdelay() function to call udelay() only once with the
calculated delay value.
Simon Glass [Sat, 24 Nov 2018 04:29:38 +0000 (21:29 -0700)]
input: i8042: Use remove() instead of exported functions
We should not have exported functions in a driver. The i8042_disable()
function is used to disable the keyboard. Provide a remove() method
instead, which is the standard way of disabling a device.
We could potentially add a method to flush input but that does not seem
necessary.
Simon Glass [Sat, 24 Nov 2018 04:29:37 +0000 (21:29 -0700)]
cros_ec: Adjust to use v1 vboot context only
At present there are no users of the 64-byte v2 context. The v1 context is
only 16 bytes long and currently an error is raised if too much data is
returned from the EC.
Simon Glass [Sat, 24 Nov 2018 04:29:32 +0000 (21:29 -0700)]
tpm: Remove use of build-time TPM versions
There is only one place in the code which assumes at build-time that we
are using either a v1 or a v2 TPM. Fix this up and add a new function to
return the version of a TPM.
Supported TPM versions (v1 and v2) can be enabled independently and it is
possible to use both versions at once. This is useful for sandbox when
running tests.
Simon Glass [Sat, 24 Nov 2018 04:29:30 +0000 (21:29 -0700)]
sandbox: Use 'extras' to specify 'head' files
At present sandbox has a start.o in the 'start' target but also includes
it in the normal target list. This is not how this is normally handled. It
is needed because sandbox does not include the u-boot-init variable in its
link rule.
Update the rule and move start.o from the normal target list to the
'extras' list.
Simon Glass [Sat, 24 Nov 2018 04:29:29 +0000 (21:29 -0700)]
sandbox: Zero the ram buffer on startup
At present the RAM buffer is not inited unless it is read from a file,
likely produced by an earlier phase of U-Boot. This causes valgrind
warnings whenever the RAM buffer is used. Correct this by initing it if
needed.
Simon Glass [Sat, 24 Nov 2018 04:29:28 +0000 (21:29 -0700)]
sandbox: sysreset: Update to support power-on reset
If U-Boot is started from SPL or TPL, then those earlier phases deal with
the reset cause. On real hardware this cause may be lost once it is read.
Emulate that behaviour in sandbox by reporting a warm reset when a
previous phase has run since start-up.
Simon Glass [Sat, 24 Nov 2018 04:29:27 +0000 (21:29 -0700)]
sandbox: net: Correct name copy in eth_raw_bus_post_bind()
We cannot be sure that the interface name takes up the full length of the
space available to it. Use strcpy() instead of memcpy() in this case. This
corrects a valgrind warning.
Rick Chen [Mon, 3 Dec 2018 09:48:20 +0000 (17:48 +0800)]
riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
ax25-ae350 use CONFIG_OF_BOARD via a2 and CONFIG_SYS_SDRAM_BASE
to boot from ram which allow the board to override the fdt
address originally.
But after this patch
riscv: save hart ID and device tree passed by prior boot stage
It provide prior_stage_fdt_address which offer a temporary
memory address to keep the dtb address passing from loader(gdb)
to u-boot with a1.
So passing via a2 and CONFIG_SYS_SDRAM_BASE is redundant and
can be removed. And it also somehow may corrupted BBL if it
was be arranged in CONFIG_SYS_SDRAM_BASE.
In board_fdt_blob_setup()
When boting from ram:
prior_stage_fdt_address will be use to reserved dtb temporarily.
When booting from ROM:
dtb will be pre-burned in CONFIG_SYS_FDT_BASE, if it is flash base.
Or CONFIG_SYS_FDT_BASE maybe a memory map space (NOT RAM or ROM)
which is provided by HW.
Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
Anup Patel [Mon, 3 Dec 2018 05:27:41 +0000 (10:57 +0530)]
riscv: qemu: Use different SYS_TEXT_BASE for S-mode
When u-boot runs in S-mode, the M-mode runtime firmware
(BBL or equivalent) uses memory range in 0x80000000 to
0x80200000. Due to this, we cannot use 0x80000000 as
SYS_TEXT_BASE when running in S-mode. Instead for S-mode,
we use 0x80200000 as SYS_TEXT_BASE.
Even Linux RISC-V kernel ignores/reserves memory range
0x80000000 to 0x80200000 because it runs in S-mode.
Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Anup Patel [Mon, 3 Dec 2018 05:27:40 +0000 (10:57 +0530)]
riscv: Add kconfig option to run U-Boot in S-mode
This patch adds kconfig option RISCV_SMODE to run U-Boot in
S-mode. When this opition is enabled we use s<xyz> CSRs instead
of m<xyz> CSRs.
It is important to note that there is no equivalent S-mode CSR
for misa and mhartid CSRs so we expect M-mode runtime firmware
(BBL or equivalent) to emulate misa and mhartid CSR read.
In-future, we will have more patches to avoid accessing misa and
mhartid CSRs from S-mode.
Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
The SDHI nodes are missing features supported in upstream U-Boot,
like mode support properties. Pull the extras into U-Boot specific
DT until it hits mainline Linux, to make syncing of DTs easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 3 Dec 2018 19:55:01 +0000 (20:55 +0100)]
ARM: dts: rmobile: Extract SDHI extras on H3 and M3W ULCB
The SDHI nodes are missing features supported in upstream U-Boot,
like mode support properties. Pull the extras into U-Boot specific
DT until it hits mainline Linux, to make syncing of DTs easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 3 Dec 2018 19:48:16 +0000 (20:48 +0100)]
ARM: dts: rmobile: Extract CPLD node on H3 and M3W ULCB
The CPLD node is missing in Linux 4.17 DTs on H3/M3W ULCB, pull the
node into U-Boot specific DT until it hits mainline Linux, to make
syncing of DTs easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 3 Dec 2018 19:45:22 +0000 (20:45 +0100)]
ARM: dts: rmobile: Extract AVB node extras on V3M Eagle
The AVB node is not complete in Linux 4.17 DTs on V3M Eagle, pull the
AVB node extras into U-Boot specific DT until they hit mainline Linux,
to make syncing of DTs easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 3 Dec 2018 19:39:07 +0000 (20:39 +0100)]
ARM: dts: rmobile: Extract SDHI nodes on M3N
The SDHI nodes are not in Linux 4.17 DTs in M3N, pull them into U-Boot
specific DT extras until they hit mainline Linux, to make syncing of
DTs easier.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 3 Dec 2018 19:17:50 +0000 (20:17 +0100)]
ARM: dts: rmobile: Extract RPC node to u-boot specific DT
The RPC DT bindings are still work in progress. Extract the RPC DT node
from the DT to allow easier update and so it can be replaced once the DT
bindings are stable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master
Marek Vasut [Mon, 26 Nov 2018 23:19:03 +0000 (00:19 +0100)]
ARM: rmobile: Convert to bootm_size
Convert all Renesas R-Car boards to bootm_size of 256 MiB and drop both
fdt_high and initrd_high. This change implies that the FDT and initrd
will always be copied into the first 256 MiB of RAM instead of being
used in place, which can cause various kinds of inobvious problems.
The simpler problems include FDT or initrd being overwritten or being
used from unaligned addresses, especially on ARM64. The overhead of
copying the FDT to aligned location is negligible and these problems
go away, so the benefit is significant.
Regarding alignment problems with fitImage. The alignment of DT properties
is always 32 bits, which implies that the alignment of the "data" property
in fitImage is also 32 bits. The /incbin/ syntax plays no role here. The
kernel expects all elements, including DT and initrd, to be aligned to
64 bits on ARM64, thus using them in place may not be possible. Using the
bootm_size assures correct alignment, again with negligible overhead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sun, 18 Nov 2018 02:25:08 +0000 (03:25 +0100)]
mmc: Do not issue CMD 6 on SD 1.00 and SD 1.01
According to SD Specifications Part 1 Physical Layer Simplified Specification
Version 6.00 August 29, 2018, section 4.3.10 (Switch Function Command) and
section 5.6 (SCR register), SD cards version 1.00 and 1.01 do not support the
SD CMD 6.
Currently, U-Boot will issue CMD 6 unconditionally in sd_set_card_speed()
while configuring the bus for selected frequency. This will make SD cards
version 1.00 and 1.01 time out and thus fail detection altogether.
Fix this by not sending CMD 6 on such cards. Tested on Matsushita Electric
Industrial Co., Ltd. Japan RP-SD008B / Victor 8MB SD card, CU-SD008, which
is correctly detected with this patch as:
Device: sd@ee160000
Manufacturer ID: 1
OEM: 5041
Name: S008B
Bus Speed: 25000000
Mode : SD Legacy
Rd Block Len: 512
SD version 1.0
High Capacity: No
Capacity: 6.5 MiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud
rate prescaler register is readable only when USR[0] is zero. Since this
bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather
drop this than making the ns16550 debug uart more platform specific.
Reported-by: Roosen Henri <Henri.Roosen@ginzinger.com> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com
Tom Rini [Thu, 29 Nov 2018 23:21:14 +0000 (18:21 -0500)]
dm: MIGRATION: Update migration plan for BLK
The biggest part of migration to using CONFIG_BLK is that we need to
have the various subsystems migrated first, so reword the plan here to
reference the new deadlines.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 29 Nov 2018 23:21:13 +0000 (18:21 -0500)]
dm: MIGRATION: Add migration plan for CONFIG_SATA
As the core of the subsystem has been converted along with some of the
drivers, formalize a deadline for migration.
Cc: Akshay Bhat <akshaybhat@timesys.com> Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ken Lin <Ken.Lin@advantech.com.tw> Cc: Ludwig Zenz <lzenz@dh-electronics.de> Cc: Marek Vasut <marex@denx.de> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Soeren Moch <smoch@web.de> Cc: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 29 Nov 2018 23:21:11 +0000 (18:21 -0500)]
dm: MIGRATION: Add migration plan for DM_MMC
Given that at this point the MMC subsystem itself has been migrated
along with a number of subsystem drivers, formalize a deadline for
migration.
Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tom Rini [Tue, 4 Dec 2018 00:30:54 +0000 (19:30 -0500)]
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.01
microblaze:
- Use default functions for memory decoding
- Showing model from DT
zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets
zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting
Tom Rini [Mon, 3 Dec 2018 22:52:40 +0000 (17:52 -0500)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-12-03
This release is fully packed with lots of glorious improvements in UEFI
land again!
- Make PE images more standards compliant
- Improve sandbox support
- Improve correctness
- Fix RISC-V execution on virt model
- Honor board defined top of ram (fixes a few boards)
- Imply DM USB access when distro boot is available
- Code cleanups