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9 years agomcx: update maintainer and convert to generic board
Anatolij Gustschin [Wed, 8 Apr 2015 11:49:41 +0000 (13:49 +0200)]
mcx: update maintainer and convert to generic board

Remove obsolete email address from MAINTAINERS.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
9 years agoMAINTAINERS: fix TI DaVinci directory path and add KeyStone
Masahiro Yamada [Wed, 8 Apr 2015 09:23:23 +0000 (18:23 +0900)]
MAINTAINERS: fix TI DaVinci directory path and add KeyStone

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
9 years agoARM: zynq: Remove Jagan from list of maintainers
Michal Simek [Wed, 8 Apr 2015 08:07:20 +0000 (10:07 +0200)]
ARM: zynq: Remove Jagan from list of maintainers

Email address is not longer valid that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynq: disable CONFIG_SYS_MALLOC_F to fix MMC boot
Masahiro Yamada [Wed, 8 Apr 2015 05:25:50 +0000 (14:25 +0900)]
ARM: zynq: disable CONFIG_SYS_MALLOC_F to fix MMC boot

Since commit 326a682358c1 (malloc_f: enable SYS_MALLOC_F by default
if DM is on), Zynq MMC boot hangs up after printing the following:

    U-Boot SPL 2015.04-rc5-00053-gadcc570 (Apr 08 2015 - 12:59:11)
    mmc boot
    reading system.dtb

Prior to commit 326a682358c1, Zynq boards enabled CONFIG_DM, but
not CONFIG_SYS_MALLOC_F.  That commit forcibly turned on
CONFIG_SYS_MALLOC_F.  I have not figured out the root cause, but
anyway it looks like CONFIG_SYS_MALLOC_F gave a bad impact on the
Zynq MMC boot.

We are planning to have the v2015.04 release in a few days.
I know this is a defensive fixup, but what I can do now is to add
   # CONFIG_SYS_MALLOC_F is not set
to every Zynq defconfig file to get back the original behavior.

Tested on:
  - Zedboard
  - ZC706 board

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
9 years agocmd_mem.c: Update 'iteration_limit' to unsigned long
Tom Rini [Tue, 7 Apr 2015 13:38:54 +0000 (09:38 -0400)]
cmd_mem.c: Update 'iteration_limit' to unsigned long

With e37f1eb we now use strict_strtoul() in do_mem_mtest() and this
gives us a warning:
../include/vsprintf.h:38:5: note: expected 'long unsigned int *' but
argument is of type 'int *'

Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agofix makefiles to respect DTC setting
Pavel Machek [Mon, 6 Apr 2015 13:46:44 +0000 (15:46 +0200)]
fix makefiles to respect DTC setting

Top-level Makefile has option to select dtc binary, but it is ignored
due to bug in Makefile.lib. Fix it.

Signed-off-by: Pavel Machek <pavel@denx.de>
9 years agoMAKEALL: fix get_target_arch() to adjust to '-' in Status field
Masahiro Yamada [Mon, 6 Apr 2015 02:12:28 +0000 (11:12 +0900)]
MAKEALL: fix get_target_arch() to adjust to '-' in Status field

Since the Kconfig conversion, boards.cfg scanned by MAKEALL is
generated by tools/genboardscfg.py.  Every board is supposed to have
its own MAINTAINERS that contains maintainer and status information,
but, in fact, MAINTAINERS is missing from some boards.

For such boards, the first field, Status, is filled with '-'.
It causes a problem for "set" command, which ignores '-' in its
arguments.  Consequently, get_target_arch() returns a wrong field
and MAKEALL fails to get a correct toolchain.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
9 years agokbuild: include config.mk when auto.conf is not older than .config
Masahiro Yamada [Fri, 3 Apr 2015 03:30:25 +0000 (12:30 +0900)]
kbuild: include config.mk when auto.conf is not older than .config

Since the Kconfig conversion, config.mk has been included only when
include/config/auto.conf is newer than the .config file.

It causes build error if both files have the same time-stamps.
It is actually possible because EXT* file systems have a 1s time-stamp
resolution.

The config.mk should be included when include/config/auto.conf is
*not older* than the .config file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Tom Rini <trini@konsulko.com>
Reported-by: York Sun <yorksun@freescale.com>
Reported-by: Stephen Warren <swarren@nvidia.com>
Reported-by: Matthew Gerlach <mgerlach@opensource.altera.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
9 years agoam33xx/ddr.c: Fix regression on DDR2 platforms
Tom Rini [Thu, 2 Apr 2015 20:01:33 +0000 (16:01 -0400)]
am33xx/ddr.c: Fix regression on DDR2 platforms

Back in fc46bae a "clean up" was introduced that intended to reconcile
some of the AM335x codepaths based on how AM43xx operates.
Unfortunately this introduced a regression on the DDR2 platforms.  This
was un-noticed on DDR3 (everything except for Beaglebone White) as we
had already populated sdram_config correctly in sequence.  This change
brings us back to the older behavior and is fine on all platforms.

Tested on Beaglebone White, Beaglebone Black and AM335x GP EVM

Reported-by: Matt Ranostay <mranostay@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agocmd_mem: cleanups, catch bad usage
Pavel Machek [Wed, 1 Apr 2015 11:50:41 +0000 (13:50 +0200)]
cmd_mem: cleanups, catch bad usage

Currently, memtest will silently accept bad data. Perform error
checking on user intput.

Signed-off-by: Pavel Machek <pavel@denx.de>
9 years agoahci: Fix a wrong parameter pass
Tang Yuantian [Tue, 31 Mar 2015 07:02:43 +0000 (15:02 +0800)]
ahci: Fix a wrong parameter pass

In stead of user_buffer_size, transfer_size should be used to pass to
ahci_device_data_io(). transfer_size is the length that we want the
low level function to transfer each time.
If we use user_buffer_size which is the totally data length as parameter,
low level function will actually create many SGs to transfer as many data
as possible each time. That will produce many redundant data transfer.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
9 years agoenv_sf: Fix recovery default
Mario Schuknecht [Tue, 24 Mar 2015 07:59:00 +0000 (08:59 +0100)]
env_sf: Fix recovery default

The u-boot environment is redundantly stored in a NOR flash on our boards.
Redundant means that there are two places to store the environment. But only
one of the two is active. I discovered that on one board the u-boot (env_sf)
uses the environment from the second place and the Kernel (fw_printenv) uses
the environment from the first place.
To decide which is the active environment there is a byte inside the
environment. 1 means active and 0 means obsolete. But on that board both
environments had have a 1. This can happen if a power loss or reset occurs
during writing the environment. In this situation the u-boot (env_sf)
implementation uses the second environment as default. But the Kernel
(fw_printenv) implementation uses the first environment as default.

This commit corrects the default in the u-boot env_sf implementation when a
problem was detected. Now the recovery default is the same like in all other
environment implementations. E.g. fw_printenv and env_flash. This ensures that
u-boot and Kernel use the same environment.

Signed-off-by: Mario Schuknecht <mario.schuknecht@dresearch-fe.de>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-samsung
Tom Rini [Mon, 6 Apr 2015 10:57:15 +0000 (06:57 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-samsung

9 years agoconfig: exynos: trats2: Enable support for Image.itb at trats2 device
Łukasz Majewski [Wed, 1 Apr 2015 10:34:30 +0000 (12:34 +0200)]
config: exynos: trats2: Enable support for Image.itb at trats2 device

After this change it is possible to boot trats2 device with Image.itb,
which facilitates automated testing, since only one file is necessary.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoconfig: exynos: trats: Enable support for Image.itb at trats device
Łukasz Majewski [Wed, 1 Apr 2015 10:34:29 +0000 (12:34 +0200)]
config: exynos: trats: Enable support for Image.itb at trats device

After this change it is possible to boot trats device with Image.itb,
which facilitates automated testing, since only one file is necessary.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoconfig: exynos: common: Provide env variables to support Image.itb
Łukasz Majewski [Wed, 1 Apr 2015 10:34:28 +0000 (12:34 +0200)]
config: exynos: common: Provide env variables to support Image.itb

This change allows using Image.itb image format with Exynos4 devices
(especially trats and trats2).
Such change facilitates automated testing since only one binary needs
to be prepared.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agosmdk5420: Remove GPIO enums
Ajay Kumar [Wed, 4 Mar 2015 13:35:31 +0000 (19:05 +0530)]
smdk5420: Remove GPIO enums

Remove GPIOs from smdk5420 board file and because the same
is already specified via DT.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agodts: peach_pi: Add DT properties needed for display
Ajay Kumar [Wed, 4 Mar 2015 13:35:30 +0000 (19:05 +0530)]
dts: peach_pi: Add DT properties needed for display

Add backlight enable GPIO, and delay needed for panel powerup
via FIMD DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agodts: peach_pit: Add SLP and RST GPIO properties in parade DT node
Ajay Kumar [Wed, 4 Mar 2015 13:35:29 +0000 (19:05 +0530)]
dts: peach_pit: Add SLP and RST GPIO properties in parade DT node

Now that parade driver supports reading SLP and RST GPIO
from DT, specify the same in parade DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agodts: exynos54xx: Add samsung, pwm-out-gpio property to FIMD node
Ajay Kumar [Wed, 4 Mar 2015 13:35:28 +0000 (19:05 +0530)]
dts: exynos54xx: Add samsung, pwm-out-gpio property to FIMD node

Now that the exynos_fb driver supports handling backlight GPIO
via DT, specify pwm output property via FIMD DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agovideo: parade: configure SLP and RST GPIOs if specified in DT
Ajay Kumar [Wed, 4 Mar 2015 13:35:27 +0000 (19:05 +0530)]
video: parade: configure SLP and RST GPIOs if specified in DT

Add support to configure EDP_RST GPIO and EDP_SLP GPIO,
if provided in parade DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agovideo: exynos_fb: configure backlight GPIOs if specified in DT
Ajay Kumar [Wed, 4 Mar 2015 13:35:26 +0000 (19:05 +0530)]
video: exynos_fb: configure backlight GPIOs if specified in DT

Add support to configure PWM_OUT(PWM output) GPIO and
BL_EN(backlight enable) GPIO, if provided in FIMD DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoExynos5: Fix rpll_sdiv to support both peach-pit and peach-pi panels
Ajay Kumar [Wed, 4 Mar 2015 13:35:25 +0000 (19:05 +0530)]
Exynos5: Fix rpll_sdiv to support both peach-pit and peach-pi panels

The existing setting for rpll_sdiv generates 70.5Mhz RPLL
video clock to drive 1366x768 panel on peach_pit.

This clock rate is not sufficient to drive 1920x1080 panel on peach-pi.
So, we adjust rpll_sdiv to 3 so that it generates 141Mhz pixel clock
which can drive peach-pi LCD.

This change doesn't break peach-pit LCD since 141/2=70.5Mhz, i.e FIMD
divider at IP level will get set to 1(the required divider setting
will be calculated and set by exynos_fimd_set_clock()) and hence
peach-pit LCD still works fine.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoarm: exynos: add display clocks for Exynos5800
Ajay Kumar [Wed, 4 Mar 2015 13:35:24 +0000 (19:05 +0530)]
arm: exynos: add display clocks for Exynos5800

Add get_lcd_clk and set_lcd_clk callbacks for Exynos5800 needed by
exynos video driver.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoconfig: peach: Correct memory layout environment settings
Sjoerd Simons [Thu, 12 Mar 2015 21:33:29 +0000 (22:33 +0100)]
config: peach: Correct memory layout environment settings

The peach boards have their SDRAM start address at 0x20000000 instead of
0x40000000 which seems common for all other exynos5 based boards. This
means the layout set in exynos5-common.h causes the kernel be loaded
more then 128MB (at 0x42000000) away from memory start which breaks
booting kernels with CONFIG_AUTO_ZRELADDR

Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which uses
the same offsets from start of memory as the common exynos5 settings.

This fixes booting via bootz and PXE

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoexynos5: add trace feature #ifdef in exynos5-common.h
Inha Song [Fri, 13 Mar 2015 08:48:35 +0000 (17:48 +0900)]
exynos5: add trace feature #ifdef in exynos5-common.h

We can enable / disable trace feature from the FTRACE config options.
To enable, compile U-Boot with FTRACE=1.

This patch add #ifdef FTRACE in exynos5-common.h for enable/disable
to use FTRACE configs instead of having to change board config files.

Signed-off-by: Inha Song <ideal.song@samsung.com>
Acked-by: Simon Glass <sjg@chroimum.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoExynos: Clock: Fix exynos5_get_periph_rate for I2C.
Guillaume GARDET [Wed, 11 Mar 2015 09:34:27 +0000 (10:34 +0100)]
Exynos: Clock: Fix exynos5_get_periph_rate for I2C.

Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup
soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec
keyboard working again on Samsung Chromebook (snow).

Changes in V2: reorder lines as requested by Joonyoung Shim.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Simon Glass <sjg@chroimum.org>
Tested-by: Simon Glass <sjg@chroimum.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agosunxi: Fix Orangepi_mini dtb filename
Hans de Goede [Sat, 4 Apr 2015 08:37:44 +0000 (10:37 +0200)]
sunxi: Fix Orangepi_mini dtb filename

The Orangepi_mini is different enough from the regular Orangepi that it needs
its own dtb, but when it got added a copy and paste error was made and it
got the same dtb filename, fix this.

While at it also add a short description of both Orangepi boards to the
defconfig files for them.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agoMerge git://git.denx.de/u-boot-arc
Tom Rini [Fri, 3 Apr 2015 13:14:44 +0000 (09:14 -0400)]
Merge git://git.denx.de/u-boot-arc

9 years agoMerge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Fri, 3 Apr 2015 13:14:38 +0000 (09:14 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra

Conflicts:
board/armltd/vexpress64/vexpress64.c

Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoboard: AXS10x - update SDIO clock value
Alexey Brodkin [Thu, 2 Apr 2015 07:19:12 +0000 (10:19 +0300)]
board: AXS10x - update SDIO clock value

With the most recent board firmware correct SDIO clock is 50MHz as
opposed to 25 MHz before.

Also set max frequency of MMC data exchange equal to SDIO clock -
because there's no way to transfer data faster than interface clock.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
9 years agoarc: add support for SLC (System Level Cache, AKA L2-cache)
Alexey Brodkin [Mon, 30 Mar 2015 10:36:04 +0000 (13:36 +0300)]
arc: add support for SLC (System Level Cache, AKA L2-cache)

ARCv2 cores may have built-in SLC (System Level Cache, AKA L2-cache).
This change adds functions required for controlling SLC:
 * slc_enable/disable
 * slc_flush/invalidate

For now we just disable SLC to escape DMA coherency issues until either:
 * SLC flush/invalidate is supported in DMA APIin U-Boot
 * hardware DMA coherency is implemented (that might be board specific
   so probably we'll need to have a separate Kconfig option for
   controlling SLC explicitly)

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
9 years agoboard: Switch Abilis TB-100 board to Driver Model for serial port
Alexey Brodkin [Fri, 27 Mar 2015 10:24:35 +0000 (13:24 +0300)]
board: Switch Abilis TB-100 board to Driver Model for serial port

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
9 years agoserial-arc: switch to DM
Alexey Brodkin [Tue, 17 Mar 2015 11:55:14 +0000 (14:55 +0300)]
serial-arc: switch to DM

Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
9 years agoarc: minor fixes in Kconfig
Alexey Brodkin [Tue, 17 Mar 2015 11:26:43 +0000 (14:26 +0300)]
arc: minor fixes in Kconfig

 [1] Fix misspeling in ARC_CACHE_LINE_SHIFT dependency, now cache-line
lenth selection is correctly enabled if either I$ or D$ are enabled.

 [2] Add dummy entry to target list to make sure target type is always
mentioned in defconfig. Otherwise defconfig for the first target in the
list will not have target name and later on with addition of the new
target on top of the list in Kconfig will lead to corrupted
configuration expanded from defconfig.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
9 years agoarc: get rid of CONFIG_SYS_GENERIC_GLOBAL_DATA
Alexey Brodkin [Wed, 25 Feb 2015 15:10:18 +0000 (18:10 +0300)]
arc: get rid of CONFIG_SYS_GENERIC_GLOBAL_DATA

As discussed on mailing list we're drifting away from
CONFIG_SYS_GENERIC_GLOBAL_DATA in favour to use of board_init_f_mem()
for global data.

So do this for ARC architecture.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
9 years agoarc: re-generate defconfigs
Alexey Brodkin [Tue, 17 Mar 2015 11:30:59 +0000 (14:30 +0300)]
arc: re-generate defconfigs

Before that moment our defconfigs were manually modified with addition
of new options. That means once anybody wants to add another option and
re-genarate defconfig with "make defconfig" there will be lots of
differences. So to make future modifications more clean we'll do bulk
re-generation right away.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
9 years agoarc: clean-up init procedure
Alexey Brodkin [Tue, 24 Feb 2015 16:40:36 +0000 (19:40 +0300)]
arc: clean-up init procedure

Intention behind this work was elimination of as much assembly-written
code as it is possible.

In case of ARC we already have relocation fix-up implemented in C so why
don't we use C for U-Boot copying, .bss zeroing etc.

It turned out x86 uses pretty similar approach so we re-used parts of
code in "board_f.c" initially implemented for x86.

Now assembly usage during init is limited to stack- and frame-pointer
setup before and after relocation.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
9 years agoarc: move low-level interrupt and exception handlers in a separate file
Alexey Brodkin [Tue, 24 Feb 2015 14:08:44 +0000 (17:08 +0300)]
arc: move low-level interrupt and exception handlers in a separate file

This separation makes maintenance of code easier because those low-level
interrupt- or exception handling routines are pretty static and usually
require not much care while start-up code is a subject of modifications
and enhancements.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
9 years agoarc: merge common start-up code between ARC and ARCv2
Alexey Brodkin [Thu, 19 Feb 2015 15:40:58 +0000 (18:40 +0300)]
arc: merge common start-up code between ARC and ARCv2

Even though ARCompact and ARCv2 are not binary compatible most of
assembly instructions are used in both. With this change we'll get rid
of duplicate code.

Still IVTs are implemented differently so we're keeping them in separate
files.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
9 years agoarc: cache - build invalidate_icache_all() and invalidate_dcache_all()
Alexey Brodkin [Fri, 27 Mar 2015 09:47:29 +0000 (12:47 +0300)]
arc: cache - build invalidate_icache_all() and invalidate_dcache_all()
always

Make both invalidate_icache_all() and invalidate_dcache_all() available
even if U-Boot is configured with CONFIG_SYS_DCACHE_OFF and/or
CONFIG_SYS_ICACHE_OFF.

This is useful because configuration of U-Boot may not match actual
hardware features. Real board may have cache(s) but for some reason we
may want to run U-Boot with cache(s) disabled (for example if some
peripherals work improperly with existing drivers if data cache is
enabled). So board may start with cache(s) enabled (that's the case for
ARC cores with built-in caches) but early in U-Boot we disable cache(s)
and make sure all contents of data cache gets flushed in RAM.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
9 years agoserial/serial_arc: set registers address during compilation
Alexey Brodkin [Tue, 24 Feb 2015 16:31:51 +0000 (19:31 +0300)]
serial/serial_arc: set registers address during compilation

Being global variable with 0 value it falls into .bss area which we may
only use after relocation to RAM. And right afetr relocation we zero
.bss - effectively cleaing register address set for early console.

Now with pre-set value "regs" variable is no longer in .bss and this way
safely survives relocation.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
9 years agoPrepare v2015.04-rc5
Tom Rini [Wed, 1 Apr 2015 00:53:59 +0000 (20:53 -0400)]
Prepare v2015.04-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-atmel
Tom Rini [Tue, 31 Mar 2015 23:15:59 +0000 (19:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-atmel

9 years agoARM: at91: sama5: move the common part of configurations to at91-sama5_common.h
Wu, Josh [Mon, 30 Mar 2015 06:51:19 +0000 (14:51 +0800)]
ARM: at91: sama5: move the common part of configurations to at91-sama5_common.h

Create a new configuration file: at91-sama5_common.h. Which includes the
configurations that reused by all SAMA5 chips.

at91-sama5_common.h includes:
- hw macros (clock, text_base and etc.)
- default commands.
- BOOTARGS
- U-Boot common configs.
NOTE: NOR flash definition should be put before including the common header.

For sama5d3-xplained:
- add CMD_SETEXPR

For sama5d3xek:
- add CMD_SETEXPR
- change CONFIG_SYS_MALLOC_LEN to (4*1024*1024)

Signed-off-by: Josh Wu <josh.wu@atmel.com>
9 years agoARM: atmel: at91sam9n12ek: enable spl support
Bo Shen [Fri, 27 Mar 2015 06:23:36 +0000 (14:23 +0800)]
ARM: atmel: at91sam9n12ek: enable spl support

Enable SPL support for at91sam9n12ek boards, now it supports
boot up from NAND flash, serial flash.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
9 years agoARM: atmel: at91sam9x5ek: enable spl support
Bo Shen [Fri, 27 Mar 2015 06:23:35 +0000 (14:23 +0800)]
ARM: atmel: at91sam9x5ek: enable spl support

Enable SPL support for at91sam9x5ek board. Now, it supports
boot up from NAND flash and SPI flash.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
9 years agoARM: atmel: at91sam9m10g45ek: enable spl support
Bo Shen [Fri, 27 Mar 2015 06:23:34 +0000 (14:23 +0800)]
ARM: atmel: at91sam9m10g45ek: enable spl support

Supports boot up from NAND flash with software ECC eanbled.
And supports boot up from SD/MMC card with FAT file system.

As the boot from SD/MMC card with FAT file system, the BSS
segment is too big to fit into SRAM, so, use the lds to put
it into SDRAM.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
9 years agoARM: atmel: arm926ejs: fix clock configuration
Bo Shen [Fri, 27 Mar 2015 06:23:33 +0000 (14:23 +0800)]
ARM: atmel: arm926ejs: fix clock configuration

Config MCKR according to the datasheet sequence, or else it
will cause the MCKR configuration failed.

Remove timeout checking for clock configuration, if configure
the clock failed, let the system hang while not run in wrong
clock configuration.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
9 years agoARM: at91: at91sam9n12ek: save the environment to a fat file in MMC card
Wu, Josh [Tue, 24 Mar 2015 09:07:22 +0000 (17:07 +0800)]
ARM: at91: at91sam9n12ek: save the environment to a fat file in MMC card

Insteading in mmc's raw sectors, this patch will save the environment
in a fat file (uboot.env) in mmc card's first FAT patition by default.

If you want to save in mmc's raw sectors, you only need to define
CONFIG_ENV_IS_IN_MMC.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
9 years agoARM: at91: atmel_nand: Support flash based BBT
David Dueck [Fri, 20 Mar 2015 09:52:49 +0000 (10:52 +0100)]
ARM: at91: atmel_nand: Support flash based BBT

Add support for on-flash bad block table. This makes U-Boot handle an existing
BBT correctly.

Signed-off-by: David Dueck <davidcdueck@googlemail.com>
Reviewed-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
CC: Boris BREZILLON <boris.brezillon@free-electrons.com>
CC: Josh Wu <josh.wu@atmel.com>
CC: Andreas Bießmann <andreas.devel@googlemail.com>
CC: Scott Wood <scottwood@freescale.com>
Acked-by: Josh Wu <josh.wu@atmel.com>
9 years agoarm, at91: corvus: move MACH_TYPE to defconfig
Heiko Schocher [Tue, 17 Mar 2015 07:26:11 +0000 (08:26 +0100)]
arm, at91: corvus: move MACH_TYPE to defconfig

move MACH_TYPE into defconfig

Signed-off-by: Heiko Schocher <hs@denx.de>
9 years agospl_atmel.c: Switch s_init to board_init_f
Tom Rini [Wed, 11 Feb 2015 00:07:22 +0000 (19:07 -0500)]
spl_atmel.c: Switch s_init to board_init_f

To facilitate changing lowlevel_init to become s_init, move the current
contents of s_init into board_init_f and add the rest of what
board_init_f does here.
In order to compile clean without CONFIG_SKIP_LOWLEVEL_INIT set, leave an
empty stub of s_init(). It can be removed when lowlevel_init becomes s_init.

Cc: Bo Shen <voice.shen@atmel.com>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Matt Porter <mporter@konsulko.com> on sama5d3_xplained
Signed-off-by: Tom Rini <trini@ti.com>
[rebased on current master, leave s_init() as empty stub]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agoARM: atmel: armv7: switch to use common timer functions
Bo Shen [Wed, 4 Feb 2015 07:53:02 +0000 (15:53 +0800)]
ARM: atmel: armv7: switch to use common timer functions

The commit 8dfafdd (Introduce common timer functions), add common
timer functions, we can use them directly.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[rebase on current master]
Sigend-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agoARM: atmel: arm9: switch to use common timer functions
Bo Shen [Wed, 4 Feb 2015 07:53:01 +0000 (15:53 +0800)]
ARM: atmel: arm9: switch to use common timer functions

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[rebase on current master]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agoARM: at91: sama5d4: display the U-Boot version on LCD
Wu, Josh [Wed, 4 Feb 2015 03:03:32 +0000 (11:03 +0800)]
ARM: at91: sama5d4: display the U-Boot version on LCD

This patch will display the U-Boot version on LCD.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
9 years agoMerge git://git.denx.de/u-boot-nand-flash
Tom Rini [Tue, 31 Mar 2015 21:17:06 +0000 (17:17 -0400)]
Merge git://git.denx.de/u-boot-nand-flash

9 years agoMerge branch 'master' of git://git.denx.de/u-boot-imx
Tom Rini [Tue, 31 Mar 2015 15:45:36 +0000 (11:45 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-imx

9 years agomtd: vf610_nfc: specify transfer size before each transfer
Stefan Agner [Tue, 24 Mar 2015 16:54:20 +0000 (17:54 +0100)]
mtd: vf610_nfc: specify transfer size before each transfer

Testing showed, that commands like STATUS made the buffer dirty
when executed with NFC_SECSZ set to the page size. It looks
like the controller transfers bogus data when this register
is configured. When setting it to 0, the buffer does not get
altered while the status command still seems to work flawless.

Signed-off-by: Stefan Agner <stefan@agner.ch>
9 years agomtd: vf610_nfc: mark page as dirty on block erase
Stefan Agner [Tue, 24 Mar 2015 16:54:19 +0000 (17:54 +0100)]
mtd: vf610_nfc: mark page as dirty on block erase

The driver tries to re-use the page buffer by storing the page
number of the current page in the buffer. The page is only read
if the requested page number is not currently in the buffer. When
a block is erased, the page number is marked as invalid if the
erased page equals the one currently in the cache. However, since
a erase block consists of multiple pages, also other page numbers
could be affected.

The commands to reproduce this issue (on a written page):
> nand dump 0x800
> nand erase 0x0 0x20000
> nand dump 0x800

The second nand dump command returns the data from the buffer,
while in fact the page is erased (0xff).

Avoid the hassle to calculate whether the page is affected or not,
but set the page buffer unconditionally to invalid instead.

Signed-off-by: Stefan Agner <stefan@agner.ch>
9 years agonand: yaffs: Remove the "nand write.yaffs" command
Peter Tyser [Tue, 3 Feb 2015 17:58:16 +0000 (11:58 -0600)]
nand: yaffs: Remove the "nand write.yaffs" command

This command is only enabled by one board, complicates the NAND code,
and doesn't appear to have been functioning properly for several
years.  If there are no bad blocks in the NAND region being written
nand_write_skip_bad() will take the shortcut of calling nand_write()
which bypasses the special yaffs handling.  This causes invalid YAFFS
data to be written. See
http://lists.denx.de/pipermail/u-boot/2011-September/102830.html for
an example and a potential workaround.

U-Boot still retains the ability to mount and access YAFFS partitions
via CONFIG_YAFFS2.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
9 years agonand: Remove CONFIG_MTD_NAND_VERIFY_WRITE
Peter Tyser [Tue, 3 Feb 2015 17:58:15 +0000 (11:58 -0600)]
nand: Remove CONFIG_MTD_NAND_VERIFY_WRITE

The CONFIG_MTD_NAND_VERIFY_WRITE has been removed from Linux for some
time and a more generic method of NAND verification now exists in U-Boot.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
9 years agodfu: nand: Verify writes
Peter Tyser [Tue, 3 Feb 2015 17:58:14 +0000 (11:58 -0600)]
dfu: nand: Verify writes

Previously NAND writes were not verified and could fail silently.  Add
a verification step after all writes to NAND.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
9 years agocmd_nand: Verify writes to NAND
Peter Tyser [Tue, 3 Feb 2015 17:58:13 +0000 (11:58 -0600)]
cmd_nand: Verify writes to NAND

Previously NAND writes were only verified when CONFIG_MTD_NAND_VERIFY_WRITE
was defined.  On boards without this define writes could fail silently.
Boards with CONFIG_MTD_NAND_VERIFY_WRITE could prematurely report
failures which ECC could correct.

Add a verification step after all "nand write[.x]" commands to ensure the
writes were successful.  The verification uses ECC for for "normal"
writes, but does not for raw and yaffs writes.  Some test cases which
inject fake bad bits on a 2K page flash are below.

Test cases with CONFIG_MTD_NAND_VERIFY_WRITE defined:
  Example of an ECC write which previously failed when
  CONFIG_MTD_NAND_VERIFY_WRITE was defined, but now succeeds because ECC
  is used during verification:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10020 0xfe 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000020 0x01 1
      nand write 0x1000000 0x800 0x1800

Test cases without CONFIG_MTD_NAND_VERIFY_WRITE defined:
  Example of an ECC write which previously silently failed:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10020 0x00 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000020 0xff 1
      nand write 0x1000000 0x800 0x1800

  Example of a raw write which previously failed silently due to stuck
  data bit, but now errors out:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10020 0xfe 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000020 0x01 1
      nand write.raw 0x1000000 0x800 3

  Example of a raw write which previously failed silently due to stuck OOB
  bit, but now errors out:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10810 0xfe 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000810 0x01 1
      nand write.raw 0x1000000 0x800 3

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
9 years agonand: Add verification functions
Peter Tyser [Tue, 3 Feb 2015 17:58:12 +0000 (11:58 -0600)]
nand: Add verification functions

Add nand_verify() and nand_verify_page_oob().  nand_verify() verifies
NAND contents against an arbitrarily sized buffer using ECC while
nand_verify_page_oob() verifies a NAND page's contents and OOB.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
9 years agonand: Remove unused read/write structures
Peter Tyser [Tue, 3 Feb 2015 16:24:05 +0000 (10:24 -0600)]
nand: Remove unused read/write structures

The use of the nand_write_options and nand_read_options structures were
removed in commit dfbf617ff055e4216f78d358b0867c548916d14b.  Remove the
now-unused structures too.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
9 years agonand: Remove unused CONFIG_MTD_NAND_ECC_JFFS2 option
Peter Tyser [Tue, 3 Feb 2015 16:11:59 +0000 (10:11 -0600)]
nand: Remove unused CONFIG_MTD_NAND_ECC_JFFS2 option

This option was removed along with legacy NAND support in
be33b046b549ad88c204c209508cd7657232ffbd.  Clean up some remnants.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
9 years agomtd: nand: mxs: fix PIO_WORDs in mxs_nand_write_buf()
Luca Ellero [Tue, 16 Dec 2014 14:36:15 +0000 (15:36 +0100)]
mtd: nand: mxs: fix PIO_WORDs in mxs_nand_write_buf()

There is only one pio_word in this DMA transaction so data field must be 1.

Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
9 years agomtd: nand: mxs: fix PIO_WORDs in mxs_nand_read_buf()
Luca Ellero [Tue, 16 Dec 2014 14:36:14 +0000 (15:36 +0100)]
mtd: nand: mxs: fix PIO_WORDs in mxs_nand_read_buf()

There is only one pio_word in this DMA transaction so data field must be 1.

Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
9 years agoARM: tegra: colibri_t20: fix nand pinmux
Marcel Ziswiler [Fri, 27 Mar 2015 00:31:45 +0000 (01:31 +0100)]
ARM: tegra: colibri_t20: fix nand pinmux

Pingroup ATC seems to come out of reset with config set to NAND, so we
need to explicitly configure some other function to this group in order
to avoid clashing settings.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agotegra: pinmux: fix FUNCMUX_NDFLASH_KBC_8_BIT
Lucas Stach [Fri, 27 Mar 2015 00:31:44 +0000 (01:31 +0100)]
tegra: pinmux: fix FUNCMUX_NDFLASH_KBC_8_BIT

Even the 8-bit case needs KBCB configured, as pin D7 is located in this
pingroup.

Please note that pingroup ATC seems to come out of reset with its
config set to NAND so one needs to explicitly configure some other
function to this group in order to avoid clashing settings which is
outside the scope of this patch.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: update colibri_t20 configuration
Marcel Ziswiler [Thu, 26 Mar 2015 01:17:27 +0000 (02:17 +0100)]
ARM: tegra: update colibri_t20 configuration

Bring the Colibri T20 configuration in-line with Apalis/Colibri T30.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: fix colibri_t20 asix reset
Marcel Ziswiler [Thu, 26 Mar 2015 01:17:07 +0000 (02:17 +0100)]
ARM: tegra: fix colibri_t20 asix reset

Fix ASIX USB to Ethernet chip reset.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: fix colibri_t20 machine type
Marcel Ziswiler [Thu, 26 Mar 2015 01:16:33 +0000 (02:16 +0100)]
ARM: tegra: fix colibri_t20 machine type

A while ago I got Russell to change the machine type of our Colibri T20
from COLIBRI_TEGRA2 to COLIBRI_T20 which at least in parts is also
reflected in his machine registry:

http://www.arm.linux.org.uk/developer/machines/list.php?id=3323

For us it is really very beneficial to actually still be able to boot
downstream L4T kernel with its working hardware accelerated
graphics/multimedia stack albeit it being proprietary/closed-source.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: rename colibri_t20 board/configuration/device-tree
Marcel Ziswiler [Thu, 26 Mar 2015 00:31:54 +0000 (01:31 +0100)]
ARM: tegra: rename colibri_t20 board/configuration/device-tree

In accordance with our other modules supported by U-Boot and as agreed
upon for Apalis/Colibri T30 get rid of the carrier board in the board/
configuration/device-tree naming.

While at it also bring the prompt more in line with our other products.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: get rid of colibri_t20-common
Marcel Ziswiler [Thu, 26 Mar 2015 00:31:53 +0000 (01:31 +0100)]
ARM: tegra: get rid of colibri_t20-common

As a preparatory step to renaming the board folder as well first get
rid of the colibri_t20-common after having integrated it into
colibri_t20_iris for now.

While at it also migrate to using NVIDIA's common.mk magic.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agotegra: seaboard: Correct the gpio_request() call
Simon Glass [Tue, 10 Mar 2015 01:12:57 +0000 (19:12 -0600)]
tegra: seaboard: Correct the gpio_request() call

Requesting a GPIO without a name is not supposed anymore. This causes the
request to fail. Add a name so that the serial console works on seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agotegra: seaboard: Remove unused CONFIG_UART_DISABLE_GPIO
Simon Glass [Tue, 10 Mar 2015 01:12:56 +0000 (19:12 -0600)]
tegra: seaboard: Remove unused CONFIG_UART_DISABLE_GPIO

This CONFIG is not used, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: enable MIPI PAD CTRL support for Tegra124
Stephen Warren [Wed, 25 Mar 2015 18:04:37 +0000 (12:04 -0600)]
ARM: tegra: enable MIPI PAD CTRL support for Tegra124

This allows selection between CSI and DSI_B on the MIPI pads.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: pinctrl: add support for MIPI PAD control groups
Stephen Warren [Wed, 25 Mar 2015 18:04:36 +0000 (12:04 -0600)]
ARM: tegra: pinctrl: add support for MIPI PAD control groups

Some pinmux controls are in a different register set. Add support for
manipulating those in a similar way to existing pins/groups.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: pinctrl: minor cleanup
Stephen Warren [Wed, 25 Mar 2015 18:04:35 +0000 (12:04 -0600)]
ARM: tegra: pinctrl: minor cleanup

Move struct pmux_pingrp_desc type and tegra_soc_pingroups variable
declaration together with other pin/mux level definitions. Now the whole
file is grouped/ordered pin/mux-related then drvgrp-related definitions.

Fix typo in ifdef comment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agoARM: tegra: pinctrl: move Tegra210 code to the correct dir
Stephen Warren [Wed, 25 Mar 2015 18:04:34 +0000 (12:04 -0600)]
ARM: tegra: pinctrl: move Tegra210 code to the correct dir

Patches that added the Tegra210 pinctrl driver and renamed directories
arch/arm/cpu/tegra{$soc}-common -> arch/arm/mach-tegra/tegra-${soc}
crossed. Move the Tegra210 pinctrl driver to the correct location. This
wasn't detected since Tegra210 support is in the process of being added,
and isn't buildable yet.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
9 years agospi: designware_spi: revisit FIFO size detection again
Axel Lin [Thu, 26 Feb 2015 02:45:22 +0000 (10:45 +0800)]
spi: designware_spi: revisit FIFO size detection again

By specification the FIFO size would be in a range 2-256 bytes. From TX Level
prospective it means we can set threshold in the range 0-(FIFO size - 1) bytes.
Hence there are currently two issues:
  a) FIFO size 2 bytes is actually skipped since TX Level is 1 bit and could be
     either 0 or 1 byte;
  b) FIFO size is incorrectly decreased by 1 which already done by meaning of
     TX Level register.

Fixes: 501943696ea4 (spi: designware_spi: Fix detecting FIFO depth)
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agospi: cf_spi: Staticize local functions
Axel Lin [Fri, 20 Feb 2015 16:19:28 +0000 (00:19 +0800)]
spi: cf_spi: Staticize local functions

Make local functions static and remove unneeded forward declarations.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agospi: cf_spi: Use to_cf_spi_slave to resolve cfslave from slave
Axel Lin [Fri, 20 Feb 2015 16:17:47 +0000 (00:17 +0800)]
spi: cf_spi: Use to_cf_spi_slave to resolve cfslave from slave

Don't assume slave is always the first member of struct cf_spi_slave.
Use container_of instead of casting first structure member.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agoqspi: dra7x: enable quad mode read for ti-qspi driver
Ravi Babu [Wed, 11 Feb 2015 23:54:29 +0000 (18:54 -0500)]
qspi: dra7x: enable quad mode read for ti-qspi driver

This patch enables QUAD read mode for qspi to improve the
read performace while loading the binaries from qspi.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agospi: ftssp010_spi: Use to_ftssp010_spi() to ensure free correct address
Axel Lin [Mon, 9 Feb 2015 07:11:09 +0000 (15:11 +0800)]
spi: ftssp010_spi: Use to_ftssp010_spi() to ensure free correct address

Don't assume slave is always the first member of struct ftssp010_spi.
Use to_ftssp010_spi() to ensure free correct address in spi_free_slave().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agospi: davinci: Remove duplicate code to set bus and cs for slave
Axel Lin [Tue, 13 Jan 2015 01:01:19 +0000 (09:01 +0800)]
spi: davinci: Remove duplicate code to set bus and cs for slave

It's done in spi_alloc_slave().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agospi: cf_qspi: Fixup to_cf_qspi_slave macro
Axel Lin [Thu, 15 Jan 2015 05:32:55 +0000 (13:32 +0800)]
spi: cf_qspi: Fixup to_cf_qspi_slave macro

The third parameter of container_of is the name of the member within the struct.
Current code only works if the parameter passed to to_cf_qspi_slave named slave.
Fix it.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
9 years agosunxi: UTOO_P66: Add missing MAINTAINERS entry
Hans de Goede [Sun, 29 Mar 2015 12:55:18 +0000 (14:55 +0200)]
sunxi: UTOO_P66: Add missing MAINTAINERS entry

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agosunxi: a10-LIME set the cpu clock at boot to 912MHz
Iain Paton [Sat, 28 Mar 2015 10:27:40 +0000 (10:27 +0000)]
sunxi: a10-LIME set the cpu clock at boot to 912MHz

following kernel patches to reduce the cpu clock to 912MHz due to
reported instability at 1008MHz, select 912MHz as the boot speed
for the a10-lime

Signed-off-by: Iain Paton <ipaton0@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agosunxi: use CONFIG_SYS_CLK_FREQ to set cpu clock
Iain Paton [Sat, 28 Mar 2015 10:26:38 +0000 (10:26 +0000)]
sunxi: use CONFIG_SYS_CLK_FREQ to set cpu clock

make the CPU clock selectable via Kconfig

this removes the sunxi specific CONFIG_CLK_FULL_SPEED defined in each
soc header and replaces it's use in board/sunxi/board.c with
CONFIG_SYS_CLK_FREQ from Kconfig which allows us to configure board
specific frequency on boot

Signed-off-by: Iain Paton <ipaton0@gmail.com>
[hdegoede@redhat.com s/CONFIG_SYS_CLK_FREQ/CONFIG_TIMER_CLK_FREQ/ for the
 arch-timer clk speed on sun7i to fix mis-compile on sun7i]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agosunxi: sun4i: improve cpu clock selection method
Iain Paton [Sat, 28 Mar 2015 10:25:28 +0000 (10:25 +0000)]
sunxi: sun4i: improve cpu clock selection method

clock_set_pll1 would pick the next highest available cpu clock speed if
a value not in the pre defined table was selected. this potentially
results in overclocking the soc.

reverse the selection method so that we select the next lowest speed
and add the missing 912Mhz setting that's requested by sun7i which also
uses the sun4i clock code.

Signed-off-by: Iain Paton <ipaton0@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agosunxi: musb: Fix some lo speed devices not working with musb host
Hans de Goede [Fri, 27 Mar 2015 19:54:25 +0000 (20:54 +0100)]
sunxi: musb: Fix some lo speed devices not working with musb host

The usb0 / otg phy on sunxi boards has a bug where it wrongly detects a
high speed squelch on usb reset deassert when a lo speed device is plugged in.

The android kernel has a work around for this in the form of temporary
disabling the phy's squelch detection on reset deassert, this commit adds
the same workaround to the u-boot sunxi musb code, thereby fixing various usb
lo speed devices not working.

Tested with a (before non working) usb keyboard and a usb 2.4 GHz wireless
keyboard/mouse combo receiver.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
9 years agopowerpc: ppc4xx: convert AMCC boards to generic board
Anatolij Gustschin [Sat, 28 Mar 2015 15:49:47 +0000 (16:49 +0100)]
powerpc: ppc4xx: convert AMCC boards to generic board

Add CONFIG_SYS_GENERIC_BOARD to amcc-common.h and CONFIG_DISPLAY_BOARDINFO
to Kconfig files. canyonlands.h includes amcc-common.h, so remove
CONFIG_SYS_GENERIC_BOARD definition there.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Feng Kan <fkan@amcc.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
9 years agoPatch to mkenvimage to handle text files with length that exceed env size
Brian McFarland [Thu, 12 Mar 2015 15:52:49 +0000 (11:52 -0400)]
Patch to mkenvimage to handle text files with length that exceed env size

The current head revision of mkenvimage
(e72be8947e129f5ab274c0a9f235d2cc0014b2ea) will prevent you from creating
an env image from a text file that is larger than the env length specified
by the '-s' option.  That doesn't make sense given that the tool now allows
comments and blank lines.  This patch removes that limitation and allows
longer text files to be used.

I don't have time / desire at the moment to figure out "patman" and could
really care less if this is adopted up stream.  Just figured I would share
in case anybody else finds it useful enough to take time to do a proper
patch.

>From 39ff30190c2bf687861f4b4b33230f1944fb64f9 Mon Sep 17 00:00:00 2001
From: Brian McFarland <bmcfarland@rldrake.com>
Date: Thu, 12 Mar 2015 11:37:19 -0400
Subject: [PATCH] In mkenvimage, removed the check that prevented using a
 source text file larger than the output environment image.  Instead, the main
 parsing loop checks to see if the environment buffer is full, and quits if it
 is.  After the main parse loop, a second loop swallows comments and
 whitespace until either the EOF is reached or more env vars are found, in
 which case an error will be thrown.

9 years agom68k: fix 3 broken boards
angelo@sysam.it [Sat, 28 Mar 2015 10:34:52 +0000 (11:34 +0100)]
m68k: fix 3 broken boards

Fix eb_cpu5282 and eb_cpu5282_internal unresolved external error.
These boards have video but don't need any ppc related
video_setmem().

Fix M53017EVB moving away embedded env to a different offset,
as in M52277EVB.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
9 years agocommon/board_f: move board_init_f_mem() from #else CONFIG_X86
Alexey Brodkin [Tue, 24 Mar 2015 08:12:47 +0000 (11:12 +0300)]
common/board_f: move board_init_f_mem() from #else CONFIG_X86

Purpose of this change is to make it possible to re-use code currently
used on X86 solely for other architectures. For example:
 * init_sequence_f_r
 * board_init_f_r

Even though board_init_f_mem() has nothing to do with any particular
architecture it won't work (at least in current implementation) for X86.

This is because on X86 "gd" is an alias to function get_fs_gd_ptr(),
thus we cannot assign anything to it.

So this change separates selection of board_init_f_mem() from X86 while
keeping it disabled for X86 still.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
9 years agovexpress64: cut config and defaults for unclear variant
Linus Walleij [Mon, 23 Mar 2015 10:06:14 +0000 (11:06 +0100)]
vexpress64: cut config and defaults for unclear variant

This variant that is neither FVP / Base Model or Juno Versatile
Express 64bit is confusing. Get rid of it unless someone can
point out what machine that really is. Seems to be an evolutional
artifact in the config base.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
9 years agoarmv8: semihosting: delete external interface
Linus Walleij [Mon, 23 Mar 2015 10:06:13 +0000 (11:06 +0100)]
armv8: semihosting: delete external interface

Now that loading files using semihosting can be done using
a command in standard scripts, and we have rewritten the boardfile
and added it to the Vexpress64, let's delete the external
interface to the semihosting file retrieveal and rely solely
on these commands, and staticize them inside that file so the
whole business is self-contained.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>