Kumar Gala [Tue, 29 Apr 2008 17:54:59 +0000 (12:54 -0500)]
85xx: Add -mno-spe to e500/85xx builds
Newer gcc's might be configured to enable autovectorization by default.
If we happen to build with one of those compilers we will get SPE
instructions in random code.
-mno-spe disables the compiler for automatically generating SPE
instructions without our knowledge.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Mon, 28 Apr 2008 07:24:04 +0000 (02:24 -0500)]
85xx: Additional fixes and cleanup of MP code
* adjust __spin_table alignment to match ePAPR v0.94 spec
* loop over all cpus when determing who is up. This fixes an issue if
the "boot cpu" isn't core0. The "boot cpu" will already be in the
cpu_up_mask so there is no harm
* Added some protection in the code to ensure proper behavior. These
changes are explicitly needed but don't hurt:
- Added eieio to ensure the "hot word" of the table is written after
all other table updates have occurred.
- Added isync to ensure we don't prefetch loading of table entries
until we a released
These issues we raised by Dave Liu.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
ppc flush_cache: add watch-dog triggering into the loops.
Some boards (e.g. lwmon5) need rather a frequent watch-dog
kicking. Since the time it takes for the flush_cache() function
to complete its job depends on the size of data being flushed, one
may encounter watch-dog resets on such boards when, for example,
download big files over ethernet.
Stefan Roese [Tue, 29 Apr 2008 11:57:07 +0000 (13:57 +0200)]
ppc4xx: Complete remove bogus dflush()
Since the current dflush() implementation is know to have some problems
(as seem on lwmon5 ECC init) this patch removes it completely and replaces
it by using clean_dcache_range().
Stefan Roese [Tue, 29 Apr 2008 11:36:51 +0000 (13:36 +0200)]
ppc4xx: Change ECC initialization on lwmon5 to use clean_dcache_range()
As it seems the "old" ECC initialization routine by using dflush() didn't
write all lines in the dcache back to memory on lwmon5. This could lead
to ECC error upon Linux booting. This patch changes the program_ecc()
routine to now use clean_dcache_range() instead of dflush().
clean_dcache_range() uses dcbst which is exactly what we want in this
case.
Since dflush() is known is cause problems, this routine will be
removed completely and replaced by clean_dcache_range() with an
additional patch.
Markus Brunner [Mon, 28 Apr 2008 06:47:47 +0000 (08:47 +0200)]
ppc4xx: Fixup ebc clock in FDT for 405GP/EP
On ppc405EP and ppc405GP (at least) the ebc is directly attached to the plb
and not to the opb. This patch will try to fixup /plb/ebc if /plb/opb/ebc
doesn't exist.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Arithmetic expressions do not get evaluated under stringification. Remove
default network configuration, add DHCP command support. Thanks to Felix
Radensky for reporting.
Roy Zang [Fri, 25 Apr 2008 05:55:09 +0000 (00:55 -0500)]
MPC8544DS: Removes the unknown flash message information
This patch removes the unknown flash message information:
'## Unknown FLASH on Bank 1 - Size = 0xdeadbeef = -286261248 MB'
This unknown flash message is caused by PromJet.
Some of the board user is unhappy with this information.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch adds a configurable flash auto protection list that can be used
to make U-Boot protect flash regions in flash_init().
The idea has been discussed on the u-boot mailing list starting
on Nov 18th, 2007.
Even this patch brings a new feature it is used as a bugfix for 4xx
platforms where flash_init() does not completely protect the
monitor's flash range in all situations.
U-Boot protects the flash range from CFG_MONITOR_BASE to
(CFG_MONITOR_BASE + monitor_flash_len - 1) by default. This does not
include the reset vector at 0xfffffffc.
Stefan Roese [Tue, 22 Apr 2008 10:20:32 +0000 (12:20 +0200)]
ppc4xx: Pass PCIe root-complex/endpoint configuration to Linux via the fdt
The PCIe root-complex/endpoint setup as configured via the "pcie_mode"
environment variable will now get passed to the Linux kernel by setting
the device_type property of the PCIe device tree node. For normal root-
complex configuration it will keep its defaults value of "pci" and for
endpoint configuration it will get changed to "pci-endpoint".
Use the GPT0_MASKx registers as the temporary storage for watch-dog
timer POST test instead of GPT0_COMPx. The latter
(GPT0_COMP1..GPT0_COMP5) are used for the log-buffer header.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Add support for calculating hashes with watchdog triggering
Implement watchodg-aware variants of hash calculation functions:
- crc32_wd()
- md5_wd()
- sha1_csum_wd()
The above functions calculate the hash of the input buffer in chunks,
triggering the watchdog after processing each chunk. The chunk size
is given as a function call parameter.
As suggested by Wolfgang Denk:
- image printing functions:
- remove wrappers
- remove indentation prefix from functions' signatures
- merge getenv_verify and getenv_autostart into one parametrized function
Mike Frysinger [Mon, 31 Mar 2008 15:02:01 +0000 (11:02 -0400)]
crc32: use uint32_t rather than unsigned long
The envcrc.c does sizeof(unsigned long) when calculating the crc, but
this is done with the build toolchain instead of the target tool
chain, so if the build is a 64bit system but the target is 32bits,
the size will obviously be wrong. This converts all unsigned long
stuff related to crc32 to uint32_t types. Compile tested only: output
of ./tools/envcrc when run on a 32bit build system matches that of a
64bit build system.
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Dirk Behme [Wed, 26 Mar 2008 08:53:29 +0000 (09:53 +0100)]
ARM: Davinci: Fix DM644x timer overflow handling and cleanup
Fix ARM based DaVinci DM644x timer overflow handling and cleanup timer code.
Changes:
- Remove *_masked() functions as noted by Wolfgang
- Adapt register naming to recent TI spec (sprue26, March 2007)
- Fix reset_timer() handling
- As reported by Pieter [1] the overflow fix introduced a delay of factor 16 (e.g 2 seconds became 32). While the overflow fix is basically okay, it missed to divide udelay by 16, too. Fix this.
Limit the rate of h/w watch-dog triggering on the LWMON5 board by
the CONFIG_WD_MAX_RATE value.
Note that an earlier version of this patch which used microseconds
instead of ticks dis not work. The problem was that we used
usec2ticks() to convert microseconds into ticks. usec2ticks() uses
get_tbclk(), which in turn calls get_sys_info(). It turns out that
this function does a lot of prolonged operations (like divisions)
which take too much time so we do not trigger the watchdog in time,
and it resets the system.
Yuri Tikhonov [Mon, 31 Mar 2008 08:51:37 +0000 (10:51 +0200)]
POST: move CONFIG_POST to Makefiles
Introduce the new logical option CONFIG_HAS_POST which is set when the
platform has CONFIG_POST set. Use CONFIG_HAS_POST in the post/ Makefiles
to determine should the POST libs be compiled for the selected target
platform, or not.
To avoid breaking u-boot linking process, the empty post/libpost.a file is
created for platforms which do not have POSTs.
Signed-off-by: Yuri Tikhonov <yur@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
Stefan Roese [Tue, 22 Apr 2008 12:14:20 +0000 (14:14 +0200)]
ppc4xx: Fix Canyonlands and Glacier default environment for fdt usage
This patch fixes the Canyonlands and Glacier default environment to better
fit to the arch/powerpc device-tree kernels. The variables dealing with
arch/ppc booting are removed, since these boards are supported only in
arch/powerpc. Glacier uses the same config file as Canyonlands.
Also, the Glacier now uses non-FPU rootpath, since 460GT has no FPU.
- enable esd's auto_update mechanism
- fix LCD support on latest hardware revision (uses other LCD controller)
- support alternative flash layout on rev. 1.8 boards
- coding style cleanup
projects / u-boot.git / log