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6 months agoboard: phytec: common: k3: Copy fixed partitions to OS device tree
Wadim Egorov [Mon, 10 Jun 2024 13:33:42 +0000 (15:33 +0200)]
board: phytec: common: k3: Copy fixed partitions to OS device tree

Copy fixed-partitions nodes from U-Boot device tree to OS device tree.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
6 months agoarch: arm: dts: k3-am642-phyboard-electra: Add fixed partitions
Nathan Morrisson [Mon, 10 Jun 2024 13:33:41 +0000 (15:33 +0200)]
arch: arm: dts: k3-am642-phyboard-electra: Add fixed partitions

Add a fixed partitions node to the AM64x device tree so that it can
be used to fixup the Linux device tree.

Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
6 months agoarch: arm: dts: k3-am625-phyboard-lyra: Add fixed partitions
Nathan Morrisson [Mon, 10 Jun 2024 13:33:40 +0000 (15:33 +0200)]
arch: arm: dts: k3-am625-phyboard-lyra: Add fixed partitions

Add a fixed partitions node to the AM62x device tree so that it can
be used to fixup the Linux device tree.

Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
6 months agoMerge tag 'u-boot-stm32-20240618' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Tue, 18 Jun 2024 14:35:30 +0000 (08:35 -0600)]
Merge tag 'u-boot-stm32-20240618' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

STM32MP15/13
------------
  _ Reserve OPTEE area in EFI memory map
  _ net: dwc_eth_qos: add support for phy-reset-gpios property
  _ Add eth1/2 support for stm32mp13
  _ Add PWR regulator support for stm32mp13
  _ Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board
  _ Add support for STM32MP13xx DHCOR SoM and DHSBC board
  _ Set PLL4_P to 125Mhz for ETH_CLK for stm32mp157c-odyssey
  _ Use internal clock for Tx for stm32mp157c-odyssey
  _ Fix incorrect PHY address for stm32mp157c-odyssey
  _ Add phy-reset-gpios property to ethernet node for stm32mp157c-odyssey
  _ Add generic SoM compatible to STM32MP15xx DH electronics DHSOM
  _ Auto-detect second MAC on STM32MP15xx DH electronics DHCOM

6 months agoARM: dts: stm32: Auto-detect second MAC on STM32MP15xx DH electronics DHCOM
Marek Vasut [Thu, 6 Jun 2024 13:01:48 +0000 (15:01 +0200)]
ARM: dts: stm32: Auto-detect second MAC on STM32MP15xx DH electronics DHCOM

Test whether this system is compatible with STM32MP15xx DHCOM SoM,
if so, test whether R292 pull up is populated on pin PC3, which is
an indication that the second MAC chip, KS8851-16MLL, is populated.
Use this information to patch 'status' DT property into the second
ethernet MAC DT node and enable/disable the MAC on systems where
the chip is/isn't populated respectively.

Use spl_perform_fixups() to patch the U-Boot proper DT from SPL and
ft_board_setup() to patch Linux DT from U-Boot proper. This way both
software components are configured the same way.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agoARM: dts: stm32: Add generic SoM compatible to STM32MP15xx DH electronics DHSOM
Marek Vasut [Thu, 16 May 2024 23:47:04 +0000 (01:47 +0200)]
ARM: dts: stm32: Add generic SoM compatible to STM32MP15xx DH electronics DHSOM

Add generic SoM compatible string into machine compatible string
for all STM32MP15xx based DH electronics DHSOM. This way, common
board code can match on this compatible. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agoARM: dts: stm32: add phy-reset-gpios property to ethernet node for stm32mp157c-odyssey
Heesub Shin [Sun, 28 Apr 2024 14:24:06 +0000 (23:24 +0900)]
ARM: dts: stm32: add phy-reset-gpios property to ethernet node for stm32mp157c-odyssey

In Odyssey board, we should reset the PHY chipset, toggling G0 pin.

Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agoARM: dts: stm32: fix incorrect PHY address for stm32mp157c-odyssey
Heesub Shin [Sun, 28 Apr 2024 14:24:04 +0000 (23:24 +0900)]
ARM: dts: stm32: fix incorrect PHY address for stm32mp157c-odyssey

In Odyssey board, KSZ9031 is at the PHY address 0x7, not 0x0. This
commit fixes it.

Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agoARM: dts: stm32: use internal clock for Tx for stm32mp157c-odyssey
Heesub Shin [Sun, 28 Apr 2024 14:24:03 +0000 (23:24 +0900)]
ARM: dts: stm32: use internal clock for Tx for stm32mp157c-odyssey

In Odyssey board, we should use the internal clock from RCC as the
transmit clock, instead of the external clock from ETH_CLK125 pad. This
commit adds a property, st,eth-clk-sel, so that the ETH_CLK_SEL mux
selects ETH_CLK.

Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agoARM: dts: stm32: set PLL4_P to 125Mhz for ETH_CLK for stm32mp157c-odyssey
Heesub Shin [Sun, 28 Apr 2024 14:24:02 +0000 (23:24 +0900)]
ARM: dts: stm32: set PLL4_P to 125Mhz for ETH_CLK for stm32mp157c-odyssey

Odyssey board requires ETH_CLK of 125Mhz. This commit sets PLL4_P/Q/R to
125, 62.5 and 62.5Mhz in respectively.

Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agoARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board
Marek Vasut [Sat, 27 Apr 2024 22:20:38 +0000 (00:20 +0200)]
ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board

This stm32mp135f-dhcor-dhsbc board is a stack of DHCOR SoM based on
STM32MP135F SoC (900MHz / crypto capabilities) populated on DHSBC
carrier board.

The SoM contains the following peripherals:
- STPMIC (power delivery)
- 512MB DDR3L memory
- eMMC and SDIO WiFi module

The DHSBC carrier board contains the following peripherals:
- Two RGMII Ethernet ports
- USB-A Host port, USB-C peripheral port, USB-C power supply plug
- Expansion connector

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
6 months agoARM: dts: stm32: Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC...
Marek Vasut [Sat, 27 Apr 2024 22:20:37 +0000 (00:20 +0200)]
ARM: dts: stm32: Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board

Add new pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board.
The following pinmux nodes are added:
- ADC pins
- ADC CC pins
- ETH1 pins
- ETH2 pins
- I2C5 pins
- MCAN1 pins
- MCAN2 pins
- PWM13 pins
- PWM5 pins
- QSPI pins
- SAI1 pins
- SDMMC2 D4..D7 pins
- SPI2 pins
- SPI3 pins
- UART4 pins
- UART7 pins
- USART1 pins
- USART2 pins

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agoARM: dts: stm32: add eth1 and eth2 support on stm32mp13
Christophe Roullier [Sun, 21 Apr 2024 23:09:47 +0000 (01:09 +0200)]
ARM: dts: stm32: add eth1 and eth2 support on stm32mp13

Add both ethernet MACs based on GMAC SNPS IP on stm32mp13.

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agoARM: dts: stm32: Make PWR regulator driver available on STM32MP13xx
Marek Vasut [Tue, 19 Mar 2024 02:45:08 +0000 (03:45 +0100)]
ARM: dts: stm32: Make PWR regulator driver available on STM32MP13xx

This patch makes STM32 PWR regulators available on stm32mp13xx.
This requires TFA to clear RCC_SECCFGR, is disabled by default
on stm32mp13xx and can only be enabled on board config level.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agoARM: dts: stm32: add PWR regulators support on stm32mp131
Marek Vasut [Tue, 19 Mar 2024 02:45:07 +0000 (03:45 +0100)]
ARM: dts: stm32: add PWR regulators support on stm32mp131

This patch adds STM32 PWR regulators DT support on stm32mp131.
This requires TFA to clear RCC_SECCFGR, is disabled by default
and can only be enabled on board DT level.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agonet: dwc_eth_qos: add support for phy-reset-gpios property
Heesub Shin [Sun, 28 Apr 2024 14:24:05 +0000 (23:24 +0900)]
net: dwc_eth_qos: add support for phy-reset-gpios property

This commit adds support for a property 'phy-reset-gpios' to reset PHY
chipset.

Signed-off-by: Heesub Shin <heesub@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
6 months agostm32mp: Reserve OPTEE area in EFI memory map
Patrice Chotard [Mon, 22 Apr 2024 15:06:45 +0000 (17:06 +0200)]
stm32mp: Reserve OPTEE area in EFI memory map

Since commit 7b78d6438a2b3 ("efi_loader: Reserve unaccessible memory")
memory region above ram_top is tagged in EFI memory map as
EFI_BOOT_SERVICES_DATA.
In case of STM32MP1/STM32MP13 platforms, above ram_top, there is one
reserved-memory region tagged "no-map" dedicated to OP-TEE :
 _ addr=de000000 size=2000000 for stm32mp157x-dkx and stm32mp135f-dk
 _ addr=fe000000 size=2000000 for stm32mp157c-ev1

Before booting kernel, EFI memory map is first built, the OPTEE region is
tagged as EFI_BOOT_SERVICES_DATA and when reserving LMB, the tag LMB_NONE
is used.

Then after, the LMB are completed by boot_fdt_add_mem_rsv_regions()
which try to add again the same OPTEE region (addr=de000000 size=2000000
in case of stm32mp157x-dkx / stm32mp135f-dk or addr=fe000000 size=2000000
in case for stm2mp157c-ev1)
but now with LMB_NOMAP tag which produces the following error message :

 _ for stm32mp157x-dkx / stm32mp135f-dk :
  "ERROR: reserving fdt memory region failed (addr=de000000 size=2000000 flags=4)"

 _ for stm32mp157c-ev1 :
  "ERROR: reserving fdt memory region failed (addr=fe000000 size=2000000 flags=4)"

To avoid this, OPTEE area shouldn't be used by EFI, so we need to mark
it as reserved.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
6 months agoMerge tag 'xilinx-for-v2024.10-rc1' of https://source.denx.de/u-boot/custodians/u...
Tom Rini [Mon, 17 Jun 2024 17:01:35 +0000 (11:01 -0600)]
Merge tag 'xilinx-for-v2024.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

AMD/Xilinx changes for v2024.10-rc1

common:
- spl: Introduce SoC specific init function

xilinx:
- Enable FF-A and NVMEM
- Rename spl_board_init() to spl_soc_init()

zynqmp:
- DT alignments
- Enable reset from SPL
- Enable USB3 for KD240
- Align multiboot register on Kria for proper reboot
- Allow multiboot environment write even in saved environment
- Move zynqmp commands from board/ to arch/
- Clean up xilinx_zynqmp.h

versal:
- Do not prioritize boot device if driver is not enabled

versal-net:
- Setup location for redundant variables in SPI

versal2:
- Add support for new SOC

mmc:
- Fix tap delay for SD on Versal NET

spi:
- Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash part

gpio:
- Cover MODEPIN firmware dependency

6 months agoxilinx: Enable FF-A for all our arm64 SoCs
Michal Simek [Tue, 11 Jun 2024 11:06:58 +0000 (13:06 +0200)]
xilinx: Enable FF-A for all our arm64 SoCs

Enable FFA_TRANSPORT which also enable FFA command.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5a850b1558fad0f05c61de82110abe4c0e7fd2e4.1718104009.git.michal.simek@amd.com
6 months agoxilinx: versal-net: Add env redund offset
Venkatesh Yadav Abbarapu [Fri, 14 Jun 2024 12:51:10 +0000 (18:21 +0530)]
xilinx: versal-net: Add env redund offset

ENV_OFFSET_REDUND config is by default set to 0 for flashes.
Saving the env variables is overwriting data at 0 offset,
which is wrong. So add default redund env offset
ENV_OFFSET_REDUND at 0x7F00000 for Versal NET platform.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20240614125110.23058-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
6 months agogpio: Add proper dependency on ZYNQMP_FIRMWARE
Michal Simek [Thu, 6 Jun 2024 14:44:54 +0000 (16:44 +0200)]
gpio: Add proper dependency on ZYNQMP_FIRMWARE

ZYNQMP_FIRMWARE can be disabled and driver depends on it that's why record
this dependency via Kconfig.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c3ca38fbb2f4e6948a5ef95b369015de96259709.1717685091.git.michal.simek@amd.com
6 months agoarm64: zynqmp: Align #address/size-cells with node
Michal Simek [Thu, 6 Jun 2024 14:35:50 +0000 (16:35 +0200)]
arm64: zynqmp: Align #address/size-cells with node

zynqmp-mini-nand wasn't aligned with dt binding that's why fix it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3916fde2e896b8be8863505305118903e0644ab0.1717684544.git.michal.simek@amd.com
6 months agoxilinx: zynqmp: Enable reset_cpu() in SPL
Lukas Funke [Fri, 7 Jun 2024 09:26:08 +0000 (11:26 +0200)]
xilinx: zynqmp: Enable reset_cpu() in SPL

This commit enables SPL to reset the CPU via PMU-firmware. The usual
reset mechanism requires bl31 to be loaded which may not be the case in
SPL.

Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Link: https://lore.kernel.org/r/20240607092608.712996-2-lukas.funke-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
6 months agoarm64: zynqmp: Enable usb3 for k24 som
Neal Frager [Tue, 4 Jun 2024 08:38:54 +0000 (09:38 +0100)]
arm64: zynqmp: Enable usb3 for k24 som

This patch corrects the mio and pll configuration registers for using usb3
on the kd240 starter kit.  Without this patch, the usb3 to sd card bridge does
not initialize correctly and u-boot is unable to find the OS located on the
kd240 starter kit sd card.

In addition, this patch correctly configures mio76 and mio77 as gpio pins
which are used as reset gpio pins on the kd240 starter kit.

Signed-off-by: Neal Frager <neal.frager@amd.com>
Link: https://lore.kernel.org/r/20240604083854.2033917-1-neal.frager@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
6 months agoarm64: zynqmp: Setup multiboot register to 0
Michal Simek [Mon, 3 Jun 2024 13:09:01 +0000 (15:09 +0200)]
arm64: zynqmp: Setup multiboot register to 0

On Kria when board starts from Image A or Image B partition multiboot
register is already setup to that location. When reset command is called
board is issuing soft reset which start SW at already used location (offset
of multiboot * 32k).
But board should continue to run from multiboot offset 0 (start of QSPI)
and call early bootloader every reboot that's why clear multiboot register
to 0 by default to go that route all the time.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/edaf714a778bdd7447533a77b3455e4fd623f9da.1717420131.git.michal.simek@amd.com
6 months agospi: versal2: Enable spi drivers for Versal Gen 2
Michal Simek [Wed, 29 May 2024 14:48:01 +0000 (16:48 +0200)]
spi: versal2: Enable spi drivers for Versal Gen 2

Enable and update OSPI/QSPI/GQSPI drivers to support Versal Gen 2 SoCs.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/691782470f56f7d49a3204f6757296f2752d4156.1716994063.git.michal.simek@amd.com
6 months agommc: versal2: Update zynq_sdhci driver to support AMD Versal Gen 2
Michal Simek [Wed, 29 May 2024 14:48:00 +0000 (16:48 +0200)]
mmc: versal2: Update zynq_sdhci driver to support AMD Versal Gen 2

Enable tap delay programming for new SoC and also enable it via defconfig.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f07daded9704cbc393657b65a28933c34a8cec25.1716994063.git.michal.simek@amd.com
6 months agosoc: versal2: Add SoC driver for AMD Versal Gen 2
Michal Simek [Wed, 29 May 2024 14:47:59 +0000 (16:47 +0200)]
soc: versal2: Add SoC driver for AMD Versal Gen 2

Communication is happening via firmware interface (SMC) or via direct
register reading if firmware driver is not available.

Also enable it via defconfig.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/22cf9c765e47ab03dbf2b8363e6626e809113432.1716994063.git.michal.simek@amd.com
6 months agoarm64: versal2: Add support for AMD Versal Gen 2
Michal Simek [Wed, 29 May 2024 14:47:58 +0000 (16:47 +0200)]
arm64: versal2: Add support for AMD Versal Gen 2

Add support for AMD Versal Gen 2. SoC is based on Cortex-a78ae 4 cluster/2
cpu core each. A lot of IPs are shared with previous families. There are
couple of new IP blocks where the most interesting from user point of view
is UFS.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bc2b70831ce1031bd0fac32357bff84936e1310f.1716994063.git.michal.simek@amd.com
6 months agoarm64: zynqmp: Update rproc node
Michal Simek [Thu, 30 May 2024 10:39:23 +0000 (12:39 +0200)]
arm64: zynqmp: Update rproc node

remoteproc node should be updated to be aligned with the latest dt-schema.

Reviewed-by: Tanmay Shah <tanmay.shah@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d8247a46f486a612f85767de9b832ad33fa980fe.1717065556.git.michal.simek@amd.com
6 months agoxilinx: versal: Do not prioritize boot device if driver is not enabled
Venkatesh Yadav Abbarapu [Fri, 10 May 2024 06:22:38 +0000 (08:22 +0200)]
xilinx: versal: Do not prioritize boot device if driver is not enabled

SOC can boot out of the device which is not accessible from APU and running
this is detected as a warning, as the device is not accessible.For example
getting below warning when the boot mode is OSPI and OSPI is not enabled in
device tree.
Invalid bus 0 (err=-19)
Failed to initialize SPI flash at 0:0 (error -19)

Ignoring the prioritization of the boot device which driver is not enabled
and continue with the default boot_targets. Recommendation is to use custom
boot_targets via environment file as is done for example for Kria via
zynqmp_kria.env file.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8b7cca5c7b84cb4854104e0c48f8aa63c4ec5ace.1715322156.git.michal.simek@amd.com
6 months agomtd: spi-nor: Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash part
Prasad Kummari [Wed, 8 May 2024 05:27:50 +0000 (10:57 +0530)]
mtd: spi-nor: Add SPI_NOR_OCTAL_READ flag for mx66uw2g345gx0 flash part

Added SPI_NOR_OCTAL_READ flag for Macronix mx66uw2g345gx0 2Gb(256MB)
NOR Flash memory. Initial testing was conducted on the Versal NET board
using SDR mode, which included basic erase, write, and read-back
operations.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Link: https://lore.kernel.org/r/20240508052749.214286-1-prasad.kummari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
6 months agoarm64: zynq(mp): Rename spl_board_init() to spl_soc_init()
Lukas Funke [Wed, 27 Mar 2024 12:11:53 +0000 (13:11 +0100)]
arm64: zynq(mp): Rename spl_board_init() to spl_soc_init()

Rename spl_board_init() to spl_soc_init(). SoC specific
implementation should be separated from board specific implementation
in order to be extended by board developers.

Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20240327121153.2455126-3-lukas.funke-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
6 months agospl: Introduce SoC specific init function
Lukas Funke [Wed, 27 Mar 2024 12:11:52 +0000 (13:11 +0100)]
spl: Introduce SoC specific init function

Some architectures use spl_board_init() in their SoC specific
implementation. Board developers should be able to add board specific
implementation via spl_board_init(). Hence, introduce a spl_soc_init()
method which is called right before spl_board_init() for SoC
specific implementation.

Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Link: https://lore.kernel.org/r/20240327121153.2455126-2-lukas.funke-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
6 months agoxilinx: zynqmp: Allow multiboot environment write even in saved environment
Kory Maincent [Wed, 29 May 2024 10:01:06 +0000 (12:01 +0200)]
xilinx: zynqmp: Allow multiboot environment write even in saved environment

Once the environment was saved, the current multiboot image information
became unreachable. When dealing with firmware updates, this information
is necessary alongside the saved environment to know the booted image.

Move the multiboot environment set operation before the saved environment
check to ensure this information is always available.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Link: https://lore.kernel.org/r/20240529100107.137159-1-kory.maincent@bootlin.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
6 months agosdhci: zynq: Fix tap delay for SD on Versal NET
Simek, Michal [Thu, 18 Apr 2024 08:06:13 +0000 (20:06 -1200)]
sdhci: zynq: Fix tap delay for SD on Versal NET

I can't see any way how tap delays are setup on Versal NET platform because
xlnx,versal-8.9a compatible string is also used there but driver is not
letting to setup tap delays. Not sure if versal_iclk_phases[] is also valid
for Versal NET but the patch is made to investigate it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e535cfc1a59b5146a5c9a3ab389dc770de80440c.1713427490.git.michal.simek@amd.com
6 months agoboard: zynqmp: Move zynqmp commands from board/ to arch/
Charlie Johnston [Wed, 10 Apr 2024 19:50:08 +0000 (12:50 -0700)]
board: zynqmp: Move zynqmp commands from board/ to arch/

The zynqmp cmds.c is currently tied to the board but the commands
contained within are more closely tied to the architecture. To
allow usage of those commands when the architecture is ZynqMP but
the board is not, this change moves the cmds into the arch/ tree.

The source file is renamed to zynqmp.c to reflect the command name
as well.

Signed-off-by: Charlie Johnston <charlie.johnston@loftorbital.com>
Link: https://lore.kernel.org/r/20240410195008.405061-2-charlie.johnston@loftorbital.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
6 months agoxilinx: Enable NVMEM framework for all platforms
Michal Simek [Thu, 11 Apr 2024 06:04:16 +0000 (08:04 +0200)]
xilinx: Enable NVMEM framework for all platforms

Boards which have for example MAC address in eeprom but not in Xilinx
format (legacy or FRU) could reference it via nvmem cells.
For example:

&gem0 {
nvmem-cells = <&mac>;
nvmem-cell-names = "mac-address";
};

&eeprom {
#address-cells = <1>;
#size-cells = <1>;
mac: mac-address@f0 {
reg = <0xf0 6>;
};
};

For getting it work above DT changes are required but also CONFIG_NVMEM
should be enabled. That's why enable it by default in generic defconfigs
to be able to use it directly by changing DT only.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9c8ee7a4c7a16367438a92a4c9581bac9d968f84.1712815454.git.michal.simek@amd.com
6 months agoxilinx: zynqmp: Clean up xilinx_zynqmp.h
Michal Simek [Mon, 15 Apr 2024 07:55:33 +0000 (09:55 +0200)]
xilinx: zynqmp: Clean up xilinx_zynqmp.h

Options are moving to Kconfig by running sed and comments are staying in
that's why do clean up and remove useless comments.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fa117ac482591d3d5957af54fe99e6acc89972e3.1713167731.git.michal.simek@amd.com
6 months agoMerge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-watchdog into...
Tom Rini [Sun, 16 Jun 2024 15:10:13 +0000 (09:10 -0600)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-watchdog into next

- misc cyclic infrastructure improvements (Rasmus)
- watchdog_reset cleanup (Rasmus)

CI: https://dev.azure.com/sr0718/u-boot/_build/results?buildId=369&view=results

6 months agoMerge tag 'u-boot-rockchip-next-20240615' of https://source.denx.de/u-boot/custodians...
Tom Rini [Sun, 16 Jun 2024 15:09:07 +0000 (09:09 -0600)]
Merge tag 'u-boot-rockchip-next-20240615' of https://source.denx.de/u-boot/custodians/u-boot-rockchip into next

CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/21113

- New board: Theobroma Systems SOM-RK3588-Q7 Tiger, ArmSoM Sige7 Rk3588;
- PX30 dts migrate to OF_UPSTREAM;
- Some other update on board or config;

6 months agopowerpc: mpc85xx: remove dead watchdog-related code
Rasmus Villemoes [Tue, 28 May 2024 11:13:25 +0000 (13:13 +0200)]
powerpc: mpc85xx: remove dead watchdog-related code

Nothing in-tree calls watchdog_reset() anymore (that stopped two years
ago with the removal of the WATCHDOG_RESET macro). So that function is
dead code.

That was the only caller of reset_85xx_watchdog(), so that
can obviously also be removed.

Finally, init_85xx_watchdog() is/was also not called from anywhere, so
that can go away as well, which nicely also removes a bit of
arch-specific code from the generic watchdog.h header.

Cc: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
6 months agopowerpc: mpc83xx: remove unused watchdog_reset() function
Rasmus Villemoes [Tue, 28 May 2024 11:13:24 +0000 (13:13 +0200)]
powerpc: mpc83xx: remove unused watchdog_reset() function

There is no longer any code in tree that calls a watchdog_reset()
function. The macro WATCHDOG_RESET, which used to emit a call to
watchdog_reset(), got removed two years ago.

Cc: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
6 months agosh4: remove watchdog.c file
Rasmus Villemoes [Tue, 28 May 2024 11:13:23 +0000 (13:13 +0200)]
sh4: remove watchdog.c file

The external functions defined here are not called from anywhere. So
they, and consequently the whole file, can be dropped.

Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
6 months agosh4: move reset_cpu() from watchdog.c to cpu.c
Rasmus Villemoes [Tue, 28 May 2024 11:13:22 +0000 (13:13 +0200)]
sh4: move reset_cpu() from watchdog.c to cpu.c

The next patch will remove all the other code from watchdog.c, which
would leave just this function in there. It seems just as natural for
this function to be defined in cpu.c, allowing us to delete watchdog.c
completely.

Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
6 months agoserial: ns16550: fix comment to mention schedule instead of watchdog_reset
Rasmus Villemoes [Tue, 28 May 2024 11:13:21 +0000 (13:13 +0200)]
serial: ns16550: fix comment to mention schedule instead of watchdog_reset

watchdog_reset() is no more. Make the comments match the code and
today's reality.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
6 months agowdt-uclass: watchdog_reset cleanup
Rasmus Villemoes [Tue, 28 May 2024 11:13:20 +0000 (13:13 +0200)]
wdt-uclass: watchdog_reset cleanup

watchdog_reset() is no longer called from anywhere, so we do not need
to define a dummy no-op function. Remove that definition, and update
references to say schedule() instead.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
6 months agom68k: remove dead code
Rasmus Villemoes [Tue, 28 May 2024 11:13:19 +0000 (13:13 +0200)]
m68k: remove dead code

There are no calls of "watchdog_reset()" anymore anywhere in the tree
since the WATCHDOG_RESET macro got removed in 942d07df0e79 ("watchdog:
Remove WATCHDOG_RESET macro").

The only places the identifiers watchdog_disable and watchdog_init are
called are in arch/arm/mach-omap2/, so those can obviously not refer
to these instances.

Hence these functions are not actually used at all and can be
removed. As a bonus, this also removes two leftover references to
WATCHDOG_RESET.

Cc: Huan Wang <alison.wang@nxp.com>
Cc: Angelo Dureghello <angelo@kernel-space.org>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
6 months agocyclic: make clients embed a struct cyclic_info in their own data structure
Rasmus Villemoes [Tue, 21 May 2024 08:46:52 +0000 (10:46 +0200)]
cyclic: make clients embed a struct cyclic_info in their own data structure

There are of course not a whole lot of examples in-tree yet, but
before they appear, let's make this API change: Instead of separately
allocating a 'struct cyclic_info', make the users embed such an
instance in their own structure, and make the convention that the
callback simply receives the 'struct cyclic_info *', from which the
clients can get their own data using the container_of() macro.

This has a number of advantages.

First, it means cyclic_register() simply cannot fail, simplifying the
code. The necessary storage will simply be allocated automatically
when the client's own structure is allocated (often via
uclass_priv_auto or similar).

Second, code for which CONFIG_CYCLIC is just an option can more easily
be written without #ifdefs, if we just provide an empty struct
cyclic_info {}. For example, the nested CONFIG_IS_ENABLED()s in
https://lore.kernel.org/u-boot/20240316201416.211480-1-marek.vasut+renesas@mailbox.org/
are mostly due to the existence of the 'struct cyclic_info *' member
being guarded by #ifdef CONFIG_CYCLIC.

And we do probably want to avoid the extra memory overhead of that
member when !CONFIG_CYCLIC. But that is automatic if, instead of a
'struct cyclic_info *', one simply embeds a 'struct cyclic_info',
which will have size 0 when !CONFIG_CYCLIC. Also, the no-op
cyclic_register() function can just unconditionally be called, and the
compiler will see that (1) the callback is referenced, so not emit a
warning for a maybe-unused function and (2) see that it can actually
never be reached, so not emit any code for it.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
6 months agowdt-uclass: prevent multiple cyclic_register calls
Rasmus Villemoes [Tue, 21 May 2024 08:46:51 +0000 (10:46 +0200)]
wdt-uclass: prevent multiple cyclic_register calls

Currently, the cyclic_register() done in wdt_start() is not undone in
wdt_stop(). Moreover, calling wdt_start multiple times (which is
perfectly allowed on an already started device, e.g. to change the
timeout value) will result in another struct cyclic_info being
registered, referring to the same watchdog device.

This can easily be seen on e.g. a wandboard:

=> cyclic list
function: watchdog@20bc000, cpu-time: 22 us, frequency: 1.01 times/s
=> wdt list
watchdog@20bc000 (imx_wdt)
=> wdt dev watchdog@20bc000
=> wdt start 50000
WDT:   Started watchdog@20bc000 with servicing every 1000ms (50s timeout)
=> cyclic list
function: watchdog@20bc000, cpu-time: 37 us, frequency: 1.03 times/s
function: watchdog@20bc000, cpu-time: 241 us, frequency: 1.01 times/s
=> wdt start 12345
WDT:   Started watchdog@20bc000 with servicing every 1000ms (12s timeout)
=> cyclic list
function: watchdog@20bc000, cpu-time: 36 us, frequency: 1.03 times/s
function: watchdog@20bc000, cpu-time: 100 us, frequency: 1.04 times/s
function: watchdog@20bc000, cpu-time: 299 us, frequency: 1.00 times/s

So properly unregister the watchdog device from the cyclic framework
in wdt_stop(). In wdt_start(), we cannot just skip the registration,
as the (new) timeout value may mean that we have to ask the cyclic
framework to call us more often. So if we're already running,
first unregister the old cyclic instance.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
6 months agocyclic: stop strdup'ing name in cyclic_register()
Rasmus Villemoes [Tue, 21 May 2024 08:46:50 +0000 (10:46 +0200)]
cyclic: stop strdup'ing name in cyclic_register()

We are not checking the return value of strdup(), nor
freeing the string in cyclic_unregister().

However, all current users either pass a string literal or the
dev->name of the client device. So in all cases the name string will
live at least as long as the cyclic_info is registered, so just make
that a requirement.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
6 months agocmd: move ELF load and boot to lib/elf.c
Maxim Moskalets [Wed, 5 Jun 2024 18:43:34 +0000 (21:43 +0300)]
cmd: move ELF load and boot to lib/elf.c

Loading and running the ELF image is the responsibility of the
library and should not be associated with the command line interface.

It is also required to run ELF images from FIT with the bootm command
so as not to depend on the command line interface.

Signed-off-by: Maxim Moskalets <maximmosk4@gmail.com>
6 months agofs/erofs: fix an overflow issue of unmapped extents
Jianan Huang [Wed, 5 Jun 2024 14:05:54 +0000 (14:05 +0000)]
fs/erofs: fix an overflow issue of unmapped extents

Here the size should be `length - skip`, otherwise it could cause
the destination buffer overflow.

Reported-by: jianqiang wang <wjq.sec@gmail.com>
Fixes: 65cb73057b65 ("fs/erofs: add lz4 decompression support")
Signed-off-by: Jianan Huang <jnhuang95@gmail.com>
Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com>
6 months agoarm: dts: k3-am625-verdin: add combined binaries
Andrejs Cainikovs [Wed, 5 Jun 2024 09:10:57 +0000 (11:10 +0200)]
arm: dts: k3-am625-verdin: add combined binaries

Add combined binaries for all Verdin AM62 variants.
These binaries can be used to flash the U-Boot via single
binary instead of few as it is done at the moment.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
6 months agoMerge patch series "introduce basic support for TI's am625-lp-sk"
Tom Rini [Fri, 14 Jun 2024 16:42:50 +0000 (10:42 -0600)]
Merge patch series "introduce basic support for TI's am625-lp-sk"

Bryan Brattlof <bb@ti.com> says:

Hello Again Everyone!

The am625-lp-sk is a variant of the am625-sk showcasing the low-power
features of the am625 SoC Family. Because it's essentially a board and
package spin of the am625-sk I've inherited the am625 configuration and
overridden what was needed.

This is a new spin of Nitin's original work which has been updated
significantly since October 2023

  https://lore.kernel.org/u-boot/20231030110138.1347603-1-n-yadav@ti.com/

For those of us interested here is proof of life using buildroot:

   https://paste.sr.ht/~bryanb/40f7787f7760bee383aa8fbc342a29e8544dbdab

This also works around a buildman issue not following #include
directives. To get around this I've redefined the variables it's looking
for inside the lp-sk defconfig to keep it happy for now. I made a pull
request on github and everything seems like it's happy

   https://dev.azure.com/u-boot/u-boot/_build/results?buildId=8634&view=results

6 months agoMerge patch series "binman: am62a/62p: add support for signing TIFSStub"
Tom Rini [Fri, 14 Jun 2024 16:42:35 +0000 (10:42 -0600)]
Merge patch series "binman: am62a/62p: add support for signing TIFSStub"

Dhruva Gole <d-gole@ti.com> says:

Add support for signing of TIFSSTUB images for HSSE, HSFS and GP devices
and include them in tispl.bin and tispl.bin_unsigned in AM62A.

AM62P doesn't have any GP support, hence not applicable.

These changes are required for Low Power Mode features to work on these
SoCs as this TIFS Stub gets used in the Low Power Exit sequences.

Boot tested on both platforms that are being touched:

[0] AM62A, [1] AM62P

[0] https://gist.github.com/DhruvaG2000/d5f2a46818d8025a540efe9289feacb4
[1] https://gist.github.com/DhruvaG2000/ce29f6e9315a78d3e9e5810f55f17f43

6 months agoMerge patch series "arm: dts: am625/am62a7: Switch over to OF_UPSTREAM"
Tom Rini [Fri, 14 Jun 2024 16:40:26 +0000 (10:40 -0600)]
Merge patch series "arm: dts: am625/am62a7: Switch over to OF_UPSTREAM"

Nishanth Menon <nm@ti.com> says:

Cleanup am625 on by switching over the last two platforms (SK and
beagleplay) over to OF_UPSTREAM, and while at it, switch over am62a7
(last of the am62* family) over as well.

This superscedes the previous version of beagleplay only patch[1]

Test logs: https://gist.github.com/nmenon/ba310d3750a80789aca6a4fd90190135

6 months agoarm: dts: k3: binman: am62p: add support for signing TIFSStub images
Dhruva Gole [Fri, 7 Jun 2024 08:56:41 +0000 (14:26 +0530)]
arm: dts: k3: binman: am62p: add support for signing TIFSStub images

Adds TIFS stub binaries, this is required for deepsleep functionality.

This implements the same change as commit 128f81290b7d ("arm: dts: k3:
binman: am625: add support for signing TIFSSTUB Images") did for TI AM62
SK board.

Signed-off-by: Vibhore Vardhan <vibhore@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
6 months agoMerge patch series "efi_loader: select BLK not depends on BLK"
Tom Rini [Fri, 14 Jun 2024 16:39:40 +0000 (10:39 -0600)]
Merge patch series "efi_loader: select BLK not depends on BLK"

Tom Rini <trini@konsulko.com> says:

Rework how the BLK symbol is used now that so much DM migration has been
completed.

6 months agoarm: dts: k3: binman: am62a: add support for signing TIFSStub Images
Dhruva Gole [Fri, 7 Jun 2024 08:56:40 +0000 (14:26 +0530)]
arm: dts: k3: binman: am62a: add support for signing TIFSStub Images

Add support for signing of TIFSSTUB images for HSSE, HSFS and GP devices
and include them in tispl.bin and tispl.bin_unsigned.

This implements the same change as commit 128f81290b7d ("arm: dts: k3:
binman: am625: add support for signing TIFSSTUB Images") did for TI AM62
SK board.

Signed-off-by: Vibhore Vardhan <vibhore@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
6 months agoMerge patch series "binman: ti: create binman nodes for EFI capsules"
Tom Rini [Fri, 14 Jun 2024 14:59:01 +0000 (08:59 -0600)]
Merge patch series "binman: ti: create binman nodes for EFI capsules"

Jonathan Humphreys <j-humphreys@ti.com> says:

Add binman nodes for EFI capsules of firmware components so that capsules
are automatically created during the UBoot builds.

This is enabled for several TI SoC based platforms: AM64, AM62, AM62p,
BeaglePlay, AM69, J7, and BeagleboneAI.

6 months agodts: j784s4: binman: Include firmware capsules binman nodes
Jonathan Humphreys [Fri, 31 May 2024 22:51:10 +0000 (17:51 -0500)]
dts: j784s4: binman: Include firmware capsules binman nodes

Fill in the AM69 SK's capsule GUID properties of the base binman
capsule nodes.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
6 months agodts: beagleboneai64: binman: Include firmware capsules binman nodes
Jonathan Humphreys [Fri, 31 May 2024 22:51:09 +0000 (17:51 -0500)]
dts: beagleboneai64: binman: Include firmware capsules binman nodes

Fill in the BeagleBoneAI64's capsule GUID properties of the base binman
capsule nodes. Also add it's SYSFW binman capsule node.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
6 months agodts: am62x: binman: Include firmware capsules binman nodes
Jonathan Humphreys [Fri, 31 May 2024 22:51:08 +0000 (17:51 -0500)]
dts: am62x: binman: Include firmware capsules binman nodes

Fill in the am62x SK's capsule GUID properties of the base binman capsule
nodes.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
6 months agodts: am62px: binman: Include firmware capsules binman nodes
Jonathan Humphreys [Fri, 31 May 2024 22:51:07 +0000 (17:51 -0500)]
dts: am62px: binman: Include firmware capsules binman nodes

Fill in the am62px SK's capsule GUID properties of the base binman capsule
nodes.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
6 months agodts: beagleplay: binman: Include firmware capsules binman nodes
Jonathan Humphreys [Fri, 31 May 2024 22:51:06 +0000 (17:51 -0500)]
dts: beagleplay: binman: Include firmware capsules binman nodes

Fill in the BeaglePlay's capsule GUID properties of the base binman capsule
nodes.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
6 months agodts: j721e: binman: Include firmware capsules binman nodes
Jonathan Humphreys [Fri, 31 May 2024 22:51:05 +0000 (17:51 -0500)]
dts: j721e: binman: Include firmware capsules binman nodes

Fill in the J721e SK's capsule GUID properties of the base binman capsule
nodes.
Also add it's SYSFW binman capsule node.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
6 months agodts: am64x: binman: Include firmware capsules binman nodes
Jonathan Humphreys [Fri, 31 May 2024 22:51:04 +0000 (17:51 -0500)]
dts: am64x: binman: Include firmware capsules binman nodes

Fill in the am64x SK's capsule GUID properties of the base binman capsule
nodes.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
6 months agodts: ti: binman: Add base K3 firmware capsule nodes
Jonathan Humphreys [Fri, 31 May 2024 22:51:03 +0000 (17:51 -0500)]
dts: ti: binman: Add base K3 firmware capsule nodes

Create capsule files for tiboot3.bin, tispl.bin, and u-boot.img.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
6 months agotools: Build mkeficapsule tool by default if EFI_LOADER is set
Jonathan Humphreys [Fri, 31 May 2024 22:51:02 +0000 (17:51 -0500)]
tools: Build mkeficapsule tool by default if EFI_LOADER is set

Trigger the building of the mkeficapsule tool if EFI_LOADER is enabled.
Previously it was triggered on EFI_CAPSULE_ON_DISK, but mkeficapsule is
needed when a capsule is being generated for a bootloader stage, not just
from the stage applying them. EFI_LOADER is a more accurate approximation
of when a capsule may need to be generated.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
6 months agoconfigs: add defconfigs for the am625-lp-sk
Bryan Brattlof [Fri, 7 Jun 2024 22:06:13 +0000 (17:06 -0500)]
configs: add defconfigs for the am625-lp-sk

The am62x-lp-sk is a package and reference board spin of the am62x-sk to
showcase the low-power features of the am62x SoC family. Because it so
closely resembles the am62x-sk board, use the preprocessor to inherit
its configuration making the needed changes for this board where
necessary.

Reviewed-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
6 months agoarm: dts: add U-Boot dtbs for the am625-lp-sk
Nitin Yadav [Fri, 7 Jun 2024 22:06:12 +0000 (17:06 -0500)]
arm: dts: add U-Boot dtbs for the am625-lp-sk

Add the U-Boot device tree overrides for the am62x-lp-sk reference
board.

Signed-off-by: Nitin Yadav <n-yadav@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
6 months agoarm: dts: am62a7_sk: Switch to OF_UPSTREAM
Nishanth Menon [Wed, 5 Jun 2024 15:27:52 +0000 (10:27 -0500)]
arm: dts: am62a7_sk: Switch to OF_UPSTREAM

Enable OF_UPSTREAM for am62a7-sk board. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.10-rc1).

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
6 months agoarm: dts: am625_sk: Switch to OF_UPSTREAM
Nishanth Menon [Wed, 5 Jun 2024 15:27:51 +0000 (10:27 -0500)]
arm: dts: am625_sk: Switch to OF_UPSTREAM

Enable OF_UPSTREAM for am625-sk board. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.10-rc1).

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
6 months agoarm: dts: am625_beagleplay: Switch to OF_UPSTREAM
Nishanth Menon [Wed, 5 Jun 2024 15:27:50 +0000 (10:27 -0500)]
arm: dts: am625_beagleplay: Switch to OF_UPSTREAM

Enable OF_UPSTREAM for AM625-beagleplay board. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.10-rc1).

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
6 months agoblock: Update BLK to be def_bool
Tom Rini [Wed, 5 Jun 2024 01:37:42 +0000 (19:37 -0600)]
block: Update BLK to be def_bool

At this point in the DM migration, all platforms enable DM. BLK requires
DM. Make BLK "def_bool y" in the cases it had been "default y" to make
this clearer. Now remove the symbol requirement from other places as it
is redundant here.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 months agospl: nvme: Make this depend on SPL_BLK
Tom Rini [Wed, 5 Jun 2024 01:37:41 +0000 (19:37 -0600)]
spl: nvme: Make this depend on SPL_BLK

As this is an SPL related driver, and in SPL enabling SPL_BLK is
optional, make this depend on the correct symbol.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 months agoefi_loader: select BLK not depends on BLK
Tom Rini [Wed, 5 Jun 2024 01:37:40 +0000 (19:37 -0600)]
efi_loader: select BLK not depends on BLK

The BLK symbol is used both for "we have a block device subsystem
enabled" and "we need to utilize the block device library functions". In
the case of efi_loader, it is the case of "we need to utilize the block
device library", so select rather than depends on it. In turn, also
disable EFI_LOADER on platforms which did not have it on previously due
to a lack of block devices. They can enable it themselves if desired.

Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
6 months agorockchip: puma-rk3399: get closer to other Theobroma defconfigs
Quentin Schulz [Wed, 12 Jun 2024 14:40:49 +0000 (16:40 +0200)]
rockchip: puma-rk3399: get closer to other Theobroma defconfigs

Disable support for unused OSes as Linux is the primary target.

Disable support for bootz as zImage isn't a format compatible with
Aarch64 machines so it should never be attempted to be booted.

Enable a bunch of commands:
 - erofs
 - gpio
 - squashfs

that could be useful and are also found in Jaguar and Tiger defconfigs.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 months agorockchip: ringneck-px30: get closer to other Theobroma defconfigs
Quentin Schulz [Wed, 12 Jun 2024 14:40:48 +0000 (16:40 +0200)]
rockchip: ringneck-px30: get closer to other Theobroma defconfigs

RK3588 Jaguar and Tiger, and RK3399 Puma use standard boot with the full
feature set, so let's do that as well for PX30 Ringneck.

Disable support for unused OSes as Linux is the primary target.

Enable a bunch of commands:
 - boot/bootd
 - erofs
 - gpio
 - iminfo
 - imxtract
 - itest
 - pmic
 - regulator
 - sleep
 - squashfs

that could be useful and are also found in Jaguar and Tiger defconfigs.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 months agorockchip: add support for Theobroma Systems SOM-RK3588-Q7 Tiger module
Quentin Schulz [Mon, 10 Jun 2024 13:13:38 +0000 (15:13 +0200)]
rockchip: add support for Theobroma Systems SOM-RK3588-Q7 Tiger module

The RK3588-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3588.

It provides the following feature set:
 * up to 16GB LPDDR4x
 * on-module eMMC
 * SD card (on a baseboard) via edge connector
 * Gigabit Ethernet with on-module GbE PHY
 * HDMI/eDP
 * MIPI-DSI
 * 4x MIPI-CSI (3x on FPC connectors, 1x over Q7)
 * HDMI input over FPC connector
 * CAN
 * USB
   - 1x USB 3.0 dual-role (direct connection)
   - 2x USB 3.0 host + 1x USB 2.0 host
 * PCIe
   - 1x PCIe 2.1 Gen3, 4 lanes
   - 2xSATA / 2x PCIe 2.1 Gen1, 2 lanes
 * on-module ATtiny816 companion controller, implementing:
   - low-power RTC functionality (ISL1208 emulation)
   - fan controller (AMC6821 emulation)
 * on-module Secure Element with Global Platform 2.2.1 compliant
   JavaCard environment

The support is added for Tiger on Haikou devkit, similarly to RK3399
Puma and PX30 Ringneck.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 months agoarm64: dts: rockchip: add dual-role usb3 hosts to rk3588 Tiger-Haikou
Heiko Stuebner [Mon, 10 Jun 2024 13:13:37 +0000 (15:13 +0200)]
arm64: dts: rockchip: add dual-role usb3 hosts to rk3588 Tiger-Haikou

Apart from the host-only usb3 controller (host2) the rk3588 also provides
two dual-role controllers. On the Tiger-Haikou combination these are
connected to the lower usb3-host port in host-only mode and the micro-usb3
port for dual-role operation.

Add the necessary controllers, phys to the Tiger-Haikou board and enable
the usb-id extcon.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240422163951.2604273-4-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: d7b83921d098bd76623381f75f5cd2296f1315cc ]

(cherry picked from commit 193d3b2a0a98f2dcd8c43bcbf8a766098a9fa75d)

6 months agoarm64: dts: rockchip: add usb-id extcon on rk3588 tiger
Heiko Stuebner [Mon, 10 Jun 2024 13:13:36 +0000 (15:13 +0200)]
arm64: dts: rockchip: add usb-id extcon on rk3588 tiger

The Q7 standard specifies a usb-id pin on the connector to distiuish
between host and device mode. Model this via the usb-id extcon binding.

While the pin is part of the Q7 standard, so part of the module, the
extcon stays disabled in the som dtsi and will only be enabled in a
baseboard using it.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240422163951.2604273-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: eabb53f5dacfd643b5255f35bad30b8f914decdc ]

(cherry picked from commit 4843cec4092318ef7feb0999b0d34ef817465b33)

6 months agoarm64: dts: rockchip: fix comment for upper usb3 port
Heiko Stuebner [Mon, 10 Jun 2024 13:13:35 +0000 (15:13 +0200)]
arm64: dts: rockchip: fix comment for upper usb3 port

The comment for the host2_xhci points to the wrong port on the board.
The upper usb3 port is the correct one, so fix the comment to prevent
confusion.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240422163951.2604273-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 3482efee1144262dc839792103e6a9e29defecbc ]

(cherry picked from commit 56f3031edf22d163f10bc4b631d37a9aaa82d4d4)

6 months agoarm64: dts: rockchip: fix pcie-refclk frequency on rk3588 tiger
Heiko Stuebner [Mon, 10 Jun 2024 13:13:34 +0000 (15:13 +0200)]
arm64: dts: rockchip: fix pcie-refclk frequency on rk3588 tiger

The clock-generator of course only produces a 100MHz clock rate,
not 1GHz.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240423114635.2637310-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 0eb2a93518fb4728bd1d55fcd3b57fce4797ef1d ]

(cherry picked from commit b574cbafae976cf508692088944e45c9764c0048)

6 months agoarm64: dts: rockchip: correct gpio_pwrctrl1 typos on rk3588(s) boards
Jing Luo [Mon, 10 Jun 2024 13:13:33 +0000 (15:13 +0200)]
arm64: dts: rockchip: correct gpio_pwrctrl1 typos on rk3588(s) boards

gpio_pwrctrl2 gets duplicated by both rk806_dvs1_null and rk806_dvs2_null
gpio_pwrctrl1 is unset. This typo appears in multiple files. Let's fix them.

Note: I haven't had the chance to test them all because I don't own all
of these boards (obviously). Please test if it's needed.

Signed-off-by: Jing Luo <jing@jing.rocks>
Link: https://lore.kernel.org/r/20240420130355.639406-1-jing@jing.rocks
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: d7f2039e5321636069baa77ef2f1e5d22cb69a88 ]

(cherry picked from commit cb2b6d1d19ed10fcaec5f5859c08a3355d1c66e0)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 months agoarm64: dts: rockchip: move uart2 pinmux to dtsi on rk3588-tiger
Heiko Stuebner [Mon, 10 Jun 2024 13:13:32 +0000 (15:13 +0200)]
arm64: dts: rockchip: move uart2 pinmux to dtsi on rk3588-tiger

The association of uart2 to the q7-uart pins is part of the module
itself and not the baseboard used. Therefore move the pinctrl over
to the tiger dtsi.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240422143356.2596414-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 5adbad5c464a708a87cf5ade1bfe2ca947bb2f82 ]

(cherry picked from commit f8314a4fbc00a3d651a7e9b4d9462d10c6c02a12)

6 months agoarm64: dts: rockchip: enable gpu on rk3588-tiger
Heiko Stuebner [Mon, 10 Jun 2024 13:13:31 +0000 (15:13 +0200)]
arm64: dts: rockchip: enable gpu on rk3588-tiger

Enable the mali gpu node and add the som-specific supply-regulator.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240327112120.1181570-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: f5256f8ed4b729c3ab9d9cd7d406313773484b59 ]

(cherry picked from commit 27350b241eafea37dc94743cd9c5dd83295faca9)

6 months agorockchip: ringneck-px30: fix TPL_MAX_SIZE
Quentin Schulz [Thu, 6 Jun 2024 08:45:36 +0000 (10:45 +0200)]
rockchip: ringneck-px30: fix TPL_MAX_SIZE

Ringneck was mistakenly set to allow up to 128KiB for the TPL code size
while PX30 SoC only has 16KiB of SRAM.

Therefore, let's use the default value of TPL_MAX_SIZE from the SoC
(which is 10KiB) so that the max code size is actually checked and
useful.

Fixes: c925be73a0a8 ("rockchip: add support for PX30 Ringneck SoM on Haikou Devkit")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
6 months agopower: rk8xx: properly print all supported PMICs name
Quentin Schulz [Thu, 6 Jun 2024 08:45:35 +0000 (10:45 +0200)]
power: rk8xx: properly print all supported PMICs name

The ID of the PMIC is stored in the 2 16b registers but the only part
that matters right now is the 3 MSB, which make the 3 digits (in hex) of
the part number.

Right now, only RK808 was properly displayed, with this all currently
supported PMICs should display the proper part number.

Additionally, when the PMIC variant is not found, print that value
instead of the masked unshifted value as all PMICs we support for now
have their LSB ignored to represent the actual part number.

Tested on RK806 (RK3588 Jaguar), RK808 (RK3399 Puma) and RK809 (PX30
Ringneck).

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
6 months agorockchip: px30-ringneck: Update SPL_PAD_TO Kconfig option
Quentin Schulz [Thu, 6 Jun 2024 08:45:34 +0000 (10:45 +0200)]
rockchip: px30-ringneck: Update SPL_PAD_TO Kconfig option

On px30-ringneck the FIT payload is located at sector 0x200 compared to
the more Rockchip common sector 0x4000 offset:
SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200

Because FIT payload is located at sector 0x200 and the TPL+SPL is
located at sector 64, the combined size of TPL+SPL cannot take up more
than 224KiB:
(0x200 - 64) x 512 = 0x38000 (224 KiB)

Adjust SPL_PAD_TO to match the used 0x200 sector offset.

While at it, update the px30-ringneck-u-boot.dtsi to remove the now
unnecessary override of simple-bin:fit:offset since SPL_PAD_TO matches
with the current formula.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
6 months agorockchip: rk3399-puma: remove unnecessary simple-bin:fit:offset override
Quentin Schulz [Thu, 6 Jun 2024 08:45:33 +0000 (10:45 +0200)]
rockchip: rk3399-puma: remove unnecessary simple-bin:fit:offset override

Since commit 6007b69d544e ("rockchip: rk3399-puma: Update SPL_PAD_TO
Kconfig option"), SPL_PAD_TO matches
(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512 and the default
value for simple-bin:fit:offset in rockchip-u-boot.dtsi is
SPL_PAD_TO, so let's remove this override.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
6 months agorockchip: rk3399-puma: remove default value from defconfig
Quentin Schulz [Thu, 6 Jun 2024 08:45:32 +0000 (10:45 +0200)]
rockchip: rk3399-puma: remove default value from defconfig

CONFIG_ENV_OFFSET already defaults to 0x3F8000, however it is stored in
lowercase hexdigits instead of uppercase like in the defconfig.

No change in behavior intended.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
6 months agorockchip: jaguar-rk3588: use default env size for Rockchip on MMC
Quentin Schulz [Thu, 6 Jun 2024 08:45:31 +0000 (10:45 +0200)]
rockchip: jaguar-rk3588: use default env size for Rockchip on MMC

The default env size is 0x8000 when building for Rockchip SoCs with
support for environment stored in MMC.

Jaguar hasn't entered mass production just yet, so it's a breaking
change we can afford in the name of consistency.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
6 months agoboard: rockchip: add ArmSoM Sige7 Rk3588 board
Jianfeng Liu [Tue, 28 May 2024 17:04:06 +0000 (01:04 +0800)]
board: rockchip: add ArmSoM Sige7 Rk3588 board

ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by
ArmSoM.

There are two variants depending on the DRAM size : 8G and 16G.

Specification:

    Rockchip Rk3588 SoC
    4x ARM Cortex-A76, 4x ARM Cortex-A55
    8/16GB memory LPDDR4x
    Mali G610MC4 GPU
    2x MIPI CSI 2 multiple lanes connector
    64GB/128GB on board eMMC
    uSD slot
    1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
    1x HDMI 2.1 output
    2x 2.5 Gbps Ethernet port
    40-pin IO header including UART, SPI and I2C
    USB PD over USB Type-C
    Size: 92mm x 62mm

Kernel commit:
81c828a67c78 (arm64: dts: rockchip: Add ArmSom Sige7 board)

Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 months agorockchip: rk3588: Remove USB3 DRD nodes in u-boot.dtsi
Jianfeng Liu [Tue, 28 May 2024 17:04:05 +0000 (01:04 +0800)]
rockchip: rk3588: Remove USB3 DRD nodes in u-boot.dtsi

After we sync USB3 DRD nodes from v6.10-rc1, these obsolete nodes
can be removed.

Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 months agoarm64: dts: rockchip: Add ArmSom Sige7 board
Jianfeng Liu [Tue, 28 May 2024 17:04:04 +0000 (01:04 +0800)]
arm64: dts: rockchip: Add ArmSom Sige7 board

Specification:
        Rockchip Rk3588 SoC
        4x ARM Cortex-A76, 4x ARM Cortex-A55
        8/16/32GB Memory LPDDR4/LPDDR4x
        Mali G610MP4 GPU
        2× MIPI-CSI Connector
        1× MIPI-DSI Connector
        1x M.2 Key M (PCIe 3.0 4-lanes)
        2x RTL8125 2.5G Ethernet
        Onboard AP6275P for WIFI6/BT5
        32GB/64GB/128GB eMMC
        MicroSD card slot
        1x USB2.0, 1x USB3.0 Type-A, 1x US3.0 Type-C
        1x HDMI Output, 1x type-C DP Output

Functions work normally:
        USB2.0 Host
        USB3.0 Type-A Host
        M.2 Key M (PCIe 3.0 4-lanes)
        2x RTL8125 2.5G Ethernet
        eMMC
        MicroSD card

More information can be obtained from the following website
        https://docs.armsom.org/armsom-sige7

Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Weizhao Ouyang <weizhao.ouyang@arm.com>
Link: https://lore.kernel.org/r/20240420034300.176920-4-liujianfeng1994@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 81c828a67c78bb03ea75819c417c93c7f3d637b5 ]

(cherry picked from commit d427a11542bcf5364a5260280e077f0a2e030dcb)
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 months agoarm64: dts: rockchip: add rk3588 pcie and php IOMMUs
Niklas Cassel [Tue, 28 May 2024 17:04:03 +0000 (01:04 +0800)]
arm64: dts: rockchip: add rk3588 pcie and php IOMMUs

The mmu600_pcie is connected with the five PCIe controllers.
The mmu600_php is connected with the USB3 controller, the GMAC
controllers, and the SATA controllers.

See 8.2 Block Diagram, in rk3588 TRM (Technical Reference Manual).

The IOMMUs are disabled by default, as further patches are needed to
program the SID/SSIDs in to the IOMMUs.

iommu: Default domain type: Translated
iommu: DMA domain TLB invalidation policy: strict mode
arm-smmu-v3 fc900000.iommu: ias 48-bit, oas 48-bit (features 0x001c1eaf)
arm-smmu-v3 fc900000.iommu: allocated 65536 entries for cmdq
arm-smmu-v3 fc900000.iommu: allocated 32768 entries for evtq
arm-smmu-v3 fc900000.iommu: msi_domain absent - falling back to wired irqs

Additionally, the IOMMU correctly triggers an IOMMU fault when
a PCIe device performs a write (since the device hasn't been
assigned a SID/SSID):
arm-smmu-v3 fc900000.iommu: event 0x02 received:
arm-smmu-v3 fc900000.iommu:      0x0000010000000002
arm-smmu-v3 fc900000.iommu:      0x0000000000000000
arm-smmu-v3 fc900000.iommu:      0x0000000000000000
arm-smmu-v3 fc900000.iommu:      0x0000000000000000

While this doesn't provide much value as is, having the devices as
disabled in the device tree will allow developers to see that the rk3588
actually has IOMMUs on the SoC.

Signed-off-by: Niklas Cassel <cassel@kernel.org>
Link: https://lore.kernel.org/r/20240502140231.477049-2-cassel@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: cd81d3a0695cc54ad6ac0ef4bbb67a7c8f55d592 ]

(cherry picked from commit ea9a34aa0d786cbf4b87f1ba528e69b07219738f)
Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 months agoarm64: dts: rockchip: add USB3 DRD controllers on rk3588
Sebastian Reichel [Tue, 28 May 2024 17:04:02 +0000 (01:04 +0800)]
arm64: dts: rockchip: add USB3 DRD controllers on rk3588

Add both USB3 dual-role controllers to the RK3588 devicetree.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240408225109.128953-8-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 33f393a2a990e16f56931ca708295f31d2b44415 ]

(cherry picked from commit c7ed588e14f7dd04a92fb55f12680f94c7b14edf)
Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
6 months agoarm64: dts: rockchip: add USBDP phys on rk3588
Sebastian Reichel [Tue, 28 May 2024 17:04:01 +0000 (01:04 +0800)]
arm64: dts: rockchip: add USBDP phys on rk3588

Add both USB3-DisplayPort PHYs to RK3588 SoC DT.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240408225109.128953-7-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: e18e5e8188f2671abf63abe7db5f21555705130f ]

(cherry picked from commit 5110caca9865718616cf7093ed4a9a1bc54780db)
Signed-off-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>