Mugunthan V N [Wed, 23 Dec 2015 15:09:37 +0000 (20:39 +0530)]
spi: Add support for dual and quad mode
spi bus can support dual and quad wire data transfers for tx and
rx. So defining dual and quad modes for both tx and rx. Also add
support to parse bus width used for spi tx and rx transfers.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Mugunthan V N [Wed, 23 Dec 2015 15:09:34 +0000 (20:39 +0530)]
drivers: spi:ti_qspi: change ti_qspi_slave to ti_qspi_priv for driver model conversion
Changing the ti_qspi_priv structure and its instance names from
to priv for driver mode conversion.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Mugunthan V N [Wed, 23 Dec 2015 15:09:33 +0000 (20:39 +0530)]
drivers: spi: ti_qspi: do not hard code chip select for memory map configuration
To enable memory map in dra7xx, specific chip select must be
written to control module register. But this hard coded to chip
select 1, fixing it by writing the specific chip select value to
control module register.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 28 Dec 2015 17:25:50 +0000 (22:55 +0530)]
spi: Add SPI_TX_DUAL mode
Added SPI_TX_DUAL mode flag.
Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Tue, 29 Dec 2015 06:42:30 +0000 (12:12 +0530)]
spi: Minor cleanup
- Add comments on mode_rx
- Tab space's
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 28 Dec 2015 16:54:08 +0000 (22:24 +0530)]
spi: Use BIT macro
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 16 Dec 2015 10:21:06 +0000 (15:51 +0530)]
spi: Fix bit assignment with flags
Fixed bit assignment with flags members on spi_slave{}
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 28 Dec 2015 16:53:14 +0000 (22:23 +0530)]
spi: Move flags macro's to spi_slave{} members
This patch moves flags macro's to respective member
position on spi_slave{}, for better readabilty and
finding the respective member macro's easily.
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 16 Dec 2015 09:54:24 +0000 (15:24 +0530)]
spi: Rename op_mode_rx to mode_rx
Since spi rx mode macro's are renamed to simple and
meaninfull, this patch will rename the respective
structure members.
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 16 Dec 2015 09:31:23 +0000 (15:01 +0530)]
spi: Remove SPI_OPM_RX_DIO|QIOF
SPI_OPM_RX_DIO and SPI_OPM_RX_QIOF are rx IO
commands/opmodes for dual and quad. Usually IO
operation's are referred to flash protocol rather
with spi controller protocol, these are still present
in flash side for the usage of spi-nor controllers.
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 16 Dec 2015 09:23:59 +0000 (14:53 +0530)]
spi: Remove SPI_OPM_RX_EXTN
SPI_OPM_RX_EXTN is a combination of all rx opmode's
and spi driver shall use any one of the rx mode at
a time not the combination and it is true in case of
flash where spi_flash_table mention combination of
supported read opmodes so-that the required one
will pick based on the rx mode from spi driver.
Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 16 Dec 2015 08:18:08 +0000 (13:48 +0530)]
sf: Write quad bit along with read status
While setting quad bit on spansion, macronix code
is writing only particular quad bit this may give
wrong functionality with other register bits,
So this patch fix the issue where it with write
previous read reg status along particular quad bit.
Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Tue, 15 Dec 2015 07:12:02 +0000 (12:42 +0530)]
sf: Read back and check once macronix quad bit set
One macronix quad bit set using SR, it's good to
read back and check the written bit and also if
it's already been set check for the bit and return.
Cc: Vignesh R <vigneshr@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Tue, 15 Dec 2015 06:58:39 +0000 (12:28 +0530)]
sf: Read back and check once spansion quad bit set
One spansion quad bit set using CR, it's good to
read back and check the written bit and also if
it's already been set check for the bit and return.
Cc: Vignesh R <vigneshr@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 14 Dec 2015 12:45:39 +0000 (18:15 +0530)]
sf: Fix quad bit set for micron devices
Setting up quad bit for micron devices need to do the
same way as other flash devices like spansion, winbond
etc does using enhanced volatile config register so this
patch adds this support instead of printing "QEB is volatile"
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Peter Pan <peterpandong@micron.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Sun, 13 Dec 2015 14:40:33 +0000 (20:10 +0530)]
spi: Use mode instead of op_mode_tx
Used mode member from spi_slave{} instead of op_mode_tx.
Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 14 Dec 2015 06:45:17 +0000 (12:15 +0530)]
spi: make mode visible to both dm and non-dm
Couldn't find the exact reason to define 'mode' for dm,
probably it is not using in non-dm drivers but it need
to visible both dm and non-dm as mode data is getting
dereferred in spi flash core ie common to both.
Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Sat, 12 Dec 2015 06:21:57 +0000 (11:51 +0530)]
sf: Get spi locally from spi_flash
For better code readabilty, get the spi pointer from
spi_flash{} locally and use it instead of direct
dereferring spi pinter as flash->spi->*
Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
Tom Rini [Tue, 8 Dec 2015 03:26:34 +0000 (22:26 -0500)]
sandbox: eth-raw-os.c: Ensure that our interface name is not too long
Coverity notes that we do not ensure when we copy ifname we still have
space left to ensure NULL termination. As cannot control the size of
ifr_name we must make sure that our argument will not overflow the
buffer.
Reported-by: Coverity (CID 131094) Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Roese [Mon, 14 Dec 2015 15:18:15 +0000 (16:18 +0100)]
dm: core: Add option to configure an offset for the address translation
Some platforms need to ability to configure an offset to the standard
addresses extracted from the device-tree. This patch allows this by
adding a function to DM to configure this offset (if needed).
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org>
Fixed space before tab: Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 14 Dec 2015 04:37:00 +0000 (21:37 -0700)]
rockchip: Use the debug UART on rk3036
Rather than using a new debug UART implementation, use the standard one
provided by U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Simon Glass [Sun, 29 Nov 2015 20:18:10 +0000 (13:18 -0700)]
dm: net: usb: Refactor mcs7830 driver ready for DM conversion
Remove stamp data and create common functions for the main Ethernet
operations. This will make it easier to convert this driver to support
driver model.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Sun, 29 Nov 2015 20:18:09 +0000 (13:18 -0700)]
pci: Tidy up comments in pci_bind_bus_devices()
The current comments are confusing. We don't actually bind a generic device
when the device tree has no information. We try to scan available PCI
drivers. Update the comments to reflect this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:18:08 +0000 (13:18 -0700)]
dm: Convert PCI MMC over to use DM PCI API
At present pci_mmc_init() does not correctly use the PCI function since the
list it passes is not terminated. The array size passed to pci_mmc_init() is
actually not used correctly. Fix this and adjust the pci_mmc_init() to scan
all available MMC devices.
Adjust this code to use the new driver model PCI API.
This should move over to the new MMC uclass at some point.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:17:55 +0000 (13:17 -0700)]
dm: x86: ivybridge: Convert graphics init to use DM PCI API
Use the driver-model PCI functions here where possible. For now we have to
search for the device with pci_bus_find_bdf() but at some point we can put
this in a proper driver and avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:17:54 +0000 (13:17 -0700)]
dm: serial: Convert ns16550 driver to use driver model PCI API
Use the driver model version of the function to find the BAR. This updates
the fdtdec function, of which ns16550 is the only user.
The fdtdec_get_pci_bdf() function is dropped for several reasons:
- with driver model we should use 'struct udevice *' rather than passing the
device tree offset explicitly
- there are no other users in the tree
- the function parses for information which is already available in the PCI
device structure (specifically struct pci_child_platdata which is available
at dev_get_parent_platdata(dev)
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:17:49 +0000 (13:17 -0700)]
dm: pci: Use driver model PCI API in auto-config
At present we are using legacy functions even in the auto-configuration code
used by driver model. Add a new pci_auto.c version which uses the correct
API.
Create a new pci_internal.h header to hold functions that are used within
the PCI subsystem, but are not exported to other drivers.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:17:48 +0000 (13:17 -0700)]
dm: pci: Add a dm_ prefix to pci_bus_find_bdf()
Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.
For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_bus_find_bdf() accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 29 Nov 2015 20:17:47 +0000 (13:17 -0700)]
dm: pci: Add a dm_ prefix to pci_get_bdf()
Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.
For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_get_bdf() accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Masahiro Yamada [Fri, 8 Jan 2016 16:51:16 +0000 (01:51 +0900)]
ARM: uniphier: fix recommended board setting in document
The mem_is_flash() in arch/arm/mach-uniphier/micro-support_card.c
writes/reads the tail of each NOR flash bank to check if the device
really resides there.
If CS1_SPLIT were enabled, the support card would always require two
NOR flash devices to be inserted for the correct NOR detection.
This is not probably what we want.
Masahiro Yamada [Fri, 8 Jan 2016 16:51:15 +0000 (01:51 +0900)]
ARM: uniphier: add dump command for DDR Multi PHY registers
The ProXstream2/PH1-LD6b is integrated with a new IP for DDR PHY
which is not register-compatible with the former SoCs.
Add a new command to support the register dump of this IP.
Masahiro Yamada [Fri, 8 Jan 2016 16:51:14 +0000 (01:51 +0900)]
ARM: uniphier: add DRAM init code for ProXstream2/PH1-LD6b
As mentioned in the log of commit 019df879a93e2 (ARM: uniphier: add
ProXstream2 and PH1-LD6b support), the DRAM init code was missing
for a long time. Finally, here it is. SPL works now.
Fabio Estevam [Mon, 4 Jan 2016 23:38:08 +0000 (21:38 -0200)]
mx6cuboxi: Fix the reset delay for the AR8035 PHY
Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is
registered") Ethernet is no longer functional:
Booting from net ...
FEC Waiting for PHY auto negotiation to complete......... TIMEOUT !
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
This commit does not have an issue in itself, but it revelead a problem
with the Ethernet initialization.
As per the AR8035 datasheet:
"For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset
1ms requirement is satisfied."
So do as suggested and keep the reset low for 10ms.
Also add a 100us delay after deasserting the reset line
to guarantee that the PHY ID can be read correctly and the Atheros
PHY can be loaded as per Troy Kisky's suggestion.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Tom Rini <trini@konsulko.com>
Bin Meng [Fri, 8 Jan 2016 09:03:21 +0000 (01:03 -0800)]
pci: layerscape: Adjust the return value when ls_pcie_addr_valid() fails
When trying to access non-existent/unsupported PCI devices in
ls_pcie_read_config(), when ls_pcie_addr_valid() fails it returns
error code and fills in the result with 0xffffffff manually. But it
really should return zero to upper layer codes.
Bin Meng [Fri, 8 Jan 2016 09:03:20 +0000 (01:03 -0800)]
pci: imx: Adjust the return value when imx_pcie_addr_valid() fails
When trying to access non-existent/unsupported PCI devices in
imx_pcie_read_config(), when imx_pcie_addr_valid() fails it returns
error code and fills in the result with 0xffffffff manually. But it
really should return zero to upper layer codes.
Since 51209b1f42cb ("Use common mtest iteration counting"),
do_mem_mtest has always reported 0 errors and hence returned 0, even
if errors were detected. Fix the helpers mem_test_alt() and
mem_test_quick() to return the number of errors found.
Tom Rini [Tue, 5 Jan 2016 17:17:15 +0000 (12:17 -0500)]
am33xx/am43xx: Add platform data for GPIOs
On these platforms we have many cases of boards that enable device model
and GPIO support but do not enable OF_CONTROL and pass in a device tree
with the binary. We need to bring in the platform data here as well.
Tested on Beaglebone Black.
Reported-by: Robert Nelson <robertcnelson@gmail.com> Reported-by: Francisco Aguerre <franciscoaguerre@gmail.com> Reported-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Michal Simek [Tue, 5 Jan 2016 11:49:21 +0000 (12:49 +0100)]
serial: zynq: Use static inline for _debug_uart_init()
Mark _debug_uart_init() as static to avoid sparse warning and
inline it to debug_uart_init().
Reported-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Mon, 4 Jan 2016 15:48:22 +0000 (15:48 +0000)]
net: remove scary warning about EEPROM provided MAC address
In many parts of the computing world having a unique MAC address
sitting in some on-NIC storage is considered the normal case.
Remove the warning to not scare the user unnecessarily.
This applies to Highbank/Midway and ARM's Juno, for instance.
Besides that this fixes the formatting on Midway, for instance,
which currently looks like:
...
Net: xgmac0
Warning: xgmac0 using MAC address from net device
, xgmac1
Warning: xgmac1 using MAC address from net device
...
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Mon, 4 Jan 2016 15:43:36 +0000 (15:43 +0000)]
arm64: Juno/FVP: adjust kernel load address
The default kernel load offset for an arm64 kernel is 0x80000, so
U-Boot takes cares of moving the loaded kernel to a matching memory
location just before booting it.
Since we run with caches off, this takes a while for any decently
sized kernel - with no output explaining the reason for the delay
(unless one uses a DEBUG build).
By adjusting the default load offset for Juno and VFP to be 512K
aligned in the first place we can skip this copying and boot much
faster.
Tested on Juno.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Aneesh Bansal [Wed, 23 Dec 2015 08:46:23 +0000 (14:16 +0530)]
arm, Makefile: correct compilation flag for u-boot-dtb
The compilation of u-boot-dtb.img should be controlled by
CONFIG_OF_CONTROL and not CONFIG_DM.
CONFIG_DM may be defined even without Device Tree requirement.
Robert P. J. Day [Sat, 19 Dec 2015 12:16:10 +0000 (07:16 -0500)]
doc: Tidy up first part of top-level README file
First (small) pass at tidying up the README file, including:
* remove references to obsolete CREDITS file
* remove (some) references to obsolete boards.cfg file
* remove at least one reference to a "scrapped" board
* cut down unnecessarily detailed directory hierarchy
* bunch of grammar and spelling tweaks
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Simon Glass [Tue, 29 Dec 2015 12:22:45 +0000 (05:22 -0700)]
rockchip: Fix the configuration for chromebook_jerry
Various updates did not make it through to this board. Also the instructions
for building a SPI image are no-longer correct. Fix these so that Jerry can
boot to a prompt again.
Joe Hershberger [Mon, 21 Dec 2015 22:31:35 +0000 (16:31 -0600)]
net: Fix delay in net_retry test
Introduced in 45b4773 (net/arp: account for ARP delay, avoid duplicate packets on timeout)
Check the arp timeout and adjust the timeout start time before the call
to eth_recv() so that the sandbox driver has the opportunity to adjust
the sandbox timer after the new start time has been recorded.
Also, change the adjustment amount by 11 seconds instead of exactly the
10 seconds that the ping timout is expecting since the timeout check is
looking for the time elapsed to be greater than but not equal to the
specified delay.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
projects / u-boot.git / log