Bin Meng [Mon, 18 Jan 2016 15:29:32 +0000 (07:29 -0800)]
x86: quark: Fix boot breakage
With driver model timer conversion, quark based board does not boot
any more as mdelay() is called during quark_pcie_early_init() which
is before driver model gets initialized. Fix this breakage.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sun, 17 Jan 2016 02:44:37 +0000 (02:44 +0000)]
power: regulator: max77686: Don't use switch() on bools
With gcc-5.3 we get a warning for using switch() on a bool type.
Rewrite these sections as if/else and update the one section that was
using 1/0 instead of true/false.
Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Tom Rini [Sat, 16 Jan 2016 14:50:26 +0000 (14:50 +0000)]
pci_rom.c: Fix may be used uninitialized warning
With gcc-5.x we get:
drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios':
drivers/pci/pci_rom.c:352:3: warning: 'ram' may be used uninitialized in
this function [-Wmaybe-uninitialized]
While unconvinced that this can happen in practice (if we malloc we set
alloced to true, it will be false otherwise), silence the compiler.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 15 Jan 2016 03:05:13 +0000 (22:05 -0500)]
Add more SPDX-License-Identifier tags
In a number of places we had wordings of the GPL (or LGPL in a few
cases) license text that were split in such a way that it wasn't caught
previously. Convert all of these to the correct SPDX-License-Identifier
tag.
Tom Rini [Thu, 14 Jan 2016 18:02:05 +0000 (13:02 -0500)]
gunzip.c: Only include gzwrite on CONFIG_CMD_UNZIP
Only when we have CONFIG_CMD_UNZIP enabled do we have the 'gzwrite'
command. While this command should be separated from CONFIG_CMD_UNZIP
we should also only include the write portion of the gz code in that
case as well.
Tom Rini [Thu, 14 Jan 2016 18:02:03 +0000 (13:02 -0500)]
vsprintf.c: Always enable CONFIG_SYS_VSNPRINTF
Enabling this function always removes some class of string saftey issues.
The size change here in general is about 400 bytes and this seems a reasonable
trade-off.
Cc: Peng Fan <peng.fan@nxp.com> Cc: Peter Robinson <pbrobinson@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Adrian Alonso <aalonso@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tom Rini <trini@konsulko.com>
MIPS: sync I/O related header files with linux-4.4
Mainly sync asm/io.h to get a working ioremap() implementation
as well as the full set of I/O accessors. Pull in additional
header files to make this work.
Furthermore port over the directory 'arch/mips/include/asm/mach-generic/'
with contains default definitions for I/O and memory spaces and default
implementations for mapping those spaces. All files in that directory
can be overwritten by a SoC/machine.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
net: pcnet: refactor mapping of virtual addresses to physical ones
pci_virt_to_mem() uses virt_to_phys() to get the physical address.
But pci_virt_to_mem() is also called with uncached addresses which
is wrong according to the documentation of virt_to_phys().
Refactor the PCI_TO_MEM() macro to optionally map an uncached address
back to a cached one before calling pci_virt_to_mem().
Currently pcnet works because virt_to_phys() is incorrectly implemented
on MIPS. With the upcoming asm header file update for MIPS, the
virt_to_phys() implementation will be fixed. Thus this patch is needed
to keep pcnet working on MIPS Malta board.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Add Kconfig symbol for L1 cache shift like the kernel does.
The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source
for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS.
If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the
cache sizes are automatically detected and ARCH_DMA_MINALIGN
would be set to 128 Bytes.
The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which
corresponds to 32 Bytes. All current MIPS boards already used
that value. While on it, fix the Malta board to use a value of 6
like the kernel port does.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
MIPS: malta: do not pull in target header files in config.h
config.h is used in target and host code and therefore should not
pull in target header files to avoid compile errors. This change
is also required for the MIPS header file sync done in follow-up
patches.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
MIPS: do not build position-independent executables for SPL
SPL binaries are usually linked to a fixed address in SRAM.
Furthermore SPL binaries do not need to relocate itself. Thus
do not build them as position-independent binaries which helps
to largely reduce the size of SPL binaries.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
socfpga: Modify qts-filter args to allow input for bsp generated files and quartus project directories
The hps_isw_handoff and bsp/generated folders are typically not in the same
path.This patch adds support for specifying the different input directories for
the bsp and quartus projects.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Chin Liang See <clsee@altera.com>
Peng Fan [Tue, 12 Jan 2016 07:57:01 +0000 (15:57 +0800)]
common: usb: fix checking condition
We support max USB_MAXENDPOINTS, so need to use
"epno >= USB_MAXENDPOINTS", but not "epno > USB_MAXENDPOINTS".
If use ">", we may exceeds the array of if_desc->ep_desc.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Marek Vasut <marex@denx.de> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: "Stefan Brüns" <stefan.bruens@rwth-aachen.de> Cc: Vincent Palatin <vpalatin@chromium.org>
Sanchayan Maity [Mon, 26 Oct 2015 12:58:50 +0000 (18:28 +0530)]
usb: host: ehci-vf: Implement board_usb_phy_mode weak function
Add board_usb_phy_mode weak function on similar lines to ehci-mx6.
However since Vybrid USB does not have a true OTG, make this weak
functon just return 0. The function is supposed to be implemented
by the individual boards using a GPIO for providing the OTG pin
functionality.
Ye.Li [Thu, 31 Dec 2015 07:24:45 +0000 (15:24 +0800)]
usb:ci_udc: Remove ULPI setting for i.MX OTG controller
All the i.MX6, i.MX23 and i.MX28 OTG controllers only support UTMI
interface. Set to ULPI is not correct, even the controller will
reject this setting in PORTSC register.
Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Sat, 28 Nov 2015 13:04:40 +0000 (08:04 -0500)]
eth-raw-os.c: Add cast to bind(2) call
With more recent gcc versions we otherwise get an error like:
note: expected 'const struct sockaddr *' but argument is of type
'struct sockaddr_in *'
and the common solution here is to cast, rather than re-work the code.
Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Fri, 15 Jan 2016 12:23:23 +0000 (05:23 -0700)]
x86: Fix board init breakage
Commit ecc30663 ("Fix board init code to respect the C runtime environment")
breaks x86. This was mentioned on https://patchwork.ozlabs.org/patch/548644
but not addressed. Correct it so that x86 boards boot again.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Fri, 15 Jan 2016 12:23:22 +0000 (05:23 -0700)]
dm: pci: Avoid a memory leak when allocating the ROM
Adjust pci_rom_load() to return an indication of whether it allocated
memory or not. Adjust the caller to free it. This fixes a memory leak
when PCI_VGA_RAM_IMAGE_START is not used.
Reported-by: Coverity (CID: 134194) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Stephen Warren [Thu, 14 Jan 2016 21:03:11 +0000 (14:03 -0700)]
arm: initialize gd for AArch64
Commit adc421e4cee8 "arm: move gd handling outside of C code" removed
the call to arch_setup_gd() on ARM and replaced it with assembly code
in crt0.S. However, AArch64 uses a different startup file, and the same
change was not made to it. This leaves gd uninitialized on AArch64, which
typically leads to hangs or crashes. This change fixes that.
Fixes: adc421e4cee8 ("arm: move gd handling outside of C code") Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stefan Roese [Thu, 14 Jan 2016 04:00:00 +0000 (05:00 +0100)]
MAINTAINERS: Update Marvell custodianship
Add myself as custodian for the Marvell git repository. Additionally,
add the mach-mvebu directory to the list of files / directories. And
add Armada XP & Armada 38x to the title (not only kirkwood).
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Tom Rini <trini@konsulko.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Luka Perkov <luka.perkov@sartura.hr>
Phil Sutter [Fri, 25 Dec 2015 13:41:26 +0000 (14:41 +0100)]
mvebu: ds414: Implement Synology specific command set
Synology keeps per item configuration in a dedicated 'partition' in SPI
flash, namely the one named 'vendor' in DTS file. It contains the two
NICs MAC addresses as well as the item's serial number. I didn't find a
way to have this information extracted automatically, therefore
implemented 'syno populate_env' command which extracts the three values
and puts them into environment. To make things permanent though, one has
to 'saveenv'.
Another command is 'syno clk_gate', which allows to change the clock
gating which is done in DS414 board file.
Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
Phil Sutter [Fri, 25 Dec 2015 13:41:25 +0000 (14:41 +0100)]
mvebu: Support Synology DS414
This adds support for the MV78230 based DS414 NAS by Synology. The
relevant bits have been extracted from the 'synogpl-5004-armadaxp'
package Synology kindly published, garnished with a fair amount of
trial-and-error.
Sadly, support is far from perfect. The major parts I have failed in
are SATA and XHCI support. Details about these and some other things
follow:
Device Tree
-----------
The device tree file armada-xp-synology-ds414.dts has been copied from
Linux and enhanced by recent U-Boot specific changes to
armada-xp-gp.dts.
SATA Support
------------
There is a Marvell 88SX7042 controller attached to PCIe which is
supported by Linux's sata_mv driver but sadly not U-Boot's sata_mv.
I'm not sure if extending the latter to support PCI devices is worth the
effort at all. Porting sata_mv from Linux exceeded my brain's
capacities. :(
XHCI Support
------------
There is an EtronTech EJ168A XHCI controller attached to PCIe which
drives the two rear USB3 ports. After a bit of playing around I managed
to get it recognized by xhci-pci, but never was able to access any
devices attached to it. Enabling it in ds414 board config shows that it
does not respond to commands for whatever reason. The (somewhat) bright
side to it is that it is not even supported in Synology's customized
U-Boot, but that also means nowhere to steal the relevant bits from.
EHCI Support
------------
This seems functional after issuing 'usb start'. At least it detects USB
storage devices, and IIRC reading from them was OK. OTOH Linux fails to
register the controller if 'usb start' wasn't given before in U-Boot.
According to Synology sources, this board seems to support USB device
(gadget?) mode. Though I didn't play around with it.
PCIe Support
------------
This is fine, but trying to gate the clocks of unused lanes will hang
PCI enum. In addition to that, pci_mvebu seems not to support DM_PCI.
DDR3 Training
-------------
Marvell/Synology uses eight PUPs instead of four. Does not look like
this is meant to be customized in mainline U-Boot at all. OTOH I have
no idea what a "PUP" actually is.
PEX Init
--------
Synology uses different values than mainline U-Boot with this patch:
pex_max_unit_get returns 2, pex_max_if_get returns 7 and
max_serdes_lines is set to 7. Not changing this seems to not have an
impact, although I'm not entirely sure it does not cause issues I am not
aware of.
Static Environment
------------------
This allows to boot stock Synology firmware at least. In order to be a
little more flexible when it comes to booting custom kernels, do not
only load zImage partition, but also rd.gz into memory. This way it is
possible to use about 7MB for kernel with piggyback initramfs.
Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
Phil Sutter [Fri, 25 Dec 2015 13:41:21 +0000 (14:41 +0100)]
mvebu: axp: refactor board_sat_r_get() and caller
Instead of calling board_sat_r_get() only for those boards providing the
satr11 value via I2C, call it for all boards and return static values
for those not using I2C.
In addition to that, make this a weak function to allow for board code
to override it.
Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
Phil Sutter [Fri, 25 Dec 2015 13:41:20 +0000 (14:41 +0100)]
drivers/pci/pci_mvebu: Fix for boards with X4 lanes
Armada XP has support for X4 lanes, boards specify this in their
serdes_cfg. During PEX init in high_speed_env_lib.c, the configuration
is stored in GEN_PURP_RES_2_REG.
When enumerating PEX, subsequent interfaces of an X4 lane must be
skipped. Otherwise the enumeration hangs up the board.
The way this is implemented here is not exactly beautiful, but it mimics
how Marvell's BSP does it. Alternatively we could get the information
using board_serdes_cfg_get(), but that won't lead to clean code, either.
Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
Phil Sutter [Fri, 25 Dec 2015 13:41:19 +0000 (14:41 +0100)]
axp: Fix debugging support in DDR3 write leveling
If MV_DEBUG_WL is defined, DEBUG_WL_S and DEBUG_WL_D macros are missing.
In addition to that, get rid of debug output printing non-existent
counter variable.
Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
Phil Sutter [Fri, 25 Dec 2015 13:41:18 +0000 (14:41 +0100)]
README: Review the u-boot porting guide list
* There is no boards.cfg anymore, so drop (1).
* Creating flash.c and u-boot.lds seems not mandatory as well.
* Adjusting the enumerators for the above implicitly fixed for
double items numbered (3).
Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
Stefan Roese [Thu, 7 Jan 2016 13:12:04 +0000 (14:12 +0100)]
arm: mvebu: Add runtime detection of UART (xmodem) boot-mode
This patch adds runtime detection of the Marvell UART boot-mode (xmodem
protocol). If this boot-mode is detected, SPL will return to the
BootROM to continue the UART booting.
With this patch its now possible, to generate a U-Boot image that
can be booted either from the strapped boot-device (e.g. SPI NOR, MMC,
etc) or via the xmodem protocol from the UART. In the UART case,
the kwboot tool will dynamically insert the UART boot-device type
into the image. And also patch the load address in the header, so
that the mkimage header will be skipped (as its not expected by the
Marvell BootROM).
This simplifies the development for Armada XP / 38x based boards.
As no special images need to be generated by selecting the
MVEBU_BOOTROM_UARTBOOT Kconfig option.
Since the Kconfig option MVEBU_BOOTROM_UARTBOOT is not needed any
more, its now completely removed.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
Stefan Roese [Thu, 7 Jan 2016 13:09:09 +0000 (14:09 +0100)]
arm: mvebu: Add runtime boot-device detection
This patch adds runtime boot-device detection to SPL U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
Stefan Roese [Thu, 7 Jan 2016 13:04:51 +0000 (14:04 +0100)]
arm: mvebu: Make local structs static const
As these structs are local only and const, declare them accordingly.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
Stefan Roese [Thu, 7 Jan 2016 13:03:11 +0000 (14:03 +0100)]
arm: mvebu: Move SAR register defines into header
This is preparation for the runtime bootmode detection in spl.c.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
Stefan Roese [Mon, 21 Dec 2015 13:30:30 +0000 (14:30 +0100)]
arm: mvebu: Remove leftover Makefile
This Makefile was not used since quite some time. I only missed to
remove it in the move to mach-mvebu. So lets remove it now so
that the mvebu-common directory is really removed completely.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Mon, 21 Dec 2015 12:56:33 +0000 (13:56 +0100)]
arm: mvebu: Move SoC selection (A38X vs AXP) into Kconfig
Until now, the SoC selection for the ARCH_MVEBU platforms has been done
in the config header. Using CONFIG_ARMADA_XP in a non-clear way. As
it needed to get selected for AXP and A38x based boards. This patch
now changes this to move the SoC selection to Kconfig. And also
uses CONFIG_ARCH_MVEBU as a common define for both AXP and A38x.
This makes things a bit clearer - especially for new board additions.
Additionally the defines CONFIG_SYS_MVEBU_DDR_AXP and
CONFIG_SYS_MVEBU_DDR_A38X are replaced with the already available
CONFIG_ARMADA_38X and CONFIG_ARMADA_XP.
And CONFIG_DDR3 is removed, as its not referenced anywhere.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Fri, 11 Dec 2015 07:24:20 +0000 (08:24 +0100)]
arm: mvebu: Don't include "netdev.h" in cpu.c
This is not needed any more since the switch to DM / DTS network
initialization on MVEBU. Lets remove it, as it otherwise leads
to compilation warning when CONFIG_NET is not enabled.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Thu, 10 Dec 2015 14:02:38 +0000 (15:02 +0100)]
arm: mvebu: Make ECC support configurable on Armada XP
Currently, ECC support is enabled for all Armada XP boards. So the
DDR3 driver tries to configure the controller with ECC support, even
on boards without ECC. This patch makes this ECC optional which now
can be configured on a board-per-board basis.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Phil Sutter <phil@nwl.cc>
Stefan Roese [Wed, 9 Dec 2015 10:00:51 +0000 (11:00 +0100)]
arm: mvebu: Add support for MV78260
This patch adds support for the dual core Armada XP variant, the
MV78260. It has some minor differences to the 4-core MV78460,
e.g. only 12 serdes lanes.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Phil Sutter <phil@nwl.cc>
Stefan Roese [Thu, 3 Dec 2015 11:39:45 +0000 (12:39 +0100)]
arm: mvebu: Don't disable cache at startup on Armada XP at all
This patch leaces the cache configuration untouched for the AXP in the
setup done by the BootROM. Resulting in the cache still being enabled
at the startup of U-Boot. This leads to a slightly faster boot to the
U-Boot prompt (or Linux of course).
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Thu, 3 Dec 2015 11:39:45 +0000 (12:39 +0100)]
arm: mvebu: Don't call arch_cpu_init() from SPL at all
This patch removes the call to arch_cpu_init() in the SPL U-Boot version.
As SPL does not need all the configuration done in this function. And
also does not need the reconfiguration of the internal register
address to 0xf1000000. This will be done by the main U-Boot later on.
This also fixes a problem with the timer not beeing initialized on AXP,
as needed for the mdelay in the setup_usb_phys(). This will now only
be called once in main U-Boot.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Mon, 14 Dec 2015 11:31:48 +0000 (12:31 +0100)]
arm: mvebu: Add v7_outer_cache_disable function for AXP & A38x
Add functionality to correctly disable the L2 cache on the Armada XP
and 38x platforms.
Without this, booting into Linux on ClearFog (A38x) results in a hangup
without any output on the serial console at all. Even with earlyprintk
enabled.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Thu, 3 Dec 2015 11:39:45 +0000 (12:39 +0100)]
arm: mvebu: Enable L2 cache on Armada XP
Until now, the L2 cache was never enabled again in U-Boot. To get
even better performance (bootup time), lets enable the L2 cache
in U-Boot. This code was taken from the Linux kernel.
A performance gain was measured on the DB-MV784MP-GP board by testing
with tftpboot and sata commands.
This patch also cleans up the L2 cache related code. And makes sure that
the L2 cache is only disabled once.
Please note that A38x still runs with L2 cache disabled. And needs
to be enabled for this SoC in a separate patch if needed or desired.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Thu, 3 Dec 2015 11:39:45 +0000 (12:39 +0100)]
arm: mvebu: db-mv784mp-gp: Switch from IDE to SATA support
Enable the newly introduced SATA driver for the Marvell AXP with DMA
support instead of the PIO-only IDE driver. This increases the
transfer speed. And is also more in-line with the Armada 38x
ports, which also use a SATA driver (AHCI) and the "sata" U-Boot
commands.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Tor Krill [Thu, 3 Dec 2015 11:38:02 +0000 (12:38 +0100)]
sata: Add SATA driver with DMA support for Marvell Kirkwood and Armada XP
This patch adds a new SATA driver for the Marvell Kirkwood and Armada
370 / XP SoC's.
This driver supports the SATA controller of some Mavell SoC's.
Here a (most likely incomplete) list of the supported SoC's:
- Kirkwood
- Armada 370
- Armada XP
This driver implementation is an alternative to the already available
driver via the "ide" commands interface (drivers/block/mvsata_ide.c).
But this driver only supports PIO mode and as this new driver also
supports transfer via DMA, its much faster.
Please note, that the newer SoC's (e.g. Armada 38x) are not supported
by this driver. As they have an AHCI compatible SATA controller
integrated.
The original version of this driver was sent by Tor Krill to the U-Boot
list a few years ago. Here the link:
Changes by Stefan:
- Coding-style cleanup
- Support for Armada XP added
- MBUS window setup added
- D-cache flush and invalidation added - works with dcache enabled on
Armada XP
- Removed mdelay() from ata_wait_register() and add timer based timeout
detection to speed up the transfer
Signed-off-by: Tor Krill <tor@excito.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Tom Rini <trini@konsulko.com>
Stefan Roese [Tue, 20 Oct 2015 13:14:47 +0000 (15:14 +0200)]
arm: mvebu: Add SolidRun ClearFog Armada 38x initial support
This patch adds basic support for the SolidRun ClearFog Armada 38x based
board to mainline U-Boot. Supported interfaces / devices are:
- DDR3
- UART
- MMC
- Ethernet port 0 (connected to dedicated PHY)
- I2C
The included DT source was taken from Russell King's ftp server:
http://www.home.arm.linux.org.uk/~rmk/clearfog/
With only minor modifications, like the addition of some aliases and the
"u-boot,dm-pre-reloc" property.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Thu, 19 Nov 2015 06:46:15 +0000 (07:46 +0100)]
net: mvneta: Convert to driver model
Update this driver to support driver model. As all MVEBU boards using
this driver are converted with this patch, the non-driver-model code
can be removed completely. This is also the reason why this patch
is quite big and includes a) the driver change and b) the
platform change. As its not git-bisect save otherwise.
With this conversion, some parameters are now extracted from the
DT instread of using the config header defines. The supported
properties right now are:
PHY-mode ("phy-mode") and PHY-address ("reg").
The base addresses for the ethernet controllers can be removed from
the header files as well.
Please note that this patch also removes the E1000 network driver
from some MVEBU config headers. This is necessary, as with DM_ETH
configured and the e1000 driver enabled, the PCI driver also needs
to support DM. But the MVEBU PCI(e) driver still needs to get
ported to DM. When this is done, the E1000 driver can be enabled
again.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
Stefan Roese [Thu, 19 Nov 2015 10:03:25 +0000 (11:03 +0100)]
arm: mvebu: Add armada-xp-maxbcm.dts for maxbcm board
This is needed for the upcoming ethernet DM conversion of the maxbcm
board. The configuration of the PHY is then extracted from the DT
instead of using the defines from the config header.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Fri, 20 Nov 2015 12:51:57 +0000 (13:51 +0100)]
arm: mvebu: Add SPI driver model support
This patch enables the DM support for the SPI driver and the
SPI NOR flash chips. Some MVEBU boards boot from SPI NOR, so
adding the aliases and enabling CONFIG_DM_SEQ_ALIAS is needed
here.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Simon Glass <sjg@chromium.org>
Stefan Roese [Fri, 20 Nov 2015 12:39:43 +0000 (13:39 +0100)]
spi: kirkwood_spi.c: Add driver model support
This patch adds driver model support to the kirkwood SPI driver. Which
is also used on the MVEBU SoC's, now being converted to DM. Non-DM
support is still available for the "older" platforms using this
driver, like kirkwood.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Jagan Teki <jteki@openedev.com> Cc: Simon Glass <sjg@chromium.org>
Stefan Roese [Fri, 20 Nov 2015 07:44:21 +0000 (08:44 +0100)]
spi: kirkwood_spi.c: Prepare for driver model support
This patch prepares the Kirkwood SPI driver, also used on the MVEBU board
(Armada XP / 38x), for the conversion to driver model.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Jagan Teki <jteki@openedev.com> Cc: Simon Glass <sjg@chromium.org>
Stefan Roese [Wed, 25 Nov 2015 06:37:00 +0000 (07:37 +0100)]
arm: mvebu: Add DM and OF_CONTROL support to SPL
This patch adds full DM support to the SPL on MVEBU. Currently
only serial is supported. Other drivers will follow.
This patch also adds the necessary config values for the DEBUG UART
to the MVEBU defconfig files. This came in handy while implementing
this DM support.
Additionally, the mvebu specific SPL linker script is removed and
this common one is used instead:
arch/arm/cpu/u-boot-spl.lds
This common linker script already handles all special cases. No need
to reinvent the wheel for MVEBU here.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Simon Glass <sjg@chromium.org>
Stefan Roese [Thu, 19 Nov 2015 12:50:10 +0000 (13:50 +0100)]
arm: mvebu: ddr: Fix compilation warning
gcc 5.1 generates this new warning (for Armada 38x platforms):
drivers/ddr/marvell/a38x/ddr3_debug.c: In function 'hws_ddr3_tip_read_training_result':
drivers/ddr/marvell/a38x/ddr3_debug.c:177:40: warning: 'sizeof' on array
function parameter 'result' will return size of 'enum hws_result (*)[1]' [-Wsizeof-array-argument]
memcpy(result, training_result, sizeof(result));
^
drivers/ddr/marvell/a38x/ddr3_debug.c:171:31: note: declared here
u32 dev_num, enum hws_result result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM])
^
Since this functions is not referenced anywhere, lets just remove it.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
Peng Fan [Tue, 12 Jan 2016 09:23:12 +0000 (17:23 +0800)]
common: env_flags: fix loop condition when using env_flags_varaccess_mask
We should use ARRAY_SIZE, but not sizeof. The size of
env_flags_varaccess_mask is 16bytes, but we only need 4 loops.
If using 16 as the end condition, we may access memory that
not belong to array env_flags_varaccess_mask.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: York Sun <yorksun@freescale.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Peng Fan [Sun, 10 Jan 2016 05:01:22 +0000 (13:01 +0800)]
common: cli_simple: use strlcpy instead of strcpy
Report Coverity log:
Destination buffer too small (STRING_OVERFLOW)
string_overflow: You might overrun the 1024 byte destination string
lastcommand by writing 1025 bytes from console_buffer
Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Add a 'poweroff' command to boot commands, this only gets enabled if the
board Kconfig does a "select CMD_POWEROFF".
Signed-off-by: Michael van Slingerland <michael@deviousops.nl>
[hdegoede@redhat.com: Make the cmd conditional on a CMD_POWEROFF Kconfig] Signed-off-by: Hans de Goede <hdegoede@redhat.com>
net: lpc32xx: fix ignored MDIO busy wait status on read
The change fixes PHY write operation, which incorrectly waits for
released busy state before issuing a write operation, this breaks
sequential write/read operation logic, because read operation
starts immediately on request and it completes, when busy state is
gone.
Instead of adding the second preceding busy state check to read
function, do busy state release check after issuing a write operation,
this method of operation is also recommended by the LPC32xx User's
Manual, see MII Mgmt Indicators Register notes:
For PHY Write if scan is not used:
1. Write 0 to MCMD
2. Write PHY address and register address to MADR
3. Write data to MWTD
4. Wait for busy bit to be cleared in MIND
Reported-by: Alexandre Messier <amessier@tycoint.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Alexandre Messier <amessier@tycoint.com>
projects / u-boot.git / log