In accordance with our other modules supported by U-Boot and as agreed
upon for Apalis/Colibri T30 get rid of the carrier board in the board/
configuration/device-tree naming.
While at it also bring the prompt more in line with our other products.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Marcel Ziswiler [Thu, 26 Mar 2015 00:31:53 +0000 (01:31 +0100)]
ARM: tegra: get rid of colibri_t20-common
As a preparatory step to renaming the board folder as well first get
rid of the colibri_t20-common after having integrated it into
colibri_t20_iris for now.
While at it also migrate to using NVIDIA's common.mk magic.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Wed, 25 Mar 2015 18:04:35 +0000 (12:04 -0600)]
ARM: tegra: pinctrl: minor cleanup
Move struct pmux_pingrp_desc type and tegra_soc_pingroups variable
declaration together with other pin/mux level definitions. Now the whole
file is grouped/ordered pin/mux-related then drvgrp-related definitions.
Fix typo in ifdef comment.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Wed, 25 Mar 2015 18:04:34 +0000 (12:04 -0600)]
ARM: tegra: pinctrl: move Tegra210 code to the correct dir
Patches that added the Tegra210 pinctrl driver and renamed directories
arch/arm/cpu/tegra{$soc}-common -> arch/arm/mach-tegra/tegra-${soc}
crossed. Move the Tegra210 pinctrl driver to the correct location. This
wasn't detected since Tegra210 support is in the process of being added,
and isn't buildable yet.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Sjoerd Simons [Wed, 25 Feb 2015 22:23:52 +0000 (23:23 +0100)]
config_distro_bootcmd.h: Prefer booting from bootable paritions
List bootable partitions and only scan those for bootable files, falling
back to partition 1 if there are no bootable partitions
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Sjoerd Simons [Wed, 25 Feb 2015 22:23:51 +0000 (23:23 +0100)]
config_cmd_default.h: Add 'env exists' command
env exists allows scripts to query whether an environment variable
exists. Enable by default as it adds only a trivial amount of code and
can be useful in scripts.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Tue, 24 Mar 2015 05:00:25 +0000 (23:00 -0600)]
ARM: rpi: fix RPi1 board rev detection for warranty bit
Apparently the firmware's board rev response includes both the board
revision and some other data even on the RPi1. In particular, the
"warranty bit" is bit 24. We need to mask that out when looking up the
board ID.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
The callee (arch/arm/lib/cache-cp15.c) has a #ifdef
CONFIG_SYS_DCACHE_OFF conditional. The same conditional in the
caller (arch/arm/mach-uniphier/cache_uniphier.c) is redundant.
Masahiro Yamada [Sun, 22 Mar 2015 15:07:32 +0000 (00:07 +0900)]
ARM: UniPhier: disable L2 cache by lowlevel_init of U-Boot proper
The L2 cache is used as a temporary SRAM on SPL.
Now the secondary CPUs store the necessary code for jumping to
Linux on their L1 I-caches. So, the L2 cache can be disabled
much earlier, at the very entry of U-Boot proper (lowlevel_init).
This makes the boot sequence clearer.
Also, as the L1 cache has been disabled by the start.S,
enable_caches() does not need to do it again.
Currently, the secondary CPU(s) are kicked three times:
Boot ROM ---(kick)--> SPL ---(kick)--> U-boot ---(kick)--> Linux.
It makes the boot sequence very complicated.
This commit merges the first and the second kicks, so the secondary
CPU(s) can directly jump from SPL to Linux.
arch/arm/mach-uniphier/smp.S is no longer necessary.
Masahiro Yamada [Sun, 22 Mar 2015 15:07:25 +0000 (00:07 +0900)]
ARM: UniPhier: enable Driver Model and UART on SPL
Enable CONFIG_SPL_DM and CONFIG_SPL_SERIAL_SUPPORT, which provide
Driver Model UART support on SPL.
CONFIG_SYS_SPL_MALLOC_{START,SIZE} should be dropped because simple
malloc is preferred on SPL. Dlmalloc requires some static variables
on .data section that is not available yet for NOR boot mode etc.
Masahiro Yamada [Sun, 22 Mar 2015 15:07:21 +0000 (00:07 +0900)]
ARM: UniPhier: include PH1-LD4 Makefile from PH1-sLD8
The two Makefiles arch/arm/mach-uniphier/{ph1-ld4,ph1-sld8}/Makefile
are completely the same. We can improve the maintainability by
having one to include the other.
Masahiro Yamada [Mon, 16 Mar 2015 04:46:07 +0000 (13:46 +0900)]
ARM: UniPhier: remove unnecessary CONFIG_SYS_SOC
Since commit a86ac9540e20 (ARM: UniPhier: include <mach/*.h> instead
of <asm/arch/*.h>), UniPhier platform does not need the symbolic
link arch/arm/include/asm. This option is not necessary either.
Bo Shen [Wed, 4 Mar 2015 05:35:16 +0000 (13:35 +0800)]
Net: macb: reset GBE bit when fallback checking
If the GBE bit is set, when do next time autonegotiation,
if the result is not 1000Mbps, it will fallback to 100Mbps
checking. So, we need to clear the GBE bit.
Stefan Roese [Wed, 18 Mar 2015 08:30:54 +0000 (09:30 +0100)]
i2c: mvtwsi: Fix problem with baud rate calculation
The current implementation for baudrate calculation is incorrect.
This part from the formula:
"2 ^ (n + 1)" is not equivalent to (1 << n) but to (2 << n)!
This patch fixes this and moves this calculation to a function instead of using a macro.
This new function is taken from the Linux kernel.
This was detected and tested on the Marvell Armada A38x DB-88F6820-GP eval board.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Heiko Schocher <hs@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com>
Matt Reimer [Mon, 23 Feb 2015 21:56:58 +0000 (14:56 -0700)]
mmc: sdhci: don't clobber adjacent registers
SDHCI_HOST_CONTROL is a byte-sized register, so don't write to it
as if it were a long, as that would result in clobbering the three
registers following.
Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
Masahiro Yamada [Thu, 12 Mar 2015 04:24:39 +0000 (13:24 +0900)]
kconfig: remove meaningless prefixes in defconfig files
Since commit e02ee2548afe (kconfig: switch to single .config
configuration), the prefixes in defconfig files such as "+S:",
"+ST:", etc., are meaningless.
This commit was generated by the following command:
find configs -name '*_defconfig' | xargs sed -i 's/^+*S*T*://'
Masahiro Yamada [Wed, 11 Mar 2015 08:34:25 +0000 (17:34 +0900)]
README: remove description about driver model configuration options (again)
The Driver Model description in README was removed by commit 65eb659e56fa (README: remove description about driver model
configuration options), and was revived by mistake by commit b79dadf846e5 when resolving the conflict.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Tue, 10 Mar 2015 21:40:58 +0000 (15:40 -0600)]
config_distro_bootcmd.h: add note on error handling
This should make it more clear why there appear to be C pre-processor
symbols in the file that contain mixed case. They're really error
messages.
Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Nishanth Menon [Mon, 9 Mar 2015 22:12:09 +0000 (17:12 -0500)]
ARM: OMAP3: rx51: Enable workaround for ARM errata 454179, 430973, 621766
RX51 has a secure logic which uses different parameters compared to
traditional implementation. So, make the generic secure acr write
over-ride-able by board file and refactor rx51 code to use this.
While at it, enable the OMAP3 specific errata code for 454179, 430973,
621766.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Praveen Rao [Mon, 9 Mar 2015 22:12:06 +0000 (17:12 -0500)]
ARM: DRA7 / OMAP5: Add workaround for ARM errata 798870
This patch enables the workaround for ARM errata 798870 for OMAP5 /
DRA7 which says "If back-to-back speculative cache line fills (fill
A and fill B) are issued from the L1 data cache of a CPU to the
L2 cache, the second request (fill B) is then cancelled, and the
second request would have detected a hazard against a recent write or
eviction (write B) to the same cache line as fill B then the L2 logic
might deadlock."
An l2auxctlr accessor implementation for OMAP5 and DRA7 is introduced
here as well.
Signed-off-by: Praveen Rao <prao@ti.com> Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Mon, 9 Mar 2015 22:12:03 +0000 (17:12 -0500)]
ARM: OMAP: Change set_pl310_ctrl_reg to be generic
set_pl310_ctrl_reg does use the Secure Monitor Call (SMC) to setup
PL310 control register, however, that is something that is generic
enough to be used for OMAP5 generation of processors as well. The only
difference being the service being invoked for the function.
So, convert the service to a macro and use a generic name (same as
that used in Linux for some consistency). While at that, also add a
data barrier which is necessary as per recommendation.
While at this, smc #0 is maintained as handcoded assembly thanks to
various gcc version eccentricities, discussion thread:
http://marc.info/?t=142542166800001&r=1&w=2
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Mon, 9 Mar 2015 22:12:02 +0000 (17:12 -0500)]
ARM: Introduce erratum workaround for 621766
621766: Under a specific set of conditions, executing a sequence of
NEON or vfp load instructions can cause processor deadlock
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set L1NEON to 1
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Mon, 9 Mar 2015 22:12:01 +0000 (17:12 -0500)]
ARM: Introduce erratum workaround for 430973
430973: Stale prediction on replaced inter working branch causes
Cortex-A8 to execute in the wrong ARM/Thumb state
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set IBE to 1
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Mon, 9 Mar 2015 22:12:00 +0000 (17:12 -0500)]
ARM: Introduce erratum workaround for 454179
454179: Stale prediction may inhibit target address misprediction on
next predicted taken branch
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set IBE and disable branch size mispredict to 1
Also provide a hook for SoC specific handling to take place if needed.
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Mon, 9 Mar 2015 22:11:59 +0000 (17:11 -0500)]
ARM: Introduce erratum workaround for 798870
Add workaround for Cortex-A15 ARM erratum 798870 which says
"If back-to-back speculative cache line fills (fill A and fill B) are
issued from the L1 data cache of a CPU to the L2 cache, the second
request (fill B) is then cancelled, and the second request would have
detected a hazard against a recent write or eviction (write B) to the
same cache line as fill B then the L2 logic might deadlock."
Implementations for SoC families such as Exynos, OMAP5/DRA7 etc
will be widely different.
Every SoC has slightly different manner of setting up access to L2ACLR
and similar registers since the Secure Monitor handling of Secure
Monitor Call(smc) is diverse. Hence an weak function is introduced
which may be overriden to implement SoC specific accessor implementation.
Based on ARM errata Document revision 18.0 (22 Nov 2013)
Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Matt Porter <mporter@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 9 Mar 2015 16:40:36 +0000 (12:40 -0400)]
am335x_evm_usbspl: Remove other SPL modes
The purpose of this build target is to do SPL over USB RNDIS. We remove
YMODEM, MMC and NAND (and re-set ENV to be built-in) as when those are needed
we can use the other build targets. This brings us well under size limit again.
Fabio Estevam [Thu, 12 Mar 2015 01:52:14 +0000 (22:52 -0300)]
mx6_common: Do not select esdhc DDR mode for all boards
CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE should be selected only by boards that really
have a DDR-capable eMMC, so remove this option from common code to avoid
regressions.
Reported-by: Stefan Roese <sr@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Volodymyr Riazantsev <volodymyr.riazantsev@globallogic.com> Tested-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 10 Mar 2015 07:04:36 +0000 (08:04 +0100)]
common/board_f.c: Enable IMX watchdog in init_func_watchdog_init()
Without this patch, the IMX watchdog will not be initialized. And therefor
not active. This patch fixes this by calling hw_watchdog_init() also when
CONFIG_IMX_WATCHDOG is defined.
Dirk Behme [Mon, 9 Mar 2015 13:48:48 +0000 (14:48 +0100)]
mx6: soc: Switch to cold reset
Disable the warm reset and enable the cold reset for a more reliable
restart ('reset'). This is taken from the Linux kernel, see imx_src_init()
in arch/arm/mach-imx/src.c.
Fabio Estevam [Mon, 2 Mar 2015 17:14:38 +0000 (14:14 -0300)]
novena: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".
Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.
Cc: Marek Vasut <marex@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
Fabio Estevam [Mon, 2 Mar 2015 17:14:37 +0000 (14:14 -0300)]
warp: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".
Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.
Cc: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Fabio Estevam [Mon, 2 Mar 2015 17:14:36 +0000 (14:14 -0300)]
nitrogen6x: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".
Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.
Cc: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fabio Estevam [Mon, 2 Mar 2015 17:14:35 +0000 (14:14 -0300)]
hummingboard: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".
Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.
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