Peng Fan [Thu, 1 Sep 2016 03:13:39 +0000 (11:13 +0800)]
mmc: sd: optimize erase
To SD, there is no erase group, then the value erase_grp_size
will be default 1. When erasing SD blocks, the blocks will be
erased one by one, which is time consuming.
We use AU_SIZE as a group to speed up the erasing.
Erasing 4MB with a SD2.0 Card with AU_SIZE 4MB.
`time mmc erase 0x100000 0x2000`
time: 44.856 seconds (before optimization)
time: 0.335 seconds (after optimization)
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Eric Nelson <eric@nelint.com> Cc: Stephen Warren <swarren@nvidia.com>
Peng Fan [Thu, 1 Sep 2016 03:13:38 +0000 (11:13 +0800)]
mmc: sd: extracting erase related information from sd status
Add function to read SD_STATUS information.
According to the information, get erase_timeout/erase_size/erase_offset.
Add a structure sd_ssr to include the erase related information.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Eric Nelson <eric@nelint.com> Cc: Stephen Warren <swarren@nvidia.com>
Masahiro Yamada [Thu, 25 Aug 2016 07:07:39 +0000 (16:07 +0900)]
mmc: sdhci: drop CONFIG_ from CONFIG_SDHCI_CMD_MAX_TIMEOUT
No need for per-SoC adjustment for this parameter. It should be
determined by the slowest hardware. Currently, no board overrides
this CONFIG, so 3.2 sec is large enough. (If not, we can make it
even larger.)
Masahiro Yamada [Thu, 25 Aug 2016 07:07:38 +0000 (16:07 +0900)]
mmc: sdhci: drop CONFIG_ from CONFIG_SDHCI_CMD_DEFAULT_TIME
This CONFIG is not configurable since it is not guarded by #ifndef.
Nobody has complained about that, so there is no need to keep it as
a CONFIG option.
Masahiro Yamada [Thu, 25 Aug 2016 07:07:37 +0000 (16:07 +0900)]
mmc: sdhci: move SDMA capability check to sdhci_setup_cfg()
If CONFIG_BLK is enabled, add_sdhci() is never called. Move this
quirk handling to sdhci_setup_cfg(), which is now the central place
for hardware capability checks.
Masahiro Yamada [Thu, 25 Aug 2016 07:07:36 +0000 (16:07 +0900)]
mmc: sdhci: move broken voltage quirk handling to sdhci_setup_cfg()
If CONFIG_BLK is enabled, add_sdhci() is never called. Move this
quirk handling to sdhci_setup_cfg(), which is now the central place
for hardware capability checks.
Masahiro Yamada [Thu, 25 Aug 2016 07:07:35 +0000 (16:07 +0900)]
mmc: sdhci: move error message to more relevant place
"Hardware doesn't specify base clock frequency" may not be only the
error case of sdhci_setup_cfg(). It is better to print this where
the corresponding error is triggered.
Masahiro Yamada [Thu, 25 Aug 2016 07:07:34 +0000 (16:07 +0900)]
mmc: sdhci: move sdhci_reset() call to sdhci_init()
If CONFIG_BLK is enabled, add_sdhci() is never called.
So, sdhci_reset() is not called, either. This is a problem for
my board as it needs the reset to start from a sane state.
Move the add_sdhci() call to sdhci_init(), which is visited
by both of the with/without CONFIG_BLK cases.
I took a closer look at this after the commit was applied, and found
CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much. 8KB memory for SPL is
actually too big for some boards. Perhaps 0x800 is enough, but the
situation varies board by board.
Let's postpone our decision until we come up with a better idea.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
ARM: uniphier: collect clock/PLL init code into a single directory
Now PLLs for DRAM controller are initialized in SPL, and the others
in U-Boot proper. Setting up all of them in a single directory will
be helpful when we want to share code between SPL and U-Boot proper.
ARM: uniphier: move PLL init code to U-Boot proper where possible
The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper. Move them from SPL to
U-Boot proper to save the precious SPL memory footprint.
The NAND subsystem has not supported the Driver Model yet, but the
NAND pin-mux data are already in the pinctrl drivers. Use them by
calling pinctrl_generic_set_state() directly.
Hans de Goede [Sat, 17 Sep 2016 14:02:38 +0000 (16:02 +0200)]
sunxi: musb: Re-init musb controller on repeated probe calls
With sunxi-musb musb_lowlevel_init() can fail when a charger; or no cable
is plugged into the otg port.
To avoid leaking the struct musb allocated by musb_init_controller()
on repeated musb_usb_probe() calls, we were caching its result.
But musb_init_controller() does more, such as calling sunxi_musb_init()
which enables the clocks.
Not calling sunxi_musb_init() causes the musb controller to stop working
after a "usb reset" since that calls musb_usb_remove() which disables the
clocks.
This commit fixes this by removing the caching of the struct returned
from musb_init_controller(), it replaces this by free-ing the allocated
memory in musb_usb_remove() and calling musb_usb_remove() on
musb_usb_probe() errors to ensure proper cleanup.
While at it also make musb_usb_probe() and musb_usb_remove() static.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi: musb: Power off OTG port VBUS when disabled
The Linux kernel musb driver expects VBUS to be off while initializing
musb. Having it on results in a repeating string of warnings, followed
by an unusable peripheral. The peripheral is only usable after
physically removing the OTG adapter, letting musb reset its state.
This partially reverts commit c9f8947e6604 ("sunxi: usb-phy: Never
power off the usb ports")
Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Mon, 12 Sep 2016 07:52:52 +0000 (09:52 +0200)]
sunxi: axp2xx: disable ldoio0/1 at boot
When cold-booting the ldoio0/1 regulators are always off / the
gpios are always at tristate. But when re-booting from android these
are sometimes on. Disable them at axp_init time (iow as early as possible)
to remove this difference between a cold boot and a reboot.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Simon Glass [Tue, 13 Sep 2016 05:18:30 +0000 (23:18 -0600)]
spear: Use upper case for CONFIG options
There are a few options which use lower case. We should use upper case for
all CONFIG options.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add usbtty/nand hunk to include/configs/spear3xx_evb.h] Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Tue, 13 Sep 2016 13:05:23 +0000 (07:05 -0600)]
Kconfig: spl: Add SPL support options to Kconfig
There are a lot of SPL options in U-Boot to enable various features and
drivers. Currently these do not use Kconfig. Add them to Kconfig along
with suitable help, and drop them from the README.
Simon Glass [Tue, 13 Sep 2016 05:18:25 +0000 (23:18 -0600)]
Use separate options for TPL support
At present TPL uses the same options as SPL support. In a few cases the board
config enables or disables the SPL options depending on whether
CONFIG_TPL_BUILD is defined.
With the move to Kconfig, options are determined for the whole build and
(without a hack like an #undef in a header file) cannot be controlled in this
way.
Create new TPL options for these and update users. This will allow Kconfig
conversion to proceed for these boards.
Simon Glass [Tue, 13 Sep 2016 05:18:23 +0000 (23:18 -0600)]
arm: fsl: Adjust ordering of #ifndef CONFIG_SPL_BUILD
The secure boot header files incorrectly define SPL options only if
CONFIG_SPL_BUILD is defined. This means that the options are only enabled
in an SPL build, and not with a normal 'make xxx_defconfig'. This means
that moveconfig.py cannot work, since it sees the options as disabled even
when they may be manually enabled in an SPL build.
Simon Glass [Tue, 13 Sep 2016 05:18:21 +0000 (23:18 -0600)]
moveconfig: Add an option to commit changes
The moveconfig tool is quite clever and generally produces results that
are suitable for sending as a patch without further work. The main required
step is to add the changes to a commit.
Add an option to do this automatically. This allows moveconfig to be used
from a script to convert multiple CONFIG options, once per commit.
Simon Glass [Tue, 13 Sep 2016 05:18:20 +0000 (23:18 -0600)]
moveconfig: Add an option to skip prompts
At present it is not easy to use moveconfig from a script since it asks
for user input a few times. Add a -y option to skip this and assume that
'y' was entered.
ARM: uniphier: introduce flags to adjust DRAM timing for LD20/LD21
Unfortunately, this SoC needs per-board adjustment between clock
and address/command lines. This flag will be passed to the DRAM
init function and used for compensating the difference of DRAM
timing parameters.
The serial console is not ready at the point of [2], so we want to
avoid using [2] from the view point of debuggability. Fortunately,
all of the initialization in [2] can be delayed until [3]. I see no
good reason to split into [3] and [4]. So, merge [2] through [4].
John Keeping [Thu, 18 Aug 2016 19:08:42 +0000 (20:08 +0100)]
rockchip: i2c: fix >32 byte writes
The special handling of the chip address and register address must only
happen before we send the data buffer, otherwise we will end up
inserting both of these every 32 bytes.
Signed-off-by: John Keeping <john@metanate.com> Acked-by: Simon Glass <sjg@chromium.org>
projects / u-boot.git / log