]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
4 weeks agoarm64: dts: ti: k3-j7200: Fix OSPI boot
Udit Kumar [Tue, 19 Nov 2024 10:07:20 +0000 (15:37 +0530)]
arm64: dts: ti: k3-j7200: Fix OSPI boot

OSPI boot is broken due to missing bootph property
in pin mux of OSPI.
So add bootph to fix OSPI boot.

Signed-off-by: Udit Kumar <u-kumar1@ti.com>
4 weeks agoboard: armltd: Make myself maintainer for total compute
Ben Horgan [Tue, 19 Nov 2024 17:25:58 +0000 (17:25 +0000)]
board: armltd: Make myself maintainer for total compute

The previous maintainer is no longer involved in total compute.

Signed-off-by: Ben Horgan <ben.horgan@arm.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Leo Yan <leo.yan@arm.com>
4 weeks agoRevert "test: Update time tests to use unit-test asserts"
Tom Rini [Tue, 19 Nov 2024 14:05:26 +0000 (08:05 -0600)]
Revert "test: Update time tests to use unit-test asserts"

While at the base level, this conversion looks equivalent, we now see
both of these tests failing (due to exceeding their allowed margin for
being too slow) in Azure with a very high frequency.

This reverts commit 88db4fc5fec20429881896740df61d402b4b1f66.

Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 weeks agonet: lwip: fix dhcp_loop()
Jerome Forissier [Fri, 22 Nov 2024 12:35:29 +0000 (13:35 +0100)]
net: lwip: fix dhcp_loop()

The local variables ipstr, maskstr and gwstr in static function
dhcp_loop() cannot be pointers to read-only data, since they may be
written to in case the device index is > 0. Therefore make them char
arrays allocated on the stack.

Reported-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 weeks agotest: boot: Set DM|SCAN_FDT flags for bootmeth_{cros,android}
Mattijs Korpershoek [Fri, 22 Nov 2024 14:11:34 +0000 (15:11 +0100)]
test: boot: Set DM|SCAN_FDT flags for bootmeth_{cros,android}

We make fewer calls to dm_test_restore() since
commit fbdac8155c89 ("test: Expand implementation of ut_list_has_dm_tests()")

Because of this some valid test combinations are now broken:

$ ./test/py/test.py --bd sandbox --build -k test_ut
$ ./test/py/test.py --bd sandbox --build -k "bootflow_android or bootflow_cros"

Shows:

  Expected '  2  cros         ready   mmc          4 mmc5.bootdev.part_4       ',
  got '  2  cros         ready   mmc          2 mmc5.bootdev.part_2       '

Here prep_mmc_bootdev() is called twice and it will bind bootmeth_cros twice.

Since bootmeth_cros is bound twice, 'bootflow scan' will find 2x the
expected bootflows.

Before
commit fbdac8155c89 ("test: Expand implementation of ut_list_has_dm_tests()")
this did not happen because a cleanup was called each time.

Add UTF_DM and UTF_SCAN_FDT flags to both tests to make sure that the
bootmeths are unbound after the test finishes.

Fixes: fbdac8155c89 ("test: Expand implementation of ut_list_has_dm_tests()")
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
4 weeks agoMerge branch 'qcom-main' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
Tom Rini [Wed, 20 Nov 2024 17:55:24 +0000 (11:55 -0600)]
Merge branch 'qcom-main' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon

CI: https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/pipelines/23474

- UFS support is enabled for SC7280 and SM8150 platforms.
- Qualcomm dt-bindings headers are all dropped in favour of
  dts/upstream.
- The SMMU driver now correctly handles stream ID 0 and is disabled in
  EL2.
- Initial support for capsule updates (using the new dynamic UUIDs) is
  added for the RB3 Gen 2 board alongside a new SCSI backend for DFU.
- CONFIG_PINCONF is enabled in qcom_defconfig.
- The vqmmc supply is now enabled for sdcard support on boards that need
  it.
- A quirk is added for reading GPIOs on the PM8550 PMIC

4 weeks agotreewide: remove Qualcomm dt-binding headers that are available upstream
Caleb Connolly [Wed, 13 Nov 2024 04:33:32 +0000 (05:33 +0100)]
treewide: remove Qualcomm dt-binding headers that are available upstream

Some dt-binding headers mask the upstream ones which can lead to build
failures, or worse: super weird bugs, if they get out of sync.

Remove these headers so our devicetree and binding headers will both be
in sync with upstream.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agoiommu: qcom-smmu: handle running in el2
Caleb Connolly [Wed, 13 Nov 2024 05:09:24 +0000 (06:09 +0100)]
iommu: qcom-smmu: handle running in el2

We only need to configure the SMMU when running in EL1. In EL2 the
hypervisor isn't running so peripherals can just do DMA as they wish.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agoiommu: qcom-smmu: allow SID 0
Caleb Connolly [Wed, 13 Nov 2024 05:00:56 +0000 (06:00 +0100)]
iommu: qcom-smmu: allow SID 0

It turns out this is a very real stream ID. Who woulda thought?

Drop the 0 check on the SID, there's no reason for it to be there in the first
place.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agoqcom_defconfig: enable capsule update support
Caleb Connolly [Sat, 12 Oct 2024 13:57:20 +0000 (15:57 +0200)]
qcom_defconfig: enable capsule update support

Enable all the necessary options for capsule updates to work, as well as
a few additional EFI features.

Capsule updates themselves are only enabled for the RB3 Gen 2, since the
exact details on where to flash U-Boot (or how to handle multiple boot
methods) has not been finalised for other boards.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agomach-snapdragon: implement capsule update support
Caleb Connolly [Sat, 12 Oct 2024 13:57:19 +0000 (15:57 +0200)]
mach-snapdragon: implement capsule update support

Qualcomm boards flash U-Boot a variety of partitions, implement support
for determining which slot U-Boot is running from, finding the correct
partition for that slot and configuring the appropriate DFU string.

Initially, we only support the RB3 Gen 2 where U-Boot is flashed to the
UEFI partition, and ignore handling of slots. In the future we will
additionally support booting U-Boot from other partitions (e.g. boot)
and correct handling for A/B.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agodisk: expose partition type flags
Caleb Connolly [Sat, 12 Oct 2024 13:57:18 +0000 (15:57 +0200)]
disk: expose partition type flags

GPT partition tables include two bytes worth of vendor defined
attributes, per partition. ChromeOS and Qualcomm both use these (with
different encoding!) to handle A/B slot switching with a retry counter.

Expose these via the disk_partition struct so that they can be parsed by
the relevant board code.

This will be used on Qualcomm boards to determine which slot we're
booting on so that we can flash capsule updates to the correct one.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agodfu: add scsi backend
Caleb Connolly [Sat, 12 Oct 2024 13:57:17 +0000 (15:57 +0200)]
dfu: add scsi backend

This is extremely similar to the MMC backend, but there are some notable
differences.

Works with a DFU string like

    scsi 4=u-boot-bin part 11

Where "4" is the SCSI dev number (sequential LUN across all SCSI devices)
and "11" is the partition number.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agophy: qcom: Add SM8150 to QMP UFS PHY driver
Julius Lehmann [Wed, 2 Oct 2024 18:52:17 +0000 (20:52 +0200)]
phy: qcom: Add SM8150 to QMP UFS PHY driver

Copy PHY tables over from Linux to support SM8150

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
4 weeks agophy: qcom: ufs: add sc7280
Caleb Connolly [Sat, 12 Oct 2024 13:22:05 +0000 (15:22 +0200)]
phy: qcom: ufs: add sc7280

Add configuration for the SC7280, copied from Linux 6.11

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agoqcom_defconfig: enable UFS Qualcomm controller and PHY drivers
Neil Armstrong [Mon, 14 Oct 2024 07:00:26 +0000 (09:00 +0200)]
qcom_defconfig: enable UFS Qualcomm controller and PHY drivers

Now the Qualcomm controller and PHY drivers were accepted,
enable then in the qcom_defconfig file.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agodt-bindings: remove phy/phy-qcom-qmp.h in favor of dts/upstream
Neil Armstrong [Wed, 16 Oct 2024 07:37:20 +0000 (09:37 +0200)]
dt-bindings: remove phy/phy-qcom-qmp.h in favor of dts/upstream

The upstream version has new defines use to build DT, drop
it in favor of the dts/upstream more recent one.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agophy: qcom: ufs: drop unused ufsphy_v2_regs_layout
Neil Armstrong [Wed, 16 Oct 2024 07:43:56 +0000 (09:43 +0200)]
phy: qcom: ufs: drop unused ufsphy_v2_regs_layout

The ufsphy_v2_regs_layout is not used, drop it and fix:
phy-qcom-qmp-ufs.c:87:27: warning: ‘ufsphy_v2_regs_layout’ defined but not used [-Wunused-const-variable=]

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agogpio: qcom_pmic: add again the quirk to skip GPIO configuration on PM8550
Neil Armstrong [Wed, 16 Oct 2024 09:16:18 +0000 (11:16 +0200)]
gpio: qcom_pmic: add again the quirk to skip GPIO configuration on PM8550

The qcom_pmic code is broken for new PMICs and should be fixed,
without the QUIRK the code is broken and the GPIOs don't work
anymore on SM8550 and SM8650 platforms.

Partially revert the revert and only add the quirk on the PM8550
PMIC, making the buttons and MMC detect gpio work again.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agommc: msm_sdhci: enable vqmmc at probe if available
Neil Armstrong [Wed, 16 Oct 2024 09:17:16 +0000 (11:17 +0200)]
mmc: msm_sdhci: enable vqmmc at probe if available

On earlier platforms, the vqmmc regulator was enabled by the
previous bootloader, but on the newest (SM8650) it's not
and we need vqmmc to be enabled in order to have the card
to respond.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agomach-snapdragon: configure logging
Caleb Connolly [Wed, 13 Nov 2024 05:04:17 +0000 (06:04 +0100)]
mach-snapdragon: configure logging

Set LOG_CATEGORY and pr_fmt. Also fix the time.h include.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agoARM: mach-snapdragon: configure a larger default SYS_MALLOC_LEN for fastboot
Neil Armstrong [Wed, 16 Oct 2024 09:25:32 +0000 (11:25 +0200)]
ARM: mach-snapdragon: configure a larger default SYS_MALLOC_LEN for fastboot

Fastboot is very hungry when it flashes larges chunks, and 8MiB
is way too small, allocate a much bigger size like other platforms
using Fastboot.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # rb1
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agoqcom_defconfig: enable PINCONF
Neil Armstrong [Thu, 17 Oct 2024 08:04:54 +0000 (10:04 +0200)]
qcom_defconfig: enable PINCONF

The SM8550 and SM8650 SoCs requires PINCONF to properly
setup SDC pins in order to function correctly.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
4 weeks agoMerge tag 'xilinx-for-v2025.01-rc3-v2' of https://source.denx.de/u-boot/custodians...
Tom Rini [Tue, 19 Nov 2024 18:58:05 +0000 (12:58 -0600)]
Merge tag 'xilinx-for-v2025.01-rc3-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.01-rc3:

- microblaze:
  - Disable JFFS2
- fpga:
  - pass compatible flag to fpga_load()
- zynqmp:
  - SOM RTC fix
  - SC(system controller) PMW polarity fix
  - Fix ram_top calculation with introducing XILINX_MINI
  - Fix RPU release command
- versal:
  - Enable capsule update
  - Enable soft reset and Micron octal flashes
- xilinx:
  - Align Kconfig regarding SPI_STACKED_PARALLEL
- bootcount:
  - Add new zynqmp driver

4 weeks agoxilinx: Introduce XILINX_MINI configuration
Michal Simek [Fri, 15 Nov 2024 14:31:02 +0000 (15:31 +0100)]
xilinx: Introduce XILINX_MINI configuration

There is no common symbol which mini configurations are using and recent
get_mem_top() changes adding 1.3kB without having a way to remove it.
That's why introduce new symbol which can be used for removing features
which are not requested by these configurations.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aa27b72e17057fa8cbdd92a2bbb863a31c8c1226.1731681053.git.michal.simek@amd.com
4 weeks agomicroblaze: Disable JFFS2 support
Michal Simek [Fri, 15 Nov 2024 08:38:55 +0000 (09:38 +0100)]
microblaze: Disable JFFS2 support

JFFS2 is not maintained for quite a long time and none should be using it.
Please use other filesystems for flashes like UBIFS instead.

Also remove jffs to MTD map but MTD map is for example that's why it won't
affect anything.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a8239acee8886229fdbff66142c46d522e3fe851.1731659933.git.michal.simek@amd.com
4 weeks agoarm64: zynqmp: Set default RTC device at start
Michal Simek [Tue, 12 Nov 2024 13:58:48 +0000 (14:58 +0100)]
arm64: zynqmp: Set default RTC device at start

For RTC to start to operate there is a need to call the driver. The simple
way to do it is to set default RTC instance which will call the probe and
do basic initialization.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/01155f1555dbd42adc618906629f5fb45754d5a4.1731419926.git.michal.simek@amd.com
4 weeks agoarm64: versal: Enable soft reset support for xspi flashes
Venkatesh Yadav Abbarapu [Thu, 14 Nov 2024 04:26:41 +0000 (09:56 +0530)]
arm64: versal: Enable soft reset support for xspi flashes

Activate the xSPI Software Reset support, which will be
utilized to transition from octal DTR mode to legacy
mode during shutdown and boot (if enabled).

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114042641.22642-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 weeks agoarm64: versal: Enable defconfig for Micron octal flashes
Venkatesh Yadav Abbarapu [Thu, 14 Nov 2024 05:10:47 +0000 (10:40 +0530)]
arm64: versal: Enable defconfig for Micron octal flashes

The Micron MT35 series octal flashes can be activated
through the configuration option CONFIG_SPI_FLASH_MT35XU.
To ensure their detection, enable this option in the
default defconfig for octal flashes.

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114051047.13700-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 weeks agospi: cadence_qspi: Fix OSPI boot issue
Venkatesh Yadav Abbarapu [Thu, 14 Nov 2024 06:20:45 +0000 (11:50 +0530)]
spi: cadence_qspi: Fix OSPI boot issue

Moving the hw_reset function from the controller driver to
the NOR framework has caused the OSPI reset not to be triggered
in the Cadence driver's probe function. As a result, reading the
flash ID during SPI calibration is incorrect, and the
CQSPI_REG_RD_DATA_CAPTURE is set with an invalid value.This makes
it unable to read the flash ID properly.
To solve this problem, it's suggested to skip SPI calibration and
instead retrieve the read_delay directly from the device tree.

Skipping SPI calibration doesn't bring harm since there's no need
for the flash golden values stored during SPI calibration.
Instead, they are now read during the spi_nor_read_id call in the
NOR framework.

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20241114062045.17581-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 weeks agotest: cmd/hash: check return value of ut_check_console_line
Heinrich Schuchardt [Sat, 16 Nov 2024 20:08:22 +0000 (21:08 +0100)]
test: cmd/hash: check return value of ut_check_console_line

ut_check_console_line() does include an assert.
Pass the result to ut_assertok().

Addresses-Coverity-ID:  514958 Error handling issues
Fixes: 7dfafcd65ef3 ("test: unit test for hash command")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 weeks agoKconfig: describe NET, NO_NET, LWIP_DEBUG and LWIP_ASSERT
Jerome Forissier [Tue, 12 Nov 2024 15:44:29 +0000 (16:44 +0100)]
Kconfig: describe NET, NO_NET, LWIP_DEBUG and LWIP_ASSERT

Some Kconfig symbols introduced in commit 8cb330355bd5 ("net: introduce
alternative implementation as net/lwip/") need a full description. The
NET symbol needs one, too.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 weeks agonet: lwip/wget: correct SERVER_NAME_SIZE
Heinrich Schuchardt [Fri, 8 Nov 2024 17:45:26 +0000 (18:45 +0100)]
net: lwip/wget: correct SERVER_NAME_SIZE

The maximum length of a domain name is 253 as defined in RFC 1035.
So SERVER_NAME_SIZE should be 254 including NUL.

Fixes: 3c656c928bd7 ("net: lwip: add wget command")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 weeks agoMerge patch series "Fix boot failure due to misaligned DMA buffer"
Tom Rini [Mon, 18 Nov 2024 14:24:06 +0000 (08:24 -0600)]
Merge patch series "Fix boot failure due to misaligned DMA buffer"

Nam Cao <namcao@linutronix.de> says:

We observed the following sporadic boot failure while booting from MMC
device:

=> boot
CACHE: Misaligned operation at range [9efa25f89efa27f8]
CACHE: Misaligned operation at range [9efa25f89efa27f8]
CACHE: Misaligned operation at range [9efa25f89efa27f8]
CACHE: Misaligned operation at range [9efa25f89efa27f8]
** Booting bootflow 'mmc@2194000.bootdev.part_1' with extlinux
Ignoring unknown command: �D���D��
Boot failed (err=-14)

The reason is because while allocating buffer to read a file from MMC,
alignment of 1 byte is used. Thus, the buffer doesn't work for performing
DMA, and garbage data is read.

While looking at this issue, I also noticed that if no alignment specified
(align=0) then fs_read_alloc() is documented to use the default. But the
default is no alignment. Therefore, other users of fs_read_alloc() which
specify align=0 may be broken as well.

The first patch changes extlinux_read_bootflow() to use proper buffer
alignment for DMA.

The second patch changes the default alignment of fs_read_alloc() to be
DMA-suitable, to fix other potential bugs.

4 weeks agofs: Use ARCH_DMA_MINALIGN as default alignment for fs_read_alloc()
Nam Cao [Thu, 7 Nov 2024 15:01:06 +0000 (16:01 +0100)]
fs: Use ARCH_DMA_MINALIGN as default alignment for fs_read_alloc()

The comment above fs_read_alloc() explains:

    @align: Alignment to use for memory allocation (0 for default)

However, in the actual implementation, there is no alignment when @align is
zero.

This current default is probably fine for most cases. But for some block
devices which transfer data via DMA, ARCH_DMA_MINALIGN is needed.

Change the default alignment to ARCH_DMA_MINALIGN.

Fixes: de7b5a8a1ac0 ("fs: Create functions to load and allocate a file")
Signed-off-by: Nam Cao <namcao@linutronix.de>
Tested-by: Javier Fernandez Pastrana <javier.pastrana@linutronix.de>
4 weeks agoboot: extlinux: Fix unaligned buffer for reading data from file system
Nam Cao [Thu, 7 Nov 2024 15:01:05 +0000 (16:01 +0100)]
boot: extlinux: Fix unaligned buffer for reading data from file system

extlinux_read_bootflow() allocates a buffer to read from file system
without any alignment.

But for some block devices which transfer data via DMA, ARCH_DMA_MINALIGN
alignment is required. For example, due to misaligned buffer, the below
boot failure is observed.

=> boot
CACHE: Misaligned operation at range [9efa25f89efa27f8]
CACHE: Misaligned operation at range [9efa25f89efa27f8]
CACHE: Misaligned operation at range [9efa25f89efa27f8]
CACHE: Misaligned operation at range [9efa25f89efa27f8]
** Booting bootflow 'mmc@2194000.bootdev.part_1' with extlinux
Ignoring unknown command: �D���D��
Boot failed (err=-14)

Change the buffer alignment to ARCH_DMA_MINALIGN.

Fixes: 31aefaf89a5b ("bootstd: Add an implementation of distro boot")
Signed-off-by: Nam Cao <namcao@linutronix.de>
Tested-by: Javier Fernandez Pastrana <javier.pastrana@linutronix.de>
5 weeks agoMerge tag 'tpm-master-16112024' of https://source.denx.de/u-boot/custodians/u-boot-tpm
Tom Rini [Sat, 16 Nov 2024 19:09:18 +0000 (13:09 -0600)]
Merge tag 'tpm-master-16112024' of https://source.denx.de/u-boot/custodians/u-boot-tpm

CI: https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/23393

- Two changes from Heinrich:
  - One is adding some missing TPM files for proper maintenance.
  - The second addresses Coverity-ID: 356664 replacing a mempcy() which
    has undefined behavior with memmove()

5 weeks agoMAINTAINERS: add lib/tpm* to TPM DRIVERS
Heinrich Schuchardt [Sat, 2 Nov 2024 10:25:46 +0000 (11:25 +0100)]
MAINTAINERS: add lib/tpm* to TPM DRIVERS

All TPM code should be maintained.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 weeks agotpm: use memmove() for overlapping buffers
Heinrich Schuchardt [Sat, 2 Nov 2024 10:27:37 +0000 (11:27 +0100)]
tpm: use memmove() for overlapping buffers

The behavior of memcpy() for overlapping buffers is undefined.

Fixes: 4c57ec76b725 ("tpm: Implement state command for Cr50")
Addresses-Coverity-ID: 356664 Overlapping buffer in memory copy
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 weeks agokm: disable CMD_JFFS2 for all PPC boards
Holger Brunck [Thu, 14 Nov 2024 18:06:54 +0000 (19:06 +0100)]
km: disable CMD_JFFS2 for all PPC boards

We don't use this feature, we can remove it therefore in the defconfigs.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
5 weeks agofs: btrfs: hide duplicate 'Cannot lookup file' error on 'load'
Dominique Martinet [Fri, 15 Nov 2024 02:15:47 +0000 (11:15 +0900)]
fs: btrfs: hide duplicate 'Cannot lookup file' error on 'load'

Running commands such as 'load mmc 2:1 $addr $path' when path does not
exists will print an error twice if the file does not exist, e.g.:
```
Cannot lookup file boot/boot.scr
Failed to load 'boot/boot.scr'
```
(where the first line is printed by btrfs and the second by common fs
code)

Historically other filesystems such as ext4 or fat have not been
printing a message here, so do the same here to avoid duplicate.

The other error messages in this function are also somewhat redundant,
but bring useful diagnostics if they happen somewhere, so have been left
as printf.

Note that if a user wants no message to be printed for optional file
loads, they have to check for file existence first with other commands
such as 'size'.

Signed-off-by: Dominique Martinet <dominique.martinet@atmark-techno.com>
Reviewed-by: Qu Wenruo <wqu@suse.com>
5 weeks agotest/py: spi: Rephrase the warning/error messages
Love Kumar [Fri, 15 Nov 2024 13:08:00 +0000 (18:38 +0530)]
test/py: spi: Rephrase the warning/error messages

Rephrasing the error and warning messages to be more meaningful and
clear.

Signed-off-by: Love Kumar <love.kumar@amd.com>
5 weeks agoMerge tag 'u-boot-imx-master-20241115' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Fri, 15 Nov 2024 19:10:36 +0000 (13:10 -0600)]
Merge tag 'u-boot-imx-master-20241115' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/23373

- Fix a missing break for CMD_DCD_SKIP reported by Coverty on imx8image.
- Fix i.MX thermal threshold regression.

5 weeks agoimx: Fix critical thermal threshold
Francesco Dolcini [Tue, 12 Nov 2024 17:54:27 +0000 (18:54 +0100)]
imx: Fix critical thermal threshold

Fix the critical thermal threshold for i.MX processors, this was changed
while moving the code from imx8m/imx9 directories into a shared place.

There is no need to keep the critical threshold 5 degrees less than the
SoC maximum temperature threshold, what is actually going to happen in
practice is that we are going to power-off the board when the SoC is
still within its working temperature range.

In addition to that this is a change in the actual behavior, that is
introducing a regression to users, and it was hidden within a software
refactoring.

Fixes: d0fe80890ab1 ("imx: Generalize fixup_thermal_trips")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
5 weeks agotools: imx8image: Add missing break for CMD_DCD_SKIP
Fabio Estevam [Tue, 12 Nov 2024 02:38:54 +0000 (23:38 -0300)]
tools: imx8image: Add missing break for CMD_DCD_SKIP

The CMD_DCD_SKIP case misses a break statement.

Add it.

Fixes: 254c00803b63 ("tools: imx8image: add possibility to skip dcd")
Addresses-Coverity-ID: 514648: Control flow issues (MISSING_BREAK)
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
5 weeks agodrivers: bootcount: Add ZynqMP specific bootcount support
Vasileios Amoiridis [Tue, 5 Nov 2024 13:27:44 +0000 (14:27 +0100)]
drivers: bootcount: Add ZynqMP specific bootcount support

Add native support of the bootcount mechanism in the ZynqMP by
utilising internal PMU registers. The Persistent Global Storage
Registers of the Platform Management Unit can keep their value
during reboot cycles unless there is a POR reset, making them
appropriate for the bootcount mechanism.

Signed-off-by: Vasileios Amoiridis <vasileios.amoiridis@cern.ch>
Reviewed-by: Heiko Schocher <hs@denx.de>
Link: https://lore.kernel.org/r/20241105132744.1572759-2-vassilisamir@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
5 weeks agoboot/image-board.c: boot_get_fpga(): pass compatible flag to fpga_load()
Peter Korsgaard [Tue, 5 Nov 2024 16:21:36 +0000 (17:21 +0100)]
boot/image-board.c: boot_get_fpga(): pass compatible flag to fpga_load()

For E.G. signed FPGA bitstreams, similar to how it is done for the FPGA
loading from SPL since commit 71f1a5392aad ("spl: fit: pass real compatible
flags to fpga_load()").

Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Link: https://lore.kernel.org/r/20241105162136.839633-1-peter@korsgaard.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
5 weeks agoarm64: versal: Enable capsule update (SD)
Michal Simek [Fri, 25 Oct 2024 11:56:08 +0000 (13:56 +0200)]
arm64: versal: Enable capsule update (SD)

Enable capsule update in SD boot mode. For getting it work there is a need
to generate or setup dfu_alt_info and enable sysreset with DFU_MMC.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/cede513de764b99560dc3737457dbc8a5cc71d21.1729857366.git.michal.simek@amd.com
5 weeks agoarm64: versal: Do not define do_reset() if sysreset is enabled
Michal Simek [Fri, 25 Oct 2024 11:56:07 +0000 (13:56 +0200)]
arm64: versal: Do not define do_reset() if sysreset is enabled

If sysreset is enabled reset_cpu is defined in sysreset uclass that's why
it can't be in platform/board code.
The same change was done by commit f1bc214b0024 ("arm64: zynqmp: Do not
define do_reset() if sysreset is enabled").

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8c1a5d6148c5e6c46790b725e8148a4e12d393ba.1729857366.git.michal.simek@amd.com
5 weeks agoarm64: zynqmp: Fix r5 mode for cpu release command
Padmarao Begari [Mon, 4 Nov 2024 12:27:50 +0000 (17:57 +0530)]
arm64: zynqmp: Fix r5 mode for cpu release command

The cpu release command for r5 mode (lockstep/split) argument
accepts only string. But the zynqmp tcminit command accepts
string or number for r5 mode (lockstep/split or 0/1) argument.
To fix the r5 mode argument, the common argument (lockstep/split
or 0/1) is used across different u-boot commands. Use the strcmp()
instead of strncmp() to make uniform the r5 mode (lockstep/split
or 0/1) for the zynqmp tcminit and cpu release command.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Link: https://lore.kernel.org/r/20241104122750.96251-1-padmarao.begari@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
5 weeks agoarm64: xilinx: Rename SPI_ADVANCE to SPI_STACKED_PARALLEL
Michal Simek [Fri, 1 Nov 2024 08:37:23 +0000 (09:37 +0100)]
arm64: xilinx: Rename SPI_ADVANCE to SPI_STACKED_PARALLEL

Align defconfigs with the latest Kconfig layout.

Fixes: f896aa656774 ("mtd: spi-nor: Rename SPI_ADVANCE to SPI_STACKED_PARALLEL")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fe05a0e542d6117c10956e4a104123e46f956793.1730450241.git.michal.simek@amd.com
5 weeks agoxilinx: use get_mem_top() to compute ram_top
Sughosh Ganu [Fri, 25 Oct 2024 17:27:24 +0000 (22:57 +0530)]
xilinx: use get_mem_top() to compute ram_top

Use the get_mem_top function to compute the value of ram_top. This was
earlier done through LMB API's, which are no longer available till
after relocation. Use get_mem_top() instead to compute the ram_top
value.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20241025172724.195093-3-sughosh.ganu@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
5 weeks agocommon: memtop: add logic to detect ram_top
Sughosh Ganu [Fri, 25 Oct 2024 17:27:23 +0000 (22:57 +0530)]
common: memtop: add logic to detect ram_top

Add generic logic to determine the ram_top value for boards. Earlier,
this was achieved in an indirect manner through a set of LMB API's.
That has since changed so that the LMB code is available only after
relocation. Replace those LMB calls with a single call to
get_mem_top() to determine the value of ram_top.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20241025172724.195093-2-sughosh.ganu@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
5 weeks ago.gitignore: add test overlay .S and u_boot_logo files
Christian Marangi [Sat, 9 Nov 2024 17:48:44 +0000 (18:48 +0100)]
.gitignore: add test overlay .S and u_boot_logo files

Add test overlay .S and u_boot_logo file to gitignore as these files are
generated and should not be committed but ignored.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
5 weeks agolmb.c: add missing comma in lmb_dump_region()
Heinrich Schuchardt [Thu, 7 Nov 2024 10:14:42 +0000 (11:14 +0100)]
lmb.c: add missing comma in lmb_dump_region()

In the message string " %s[%d]\t[0x%llx-0x%llx], 0x%08llx bytes flags: "
a comma is missing before flags.

To avoid increasing the code size replace '0x%' by '%#'.

Printing the size with leading zeros but not the addresses does not really
make sense. Remove the leading zeros from the size output.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
[trini: Fix test/cmd/bdinfo.c for these changes]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 weeks agotest: use %zd for size_t in mbr_test_run()
Heinrich Schuchardt [Sun, 3 Nov 2024 22:48:11 +0000 (23:48 +0100)]
test: use %zd for size_t in mbr_test_run()

For printing size_t we must use %zd and not %ld to avoid
a -Wformat error on 32-bit systems.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
5 weeks agotest: print_printf() must check availability of %ls
Heinrich Schuchardt [Sun, 3 Nov 2024 20:46:42 +0000 (21:46 +0100)]
test: print_printf() must check availability of %ls

Availability of %ls in printf() depends on having
CONFIG_EFI_LOADER or CONFIG_EFI_APP.

Respect this when testing.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 weeks agotest: cmd/mbr: pass correct buffer size to init_write_buffers
Heinrich Schuchardt [Sat, 2 Nov 2024 15:41:30 +0000 (16:41 +0100)]
test: cmd/mbr: pass correct buffer size to init_write_buffers

We want to completely initialize the mbr and embr buffers. This requires
passing the buffer size and not the size of a pointer to the buffer.

Addresses-Coverity-ID: 510454 Wrong sizeof argument
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
5 weeks agoupl: fix parsing of DT property
Heinrich Schuchardt [Sat, 2 Nov 2024 15:04:13 +0000 (16:04 +0100)]
upl: fix parsing of DT property

When calling decode_addr_size() we must pass the size of the device-tree
property and not sizeof(void *).

Fixes: 90469da3da0d ("upl: Add support for reading a upl handoff")
Addresses-Coverity-ID: 510459 Wrong sizeof argument
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
5 weeks agocmd: upl: initialize unit test state
Heinrich Schuchardt [Sat, 2 Nov 2024 14:30:20 +0000 (15:30 +0100)]
cmd: upl: initialize unit test state

do_upl_write() calls upl_get_test_data() which may increment the fail
count in the unit test state. We should initialize it.

Addresses-Coverity-ID: 510465 Uninitialized scalar variable
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 weeks agoxyz-modem: Add missing fallthrough annotation
Heinrich Schuchardt [Sat, 2 Nov 2024 10:41:12 +0000 (11:41 +0100)]
xyz-modem: Add missing fallthrough annotation

Falltroughs in switch statements should be explicit.

Addresses-Coverity-ID: 131162 Missing break in switch
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
5 weeks agolmb: do not panic in lmb_print_region_flags
Heinrich Schuchardt [Sat, 2 Nov 2024 06:32:26 +0000 (07:32 +0100)]
lmb: do not panic in lmb_print_region_flags

Commit c3cf0dc64f1c ("lmb: add a check to prevent memory overrun")
addressed a possible buffer overrun using assert_noisy().

Resetting via panic() in lmb_print_region() while allowing invalid
lmb flags elsewhere is not reasonable.

Instead of panicking print a message indicating the problem.

fls() returns an int. Using a u64 for bitpos does not match.
Use int instead.

fls() takes an int as argument. Using 1ull << bitpos generates a u64.
Use 1u << bitpos instead.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
5 weeks agolib: rsa: Set conventional salt length RSA-PSS parameter
Loic Poulain [Thu, 31 Oct 2024 09:15:31 +0000 (10:15 +0100)]
lib: rsa: Set conventional salt length RSA-PSS parameter

RFC 3447 says that Typical salt length are either 0 or the length
of the output of the digest algorithm, RFC 4055 also recommends
hash value length as the salt length. Moreover, By convention,
most of the signing infrastructures/libraries use the length of
the digest algorithm (such as google cloud kms:
                      https://cloud.google.com/kms/docs/algorithms).

If the salt-length parameter is not set, openssl default to the
maximum allowed value, which is a openssl 'specificity', so this
works well for local signing, but restricts compatibility with
other engines (e.g pkcs11/libkmsp11):

```
returning 0x71 from C_SignInit due to status INVALID_ARGUMENT:
    at rsassa_pss.cc:53: expected salt length for key XX is 32,
    but 478 was supplied in the parameters
Could not obtain signature: error:41000070:PKCS#11 module::Mechanism invalid
```

To improve compatibility, we set the default RSA-PSS salt-length
value to the conventional one. A further improvement could consist
in making it configurable as signature FIT node attribute.

rfc3447: https://datatracker.ietf.org/doc/html/rfc3447
rfc4055: https://datatracker.ietf.org/doc/html/rfc4055

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
5 weeks agolwip: fix code style issues
Jerome Forissier [Thu, 7 Nov 2024 11:27:57 +0000 (12:27 +0100)]
lwip: fix code style issues

Fix various code style issues in the lwIP code.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
5 weeks agoMakefile: fix empty MK_ARCH when using ccache
Quentin Schulz [Mon, 11 Nov 2024 13:20:49 +0000 (14:20 +0100)]
Makefile: fix empty MK_ARCH when using ccache

One can use ccache by prefixing the typical CROSS_COMPILE value with
"ccache " (e.g. "ccache aarch64-gnu-linux-" for Aarch64). This however
makes the MK_ARCH empty because sed won't find a match anymore since it
expects the CROSS_COMPILE value to start with the actual toolchain (with
an unlimited number of white spaces before).

This is failing builds since commit 7506c1566998 ("sandbox: Report host
default-filename in native mode").

Add "ccache" prefix to ignore but participate in the matching regex used
by sed to identify the target architecture.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
5 weeks agoMerge patch series "examples: fix building on arm64"
Tom Rini [Thu, 14 Nov 2024 16:51:13 +0000 (10:51 -0600)]
Merge patch series "examples: fix building on arm64"

Heinrich Schuchardt <heinrich.schuchardt@canonical.com> says:

Commit f9886bc60f42 ("Added arm64 assembly for examples/api crt0") added
the arm64 architecture but the code does not even build.

With the changes the 'demo' program runs on qemu_arm64_defconfig using

    setenv autostart no
    dhcp demo
    setenv autostart yes
    bootelf $loadaddr

Link: https://lore.kernel.org/r/20241103053551.52715-1-heinrich.schuchardt@canonical.com
5 weeks agoexamples: make glue and demo code compatible with 64-bit
Heinrich Schuchardt [Sun, 3 Nov 2024 05:35:51 +0000 (06:35 +0100)]
examples: make glue and demo code compatible with 64-bit

Commit f9886bc60f42 ("Added arm64 assembly for examples/api crt0")
added a 64-bit target for the examples but did not adjust the demo
code to be 64-bit compatible.

Change variable size for pointers.
Use %p to print pointers.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
5 weeks agoexamples: adjust LOAD_ADDR on arm64
Heinrich Schuchardt [Sun, 3 Nov 2024 05:35:50 +0000 (06:35 +0100)]
examples: adjust LOAD_ADDR on arm64

Change the load address on arm64 such that it is compatible with the memory
available on qemu_arm64_defconfig.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
5 weeks agoexamples: fix building on arm64
Heinrich Schuchardt [Sun, 3 Nov 2024 05:35:49 +0000 (06:35 +0100)]
examples: fix building on arm64

Commit f9886bc60f42 ("Added arm64 assembly for examples/api crt0") tried to
add arm64 support to the examples but crt0.S does not even build for
qemu_arm64_defconfig with CONFIG_API=y, CONFIG_EXAMPLES=y:

    examples/api/crt0.S: Assembler messages:
    examples/api/crt0.S:32: Error:
        expected a register at operand 1 -- `ldr ip,=search_hint'
    examples/api/crt0.S:33: Error:
        unexpected register type at operand 1 -- `str sp,[ip]'
    make[2]: *** [scripts/Makefile.build:292: examples/api/crt0.o] Error 1

Do not define _start twice.
Use valid register names.
Move syscall_ptr and search_hint to the data section to avoid an invalid
relocation.

Fixes: f9886bc60f42 ("Added arm64 assembly for examples/api crt0")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
5 weeks agoMerge patch series "cmd: hash: correct parameter count check"
Tom Rini [Thu, 14 Nov 2024 16:49:30 +0000 (10:49 -0600)]
Merge patch series "cmd: hash: correct parameter count check"

Heinrich Schuchardt <heinrich.schuchardt@canonical.com> says:

Since commit 348ea878508d ("cmd: hash: fix param count check") the hash
command cannot be used without the optional variable name parameter if
CONFIG_HASH_VERIFY=y. 'hash sha1 $loadaddr $filesize' returns
CMD_RET_USAGE.

The minimum number of arguments is four no matter if verification is
enabled or not.

Fix the parameter check.

Provide a unit test.

Link: https://lore.kernel.org/r/20241102100836.103005-1-heinrich.schuchardt@canonical.com
5 weeks agoMerge patch series "Apply SoM overlays on phyCORE-AM6xx SoMs"
Tom Rini [Thu, 14 Nov 2024 16:48:07 +0000 (10:48 -0600)]
Merge patch series "Apply SoM overlays on phyCORE-AM6xx SoMs"

Wadim Egorov <w.egorov@phytec.de> says:

Our SoMs are available in multiple configurations, managed via device
tree overlays. To determine the specific variant in use, we read the
EEPROM and apply the appropriate overlays during boot to the device tree
used by the OS.

Apply overlays for phyCORE-AM62x and phyCORE-AM64x SoMs.
Future K3 SoMs will be able to reuse this logic and overlays.

Link: https://lore.kernel.org/r/20241030164815.1763506-1-w.egorov@phytec.de
5 weeks agotest: unit test for hash command
Heinrich Schuchardt [Sat, 2 Nov 2024 10:08:36 +0000 (11:08 +0100)]
test: unit test for hash command

Provide a unit test testing the hash command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
5 weeks agocmd: hash: correct parameter count check
Heinrich Schuchardt [Sat, 2 Nov 2024 10:08:35 +0000 (11:08 +0100)]
cmd: hash: correct parameter count check

Since commit 348ea878508d ("cmd: hash: fix param count check") the hash
command cannot be used without the optional variable name parameter if
CONFIG_HASH_VERIFY=y. 'hash sha1 $loadaddr $filesize' returns
CMD_RET_USAGE.

The minimum number of arguments is four no matter if verification is
enabled or not.

Fixes: 348ea878508d ("cmd: hash: fix param count check")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
5 weeks agoboard: phytec: common: k3: Apply SoM-specific overlays to OS device tree
Wadim Egorov [Wed, 30 Oct 2024 16:48:15 +0000 (17:48 +0100)]
board: phytec: common: k3: Apply SoM-specific overlays to OS device tree

Our SoMs are available in multiple configurations, managed via device
tree overlays. To determine the specific variant in use, we read the
EEPROM and apply the appropriate overlays during boot to the device tree
used by the OS.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Neha Malcom Francis <n-francis@ti.com>
5 weeks agoarm: dts: k3-am642-phycore-som-binman: Add SoM overlays
Wadim Egorov [Wed, 30 Oct 2024 16:48:14 +0000 (17:48 +0100)]
arm: dts: k3-am642-phycore-som-binman: Add SoM overlays

Include SoM dt-overlays that handle variants of our SoMs into
u-boot's FIT image.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
5 weeks agoarm: dts: k3-am625-phycore-som-binman: Add SoM overlays
Wadim Egorov [Wed, 30 Oct 2024 16:48:13 +0000 (17:48 +0100)]
arm: dts: k3-am625-phycore-som-binman: Add SoM overlays

Include SoM dt-overlays that handle variants of our SoMs into
u-boot's FIT image.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
5 weeks agoconfigs: phycore_am64x_a53_defconfig: Enable PHYTEC_SOM_DETECTION
Wadim Egorov [Wed, 30 Oct 2024 16:48:12 +0000 (17:48 +0100)]
configs: phycore_am64x_a53_defconfig: Enable PHYTEC_SOM_DETECTION

Enable CONFIG_PHYTEC_SOM_DETECTION to apply SoM overlays
based on EEPROM configuration.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
5 weeks agoconfigs: phycore_am64x_a53_defconfig: Add SoM overlays to OF_OVERLAY_LIST
Wadim Egorov [Wed, 30 Oct 2024 16:48:11 +0000 (17:48 +0100)]
configs: phycore_am64x_a53_defconfig: Add SoM overlays to OF_OVERLAY_LIST

Include SoM dt-overlays for DT control so we can include them
into our u-boot FIT image.
While at it also resync after savedefconfig.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
5 weeks agoconfigs: phycore_am62x_a53_defconfig: Add SoM overlays to OF_OVERLAY_LIST
Wadim Egorov [Wed, 30 Oct 2024 16:48:10 +0000 (17:48 +0100)]
configs: phycore_am62x_a53_defconfig: Add SoM overlays to OF_OVERLAY_LIST

Include SoM dt-overlays for DT control so we can include them
into our u-boot FIT image.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
5 weeks agoMerge patch series "labgrid: Provide an integration with Labgrid"
Tom Rini [Wed, 13 Nov 2024 18:05:00 +0000 (12:05 -0600)]
Merge patch series "labgrid: Provide an integration with Labgrid"

Simon Glass <sjg@chromium.org> says:

Labgrid provides access to a hardware lab in an automated way. It is
possible to boot U-Boot on boards in the lab without physically touching
them. It relies on relays, USB UARTs and SD muxes, among other things.

By way of background, about 4 years ago I wrong a thing called Labman[1]
which allowed my lab of about 30 devices to be operated remotely, using
tbot for the console and build integration. While it worked OK and I
used it for many bisects, I didn't take it any further.

It turns out that there was already an existing program, called Labgrid,
which I did not know about at time (thank you Tom for telling me). It is
more rounded than Labman and has a number of advantages:

- does not need udev rules, mostly
- has several existing users who rely on it
- supports multiple machines exporting their devices

It lacks a 'lab check' feature and a few other things, but these can be
remedied.

On and off over the past several weeks I have been experimenting with
Labgrid. I have managed to create an initial U-Boot integration (this
series) by adding various features to Labgrid[2] and the U-Boot test
hooks.

I hope that this might inspire others to set up boards and run tests
automatically, rather than relying on infrequent, manual test. Perhaps
it may even be possible to have a number of labs available.

Included in the integration are a number of simple scripts which make it
easy to connect to boards and run tests:

ub-int <target>
    Build and boot on a target, starting an interactive session

ub-cli <target>
    Build and boot on a target, ensure U-Boot starts and provide an interactive
    session from there

ub-smoke <target>
    Smoke test U-Boot to check that it boots to a prompt on a target

ub-bisect <target>
    Bisect a git tree to locate a failure on a particular target

ub-pyt <target> <testspec>
    Run U-Boot pytests on a target

Some of these help to provide the same tbot[4] workflow which I have
relied on for several years, albeit much simpler versions.

The goal here is to create some sort of script which can collect
patches from the mailing list, apply them and test them on a selection
of boards. I suspect that script already exists, so please let me know
what you suggest.

I hope you find this interesting and take a look!

[1] https://github.com/sjg20/u-boot/tree/lab6a
[2] https://github.com/labgrid-project/labgrid/pull/1411
[3] https://github.com/sjg20/uboot-test-hooks/tree/labgrid
[4] https://tbot.tools/index.html

Link: https://lore.kernel.org/r/20241112141326.643128-1-sjg@chromium.org
[trini: Move the sjg-lab job to prior to world build, to fix pipeline
        status]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 weeks agoMerge patch series "test: Tidy up the test/ directory"
Tom Rini [Wed, 13 Nov 2024 17:59:07 +0000 (11:59 -0600)]
Merge patch series "test: Tidy up the test/ directory"

Simon Glass <sjg@chromium.org> says:

Some tests do not use the unit-test framework. Others are in a suite of
their own, for no obvious reason.

This series tidies this up.

Link: https://lore.kernel.org/r/20241102193715.432529-1-sjg@chromium.org
5 weeks agosandbox: Add a build without CMDLINE
Simon Glass [Sat, 2 Nov 2024 19:36:11 +0000 (13:36 -0600)]
sandbox: Add a build without CMDLINE

Sometimes this breaks, so add a build to keep it working. Since sandbox
enables a lot of options, it is a good board to use. The new config is
created simply by copying the existing sandbox and turning off CMDLINE

Once we have tests for non-CMDLINE operation, this can be adjusted to
run those tests.

Create a new build which will be picked up by CI. Update the maintainer
entry as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 weeks agoCI: Allow running tests on sjg lab
Simon Glass [Tue, 12 Nov 2024 14:13:26 +0000 (07:13 -0700)]
CI: Allow running tests on sjg lab

Add a way to run tests on a real hardware lab. This is in the very early
experimental stages. There are only 23 boards and 3 of those are broken!
(bob, ff3399, samus). A fourth fails due to problems with the TPM tests.

To try this, assuming you have gitlab access, set SJG_LAB=1, e.g.:

   git push -o ci.variable="SJG_LAB=1" dm HEAD:try

This relies on the two previous series targeted at -next as well as the
bugfix series for -master

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
5 weeks agotest: Correct regex string in test_spi
Simon Glass [Tue, 12 Nov 2024 14:13:25 +0000 (07:13 -0700)]
test: Correct regex string in test_spi

Use an 'r' string to avoid a warning:

  test/py/tests/test_spi.py:698: DeprecationWarning: invalid escape
     sequence '\s'

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Love Kumar <love.kumar@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 weeks agotest: Support testing with two board-builds
Simon Glass [Tue, 12 Nov 2024 14:13:24 +0000 (07:13 -0700)]
test: Support testing with two board-builds

The Beagleplay board uses an SoC from the TI K3 family. This has both a
Cortex-R core and a Cortex-A core and the R core needs to come up before
the A core. In both cases we have U-Boot SPL then U-Boot proper being
used.

In practice this means we need two entirely separate builds to produce
an image.

Handle this in test.py by adding more parameters.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 weeks agotest: Add a section for closing the connection
Simon Glass [Tue, 12 Nov 2024 14:13:23 +0000 (07:13 -0700)]
test: Add a section for closing the connection

This can take a while and involve multiple steps (e.g. turning the board
back off). Add a section for it and show the output.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 weeks agotest: Try to shut down the lab console gracefully
Simon Glass [Tue, 12 Nov 2024 14:13:22 +0000 (07:13 -0700)]
test: Try to shut down the lab console gracefully

Send the Labgrid quit characters to ask it to exit gracefully. This
typically allows it to power off the board being used. Only do this when
labgrid is being used (detected with an env var).

If that doesn't work, try the less graceful approach.

The normal approach for pytest is to simply kill the child process. This
makes Labgrid exit immediately. Thus it does not get a chance to execute
the 'off' part of strategy (which may power it off) and release the
device.

Without this, every board disconnect leaves the board in a bad state,
requiring separate steps to recover the board, then power it off.

The action is conditional on since USE_LABGRID_SJG being set, so only
affects operation if the Labgrid-sjg integration is being used.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 weeks agotest: Avoid double echo when starting up
Simon Glass [Tue, 12 Nov 2024 14:13:21 +0000 (07:13 -0700)]
test: Avoid double echo when starting up

There is a very annoying bug at present where the terminal echos part
of the first command sent to the board. This happens because the
terminal is still set to echo for a period until Labgrid starts up and
can change this.

Fix this by disabling echo (and other terminal features) as soon as the
spawn happens.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 weeks agotest: Improve handling of sending commands
Simon Glass [Tue, 12 Nov 2024 14:13:20 +0000 (07:13 -0700)]
test: Improve handling of sending commands

We expect commands to be echoed and this should happen quite quickly,
since U-Boot is sitting at the prompt waiting for a command.

Reduce the timeout for this situation. Try to produce a more useful
error message when something goes wrong. Also handle the case where the
connection has gone away since the last command was issued.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 weeks agotest: Introduce lab mode
Simon Glass [Tue, 12 Nov 2024 14:13:19 +0000 (07:13 -0700)]
test: Introduce lab mode

There is quite a bit of code in pytest to try to start up U-Boot on a
board, with timeouts, expects, etc.

This is tedious to maintain and is peripheral to the test system's
purpose. It seems better to put this logic in the lab itself, where is
can provide such support.

With Labgrid we can use the UbootStrategy class to get the board into a
useful state, however it needs to do it. Then it can report to pytest
by writing a suitable string along with the U-Boot version it detected.

Add support for detecting 'lab mode' and simply assume that all is well
in that case. Collect the version string when Labgrid says it is ready.

This is only used with the Labgrid-sjg integration. When Labgrid starts
the UbootStrategy it checks if U_BOOT_SOURCE_DIR is set. If so it emits
a string '{lab mode}' that tells test.py to simply wait for an
indication that the board is ready. All banner-checking is skipped. The
indication comes in the form of another string 'Lab: Board is ready'
which Labgrid sends once the board is sitting at a prompt ready to run
tests. Then test.py emits 'U-Boot is ready' and continues with testing.

Note that Labgrid has the same kind of "check for a string" logic that
is in test.py, except it's not caring about the correct number / order
of banner prints. This checking could be added, however. If something
fails, the complete output is shown, so it is possible to see what went
wrong.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 weeks agotest: Introduce the concept of a role
Simon Glass [Tue, 12 Nov 2024 14:13:18 +0000 (07:13 -0700)]
test: Introduce the concept of a role

In Labgrid there is the concept of a 'role', which is similar to the
U-Boot board ID in U-Boot's pytest subsystem.

The role indicates both the target and information about the U-Boot
build to use. It can also provide any amount of other configuration.
The information is obtained using the 'labgrid-client query' operation.

Using this role, all required configuration for the board is stored
within the Labgrid environment, with pytest simply querying it. This
allows connecting to boards using an interactive console, something that
isn't possible without some kind of mapping. It also means that we don't
need to replicate the pytest functionality in tbot, since Labgrid can
handle the console and kick off builds as needed.

Make use of this in tests, so that only the role is required in gitlab
and other situations. The board type and other things can be queried
as needed.

Use a new 'u-boot-test-getrole' script to obtain the requested
information.

With this it is possible to run lab tests in gitlab with just a single
'ROLE' variable for each board.

Note that, without this feature:
- interactive use of boards with Labgrid-sjg would require repeating the
  id/board in a separate configuration file
- Gitlab yaml file would need to specify both the id and board

This feature is entirely optional, however, with the code gracefully
falling back to using a separate ID and board.

Link: https://tbot.tools
Signed-off-by: Simon Glass <sjg@chromium.org>
5 weeks agotest: Allow connecting to a running board
Simon Glass [Tue, 12 Nov 2024 14:13:17 +0000 (07:13 -0700)]
test: Allow connecting to a running board

Sometimes we know that the board is already running the right software,
so provide an option to allow running of tests directly, without first
resetting the board.

This saves time when re-running a test where only the Python code is
changing.

Note that this feature is open to errors, since the user must know that
the board is in a fit state to execute tests. It is useful for repeated
iteration on a particular test, where it can save quite a bit of time.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 weeks agotest: Release board after tests complete
Simon Glass [Tue, 12 Nov 2024 14:13:16 +0000 (07:13 -0700)]
test: Release board after tests complete

When a board is finished with, the lab may want to power it off, or
perform some other function. Add a new script which is called when tests
are complete.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
5 weeks agotest: Allow signaling that U-Boot is ready
Simon Glass [Tue, 12 Nov 2024 14:13:15 +0000 (07:13 -0700)]
test: Allow signaling that U-Boot is ready

When Labgrid is used, it can get U-Boot ready for running tests. It
prints a message when it has done so.

Add logic to detect this message and accept it.

Note that this does not change pytest, which still (also) looks for the
U-Boot banner. This change merely makes it possible for pytest to
believe Labgrid when it says that the board is ready for use.

In several cases, the board starts up and Labgrid receives some initial
output, then pytest starts and misses some of that output, because it
came in while Labgrid had the console open. Then pytest fails because
it doesn't see the expected banners.

With this change, Labgrid handles getting U-Boot to a prompt, in a
fully reliable manner. Then pytest starts up and can simply start
running its tests.

But, again, this does not prevent pytest from handling a banner if one
is provided (e.g. if not using the Labgrid integration).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 weeks agotest: Quote test names
Simon Glass [Sat, 2 Nov 2024 19:37:05 +0000 (13:37 -0600)]
test: Quote test names

When mentioning a test name, add single quotes to make it easier to see.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> # rpi_3, rpi_4, rpi_arm64, am64x_evm_a53, am64-sk
5 weeks agotest: Correct display of failing test
Simon Glass [Sat, 2 Nov 2024 19:37:04 +0000 (13:37 -0600)]
test: Correct display of failing test

This should show the test name, not the selected name, since the user
may be running all tests, in which case 'select_name' is NULL

Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> # rpi_3, rpi_4, rpi_arm64, am64x_evm_a53, am64-sk
5 weeks agotest: Update time tests to use unit-test asserts
Simon Glass [Sat, 2 Nov 2024 19:37:03 +0000 (13:37 -0600)]
test: Update time tests to use unit-test asserts

Rather than returning various error codes, use assertions to check that
the test passes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> # rpi_3, rpi_4, rpi_arm64, am64x_evm_a53, am64-sk
5 weeks agotest: Move time tests into the lib suite
Simon Glass [Sat, 2 Nov 2024 19:37:02 +0000 (13:37 -0600)]
test: Move time tests into the lib suite

There is no particular need for the time tests to have their own test
command. Move them into the lib suite instead.

Update the test functions to match the normal unit-test signature.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> # rpi_3, rpi_4, rpi_arm64, am64x_evm_a53, am64-sk
5 weeks agotest: Move time_ut test into lib
Simon Glass [Sat, 2 Nov 2024 19:37:01 +0000 (13:37 -0600)]
test: Move time_ut test into lib

This test doesn't belong at the top level. Move it into the lib/
directory, to match its implementation. Rename it to drop the
unnecessary _ut suffix.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com> # rpi_3, rpi_4, rpi_arm64, am64x_evm_a53, am64-sk
5 weeks agotest: Move unicode tests into the lib suite
Simon Glass [Sat, 2 Nov 2024 19:37:00 +0000 (13:37 -0600)]
test: Move unicode tests into the lib suite

There is no particular need for the unicode tests to have their own test
suite. Move them into the lib suite instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tom Rini <trini@konsulko.com> # rpi_3, rpi_4, rpi_arm64, am64x_evm_a53, am64-sk