Martin Krause [Wed, 24 Oct 2007 06:42:25 +0000 (08:42 +0200)]
TQM5200: fix spurious characters on second serial interface
With this patch PSC3 is configured as UART. This is done, because if
the pins of PSC3 are not configured at all (-> all pins are GPI),
due to crosstalk, spurious characters may be send over the RX232_2_TXD
signal line.
Signed-off-by: Martin Krause <martin.krause@tqs.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Martin Krause [Wed, 24 Oct 2007 06:41:27 +0000 (08:41 +0200)]
TQM5200S: fix commands for STK52xx base board because of missing SM501 grafic controller
Some commands for the STK52xx base board try to access the SM501 grafic
controller. But the TQM5200S has no grafic controller (only the TQM5200
and the TQM5200B have). This patch deactivates the commands accessing
the SM501 for the TQM5200S.
Signed-off-by: Martin Krause <martin.krause@tqs.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Now we load $gp with _GLOBAL_OFFSET_TABLE_, but this is incorrect use.
As a general principle, we should use _gp for $gp.
Thanks to linker script's help we fortunately have _gp which equals to
_GLOBAL_OFFSET_TABLE_. But once _gp gets out of alignment, we will not
be able to access to GOT entires, global variables and procedure entry
points. The right thing to do is to use _gp.
This patch also introduce a new symbol `.gpword _GLOBAL_OFFSET_TABLE_'
which holds the offset from _gp. When updating GOT entries, we use this
offset and _gp to calculate the final _GLOBAL_OFFSET_TABLE_.
This patch is originally submitted by Vlad Lungu <vlad@comsys.ro>, then
I made some change to leave over num_got_entries.
Dan Wilson [Fri, 19 Oct 2007 16:33:48 +0000 (11:33 -0500)]
tsec driver should clear RHALT on startup
This was causing problems for some people.
Signed-off-by: Alain Gravel <agravel@fulcrummicro.com> Signed-off-by: Dan Wilson <dwilson@fulcrummicro.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Kumar Gala [Thu, 11 Oct 2007 05:29:18 +0000 (00:29 -0500)]
Improve handling of PCI interrupt device tree fixup on MPC85xx CDS
On the MPC85xx CDS we have two issues:
1. The device tree fixup code did not check to see if the property we are
trying to update is actually found. Its possible that it would update
random memory starting at 0.
2. Newer Linux kernel's have moved the location of the PCI nodes to be
sibilings of the soc node and not children. The explicit PATH to the PCI
node would not be found for these device trees. Add the ability to handle
both paths. In the future we shouldn't handle such fixups by explicit path.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 11 Oct 2007 05:18:48 +0000 (00:18 -0500)]
Set OF_STDOUT_PATH to match the default console on MPC8568 MDS
On the MPC8568 MDS we use ttyS0, UART0, etc. as the standard configured
console. Make it so we match that config what we tell Linux as the early
STDOUT console.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Jon Loeliger [Mon, 27 Aug 2007 17:41:03 +0000 (12:41 -0500)]
86xx: Allow for fewer DDR slots per memory controller.
As a direct correlation exists between DDR DIMM slots
and SPD EEPROM addresses used to configure them, use
the individually defined SPD_EEPROM_ADDRESS* values to
determine if a DDR DIMM slot should have its SPD
configuration read or not.
Effectively, this now allows for 1 or 2 DIMM slots
per memory controller.
Rodolfo Giometti [Mon, 15 Oct 2007 09:59:17 +0000 (11:59 +0200)]
PXA USB OHCI: "usb stop" implementation.
Some USB keys need to be switched off before loading the kernel
otherwise they can remain in an undefined status which prevents them
to be correctly recognized by the kernel.
Stefan Roese [Mon, 15 Oct 2007 09:39:00 +0000 (11:39 +0200)]
ppc4xx: Fix bug in I2C bootstrap values for Sequoia/Rainier
The I2C bootstrap values that can be setup via the "bootstrap" command,
were setup incorrect regarding the generation of the internal sync PCI
clock. The values for PLB clock == 133MHz were slighly incorrect and the
values for PLB clock == 166MHz were totally incorrect. This could
lead to a hangup upon booting while PCI configuration scan.
This patch fixes this issue and configures valid PCI divisor values
for the sync PCI clock, with respect to the provided external async
PCI frequency.
Here the values of the formula in the chapter 14.2 "PCI clocking"
from the 440EPx users manual:
The BCSR status bit for the 66MHz PCI operation was correctly
addressed (MSB/LSB problem). Now the correct currently setup
PCI frequency is displayed upon bootup.
This patch also fixes this problem on Rainier & Yellowstone, since these
boards use the same souce code as Sequoia & Yosemite do.
Martin Krause [Thu, 27 Sep 2007 12:54:36 +0000 (14:54 +0200)]
TQM866M: fix SDRAM refresh
At 133 MHz the current SDRAM refresh rate is too fast
(measured 4 * 1.17 us).
CFG_MAMR_PTA changes from 39 to 97. This result
in a refresh rate of 4 * 7.8 us at the default clock
50 MHz. At 133 MHz the value will be then 4 * 2.9 us.
This is a compromise until a new method is found to
adjust the refresh rate.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
CFG_MEMTEST_START uses weird magic involving gd, which fails to
compile. Use hardcoded values instead (we actually know how much RAM
we have on board.)
Timo Ketola [Mon, 24 Sep 2007 11:50:32 +0000 (14:50 +0300)]
Bugfix: Use only one PTD for one endpoint
Original isp116x-hcd code prepared multiple PTDs for longer than 16
byte transfers for one endpoint. That is unnecessary because the
ISP116x is able to split long data from one PTD into multiple
transactions based on the buffer size of the endpoint. It also caused
serious problems if the endpoint NAKed some of the transactions. In
that case ISP116x wouldn't notice that the other PTDs were for the same
endpoint and would try the other PTDs possibly out of order. That would
break the whole transfer.
This patch makes isp116x_submit_job to use one PTD for one transfer.
Signed-off-by: Timo Ketola <timo.ketola@exertus.fi> Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Grant Likely [Tue, 25 Sep 2007 21:48:05 +0000 (15:48 -0600)]
Fpga: fix incorrect test of CFG_FPGA_XILINX macro
CFG_FPGA_XILINX is a bit value used to test against the value in
CONFIG_FPGA. Testing for a value will always return TRUE. I don't
think that is the intention in this code.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Grant Likely [Tue, 18 Sep 2007 18:24:57 +0000 (12:24 -0600)]
Bugfix: remove embedded null (\0) from CFG_BOOTFILE macro in TQM8540_config
/bin/bash and /bin/dash (which /bin/sh is linked to on ubuntu) handle embedded
nulls in a string differently. For example, the following statement:
echo "this is a string\0" > afile
Will produce the following with /bin/bash:
"this is a string\0"
But with /bin/dash, will produce:
"this is a string
Bug fixed by moving the embedded null out of the makefile and into the
config header. Also renamed the macro to avoid usage colision with the same
macro used by other board ports.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Wolfgang Denk [Tue, 18 Sep 2007 15:40:27 +0000 (17:40 +0200)]
MCC200: fix build warning
The MCC200 board config file includes version.h for some customer-
specific setting, which causes warnings with "make depend"; build
version.h before depend.
Updates to atstk1002 U-Boot header file:
- Changed bootargs:
* Set the bootargs for at1002 to point to the SD-card partition instead
* ... of the boot flash.
* Removing the rootfstype since that argument are not needed.
This patch applies some clarifying comments to how the different
clocks are setup according to atstk1002.h Some of the previous
comments where stating wrongful information.
projects / u-boot.git / log