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3 years agoboard: atmel: sama7g5ek: clean-up header bootcommand
Eugen Hristev [Thu, 30 Jul 2020 13:21:46 +0000 (16:21 +0300)]
board: atmel: sama7g5ek: clean-up header bootcommand

Clean-up boot command to use the predefined device and part for FAT
environment.
According to this device and partition, select the proper boot media.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
3 years agoARM: dts: at91: sama7g5ek: enable sdmmc0 with pinctrl
Eugen Hristev [Thu, 30 Jul 2020 12:52:51 +0000 (15:52 +0300)]
ARM: dts: at91: sama7g5ek: enable sdmmc0 with pinctrl

Enable sdmmc0 on this board. A non-removable eMMC is connected on this
block.
Configure pincontrol accordingly.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
3 years agoARM: dts: at91: sama7g5: add node for sdmmc0
Eugen Hristev [Thu, 30 Jul 2020 12:52:13 +0000 (15:52 +0300)]
ARM: dts: at91: sama7g5: add node for sdmmc0

Add node for sdmmc0 block.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
3 years agoARM: dts: at91: sama7g5: add assigned clocks for sdmmc1
Eugen Hristev [Thu, 30 Jul 2020 12:50:59 +0000 (15:50 +0300)]
ARM: dts: at91: sama7g5: add assigned clocks for sdmmc1

SDMMC1 requires clock specification with assigned-clocks, such that
the PMC will know which parent to assign and the initial start-up frequency.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
3 years agoconfigs: sama7g5ek: enable CCF
Claudiu Beznea [Tue, 2 Jun 2020 12:15:55 +0000 (15:15 +0300)]
configs: sama7g5ek: enable CCF

Enable CCF for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoconfigs: sama7g5ek: enable support for KSZ9131
Claudiu Beznea [Tue, 9 Jun 2020 10:48:26 +0000 (13:48 +0300)]
configs: sama7g5ek: enable support for KSZ9131

Enable support for KSZ9131.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoboard: atmel: sama7g5ek: increase arp timeout and retry count
Claudiu Beznea [Tue, 9 Jun 2020 10:58:21 +0000 (13:58 +0300)]
board: atmel: sama7g5ek: increase arp timeout and retry count

Increase ARP timeout and retry count as this will increase
the speed of communication.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: sama7g5: add GMAC1
Claudiu Beznea [Tue, 9 Jun 2020 10:53:45 +0000 (13:53 +0300)]
ARM: dts: sama7g5: add GMAC1

Add GMAC1.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: sama7g5: add GMAC0
Claudiu Beznea [Tue, 9 Jun 2020 10:53:00 +0000 (13:53 +0300)]
ARM: dts: sama7g5: add GMAC0

Add GMAC0.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoconfigs: sama7g5ek: enable mii command
Claudiu Beznea [Tue, 9 Jun 2020 10:49:12 +0000 (13:49 +0300)]
configs: sama7g5ek: enable mii command

Enable mii command as ethernet's PHY specific programming is
based on it.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: at91: sama7g5ek: add pinctrl for sdmmc1 and flx3
Eugen Hristev [Thu, 4 Jun 2020 07:38:49 +0000 (10:38 +0300)]
ARM: dts: at91: sama7g5ek: add pinctrl for sdmmc1 and flx3

Add pinctrl for sdmmc1 and flx3.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
3 years agoARM: dts: at91: sama7g5: add pinctrl node
Eugen Hristev [Thu, 4 Jun 2020 07:37:13 +0000 (10:37 +0300)]
ARM: dts: at91: sama7g5: add pinctrl node

Add pioA pinctrl node.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
3 years agoARM: dts: sama7g5: add pit64b support
Claudiu Beznea [Tue, 2 Jun 2020 15:42:18 +0000 (18:42 +0300)]
ARM: dts: sama7g5: add pit64b support

Add DT bindings for PIT64B driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: sama7g5: enable autoboot
Claudiu Beznea [Tue, 2 Jun 2020 15:43:20 +0000 (18:43 +0300)]
ARM: dts: sama7g5: enable autoboot

Enable autoboot.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoconfigs: sama7g5: use PIT64B
Claudiu Beznea [Tue, 2 Jun 2020 15:42:59 +0000 (18:42 +0300)]
configs: sama7g5: use PIT64B

Use PIT64B driver. ATMEL_PIT is not available for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: sama7g5: add CPU bindings
Claudiu Beznea [Tue, 2 Jun 2020 12:35:55 +0000 (15:35 +0300)]
ARM: dts: sama7g5: add CPU bindings

Add CPU DT bindings.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoconfigs: sama7g5: enable CONFIG_CPU
Claudiu Beznea [Tue, 2 Jun 2020 12:35:12 +0000 (15:35 +0300)]
configs: sama7g5: enable CONFIG_CPU

Enable CONFIG_CPU.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: sama7g5: switch to PMC bindings
Claudiu Beznea [Tue, 2 Jun 2020 12:26:12 +0000 (15:26 +0300)]
ARM: dts: sama7g5: switch to PMC bindings

Get rid of software defined MCK and switch to PMC bindings
for IPs currently present in device tree.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: sama7g5: add PMC bindings
Claudiu Beznea [Tue, 2 Jun 2020 12:24:25 +0000 (15:24 +0300)]
ARM: dts: sama7g5: add PMC bindings

Add DT bindings for PMC driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: sama7g5: add slow clock bindings
Claudiu Beznea [Tue, 2 Jun 2020 12:23:49 +0000 (15:23 +0300)]
ARM: dts: sama7g5: add slow clock bindings

Add DT bindings for slow clock driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: sama7g5: add u-boot,dm-pre-reloc bindings for xtals
Claudiu Beznea [Tue, 2 Jun 2020 12:23:02 +0000 (15:23 +0300)]
ARM: dts: sama7g5: add u-boot,dm-pre-reloc bindings for xtals

Add dm-pre-reloc DT binding property for cristals.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: sama7g5: add slow rc and main rc oscillators
Claudiu Beznea [Tue, 2 Jun 2020 12:22:21 +0000 (15:22 +0300)]
ARM: dts: sama7g5: add slow rc and main rc oscillators

Add slow rc and main rc oscillators to dtsi.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoARM: dts: sama7g5: move clock frequencies for xtals in board file
Claudiu Beznea [Tue, 2 Jun 2020 12:19:19 +0000 (15:19 +0300)]
ARM: dts: sama7g5: move clock frequencies for xtals in board file

Move clock frequencies for crystals on board specific files.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoconfigs: sama7g5ek: enable pll driver
Claudiu Beznea [Tue, 2 Jun 2020 12:15:25 +0000 (15:15 +0300)]
configs: sama7g5ek: enable pll driver

Enable PLL driver for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoconfigs: sama7g5ek: set malloc pool to 68K
Claudiu Beznea [Tue, 2 Jun 2020 12:14:14 +0000 (15:14 +0300)]
configs: sama7g5ek: set malloc pool to 68K

Set malloc pool to 68K for sama7g5ek.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoboard: atmel: sama7g5ek: add SYS_MALLOC_F_LEN to SYS_INIT_SP_ADDR
Claudiu Beznea [Tue, 2 Jun 2020 07:32:08 +0000 (10:32 +0300)]
board: atmel: sama7g5ek: add SYS_MALLOC_F_LEN to SYS_INIT_SP_ADDR

Heap base address is computed based on SYS_INIT_SP_ADDR by
subtracting the SYS_MALLOC_F_LEN value in
board_init_f_init_reserve().

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoboard: atmel: sama7g5ek: add initial support for sama7g5ek
Eugen Hristev [Tue, 10 Mar 2020 09:56:38 +0000 (11:56 +0200)]
board: atmel: sama7g5ek: add initial support for sama7g5ek

Add initial support for sama7g5 evaluation kit board.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
3 years agoARM: dts: sama7g5: add initial DT for sama7g5 SoC
Eugen Hristev [Tue, 10 Mar 2020 09:56:03 +0000 (11:56 +0200)]
ARM: dts: sama7g5: add initial DT for sama7g5 SoC

Add initial basic devicetree for sama7g5 SoC

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
3 years agoarm: at91: configs: Enable CONFIG_SYS_NAND_USE_FLASH_BBT on all boards
Nicolas Ferre [Wed, 25 Nov 2020 13:17:48 +0000 (14:17 +0100)]
arm: at91: configs: Enable CONFIG_SYS_NAND_USE_FLASH_BBT on all boards

As highlighted by Stefan in the commit e074d0f79b2e ("arm: at91:
gardena-smart-gateway-at91sam: Enable CONFIG_SYS_NAND_USE_FLASH_BBT")
it's important to use BBT when Linux enables it. We use it for a long
time on all our boards.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Alexander Dahl <ada@thorsis.com>
4 years agoPrepare v2021.01-rc4
Tom Rini [Mon, 21 Dec 2020 20:03:24 +0000 (15:03 -0500)]
Prepare v2021.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoTravis-CI: Drop support
Tom Rini [Wed, 16 Dec 2020 00:06:03 +0000 (19:06 -0500)]
Travis-CI: Drop support

Travis-CI is changing their support for FOSS (understandably) to have a
limited per-month number of build minutes.  Unfortunately for us, the
matrix of jobs we run will exhaust that very quickly.  Remove the yml
file.  Thanks for all the builds, Travis-CI!

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoboard: kontron: sl28: reorder mmc devices
Michael Walle [Sun, 20 Dec 2020 21:35:13 +0000 (22:35 +0100)]
board: kontron: sl28: reorder mmc devices

Since linux commit 2e6cde96873253fd9eb0f20afd8ffd18278cff75 ("arm64:
dts: ls1028a: make the eMMC and SD card controllers use fixed indices")
mmc0 is the eMMC and mmc1 is the SD card. Also swap it in u-boot to
avoid any confusion by the user and to be aligned with linux.

Signed-off-by: Michael Walle <michael@walle.cc>
4 years agoMerge tag 'efi-2021-01-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sun, 20 Dec 2020 19:55:59 +0000 (14:55 -0500)]
Merge tag 'efi-2021-01-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc4

* Provide a tool to create a file with UEFI variables to preseed UEFI
  variable store.
* Make size of UEFI variable store configurable.
* Add man pages for commands 'bootefi' and 'button'.

4 years agoMAINTAINERS: add tools/efivar.py to EFI PAYLOAD
Heinrich Schuchardt [Sun, 20 Dec 2020 10:58:25 +0000 (11:58 +0100)]
MAINTAINERS: add tools/efivar.py to EFI PAYLOAD

tools/efivar.py allows to prepare a file with UEFI variables to preseed
the UEFI variable store.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agotools: add a simple script to generate EFI variables
Paulo Alcantara [Tue, 8 Dec 2020 23:10:48 +0000 (20:10 -0300)]
tools: add a simple script to generate EFI variables

This script generates EFI variables for U-Boot variable store format.

A few examples:

  - Generating secure boot keys

    $ openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_PK/ \
            -keyout PK.key -out PK.crt -nodes -days 365
    $ efisiglist -a -c PK.crt -o foo.esl
    $ tools/efivar.py set -i ubootefi.var -n db -d foo.esl -t file
    $ tools/efivar.py set -i ubootefi.var -n kek -d foo.esl -t file
    $ tools/efivar.py set -i ubootefi.var -n pk -d foo.esl -t file

  - Printing out variables

    $ tools/efivar.py set -i ubootefi.var -n var1 -d foo -t str
    $ tools/efivar.py set -i ubootefi.var -n var2 -d bar -t str
    $ tools/efivar.py print -i ubootefi.var
    var1:
        8be4df61-93ca-11d2-aa0d-00e098032b8c EFI_GLOBAL_VARIABLE_GUID
        NV|BS|RT, DataSize = 0x3
        0000000000: 66 6F 6F                                          foo
    var2:
        8be4df61-93ca-11d2-aa0d-00e098032b8c EFI_GLOBAL_VARIABLE_GUID
        NV|BS|RT, DataSize = 0x3
        0000000000: 62 61 72                                          bar

    - Removing variables

      $ tools/efivar.py del -i ubootefi.var -n var1
      $ tools/efivar.py set -i ubootefi.var -n var1 -a nv,bs -d foo -t str
      $ tools/efivar.py print -i ubootefi.var -n var1
      var1:
          8be4df61-93ca-11d2-aa0d-00e098032b8c EFI_GLOBAL_VARIABLE_GUID
          NV|BS, DataSize = 0x3
          0000000000: 66 6F 6F                                        foo
      $ tools/efivar.py del -i ubootefi.var -n var1
      err: attributes don't match
      $ tools/efivar.py del -i ubootefi.var -n var1 -a nv,bs
      $ tools/efivar.py print -i ubootefi.var -n var1
      err: variable not found

Signed-off-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Correct examples in commit message.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoefi_loader: make variable store size customizable
Heinrich Schuchardt [Sun, 20 Dec 2020 10:05:38 +0000 (11:05 +0100)]
efi_loader: make variable store size customizable

Currently the size of the buffer to keep UEFI variables in memory is fixed
at 16384 bytes. This size has proven to be too small for some use cases.

Make the size of the memory buffer for UEFI variables customizable.

Reported-by: Paulo Alcantara (SUSE) <pc@cjr.nz>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 years agodoc: man-page for bootefi command
Heinrich Schuchardt [Wed, 16 Dec 2020 21:08:38 +0000 (22:08 +0100)]
doc: man-page for bootefi command

Provide a description of the bootefi command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agodoc: button command
Heinrich Schuchardt [Wed, 16 Dec 2020 11:15:49 +0000 (12:15 +0100)]
doc: button command

Provide a description of the 'button' command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoMerge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Fri, 18 Dec 2020 18:06:02 +0000 (13:06 -0500)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi

4 years agoMerge tag 'u-boot-amlogic-20201218' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Fri, 18 Dec 2020 18:05:47 +0000 (13:05 -0500)]
Merge tag 'u-boot-amlogic-20201218' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- fix Odroid-C4 soft-reboot caused by bad setup of SDCard VDD regulator

4 years agoARM: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4
Marek Szyprowski [Fri, 18 Dec 2020 10:43:45 +0000 (11:43 +0100)]
ARM: dts: meson: switch TFLASH_VDD_EN pin to open drain on Odroid-C4

For the proper reboot Odroid-C4 board requires to switch TFLASH_VDD_EN
pin to the high impedance mode, otherwise the board is stuck in the
middle of loading early stages of the bootloader from SD card.

This can be achieved by using the OPEN_DRAIN flag instead if the
ACTIVE_HIGH, what will leave the pin in input to achieve high state (pin
has the pull-up) and solve the issue.

Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agomtd: spi-nor-ids: add Micron MT25QL01G flash
Hongwei Zhang [Mon, 7 Dec 2020 22:40:01 +0000 (17:40 -0500)]
mtd: spi-nor-ids: add Micron MT25QL01G flash

Add Micron MT25QL01G flash, used on AST2600 board.

Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: ca_sflash: Add CAxxxx SPI Flash Controller
Pengpeng Chen [Thu, 30 Jul 2020 19:52:45 +0000 (12:52 -0700)]
spi: ca_sflash: Add CAxxxx SPI Flash Controller

Add SPI Flash controller driver for Cortina Access
CAxxxx SoCs

Signed-off-by: Pengpeng Chen <pengpeng.chen@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Vignesh R <vigneshr@ti.com>
CC: Tom Rini <trini@konsulko.com>
[jagan: rebase on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agoriscv: Add device tree bindings for SPI
Sean Anderson [Fri, 16 Oct 2020 22:57:54 +0000 (18:57 -0400)]
riscv: Add device tree bindings for SPI

This patch adds bindings for the MMC slot and SPI flash on the Sipeed Maix
Bit.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Rick Chen <rick@andestech.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Add mem_ops
Sean Anderson [Fri, 16 Oct 2020 22:57:53 +0000 (18:57 -0400)]
spi: dw: Add mem_ops

The designware ssi device has "broken" chip select behaviour [1], and needs
specific manipulation to use the built-in chip select. The existing fix is
to use an external GPIO for chip select, but typically the K210 has SPI3
directly connected to a flash chip with dedicated pins. This makes it
impossible to use the spi_xfer function to use spi, since the CS is
de-asserted in between calls.  This patch adds an implementation of
exec_op, which gives correct behaviour when reading/writing spi flash.

This patch also rearranges the headers to conform to U-Boot style.

[1] https://lkml.org/lkml/2015/12/23/132

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Document devicetree binding
Sean Anderson [Fri, 16 Oct 2020 22:57:52 +0000 (18:57 -0400)]
spi: dw: Document devicetree binding

This documentation has been taken from Linux commit 3d7db0f11c7a ("spi: dw:
Refactor mid_spi_dma_setup() to separate DMA and IRQ config"), immediately
before the file was deleted and replaced with a yaml version. Additional
compatible strings from newer versions have been added, as well as a few
U-Boot-specific ones.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Add support for multiple CTRLR0 layouts
Sean Anderson [Fri, 16 Oct 2020 22:57:51 +0000 (18:57 -0400)]
spi: dw: Add support for multiple CTRLR0 layouts

CTRLR0 can have several different layouts depending on the specific device
(dw-apb-ssi vs dwc-ssi), and specific parameters set during synthesis.
Update the driver to support three specific configurations: dw-apb-ssi with
SSI_MAX_XFER_SIZE=16, dw-apb-ssi with SSI_MAX_XFER_SIZE=32, and dwc-ssi.

dw-apb-ssi is the version of the device on Altera/Intel SoCFPGAs, MSCC
SoCs, and Canaan Kendryte K210 SoCs. This is the only version this driver
supported before this change. The register layout before version 3.23a is:

|   31 .. 16  |
| other stuff |

|   15 .. 10  | 9 .. 8 | 7 .. 6 | 5 .. 4 | 3 .. 0 |
| other stuff |  TMOD  |  MODE  |  FRF   |  DFS   |

Note that DFS (Data Frame Size) is only 4 bits, limiting transfers to data
frames of 16 bits or less.

In version 3.23a, the SSI_MAX_XFER_SIZE parameter was introduced. This
parameter defaults to 16 (resulting in the same layout as prior versions),
but may also be set to 32. To allow setting longer data frame sizes, a new
DFS_32 register was introduced:

|   31 .. 21  | 20 .. 16 |
| other stuff |  DFS_32  |

|   15 .. 10  | 9 .. 8 | 7 .. 6 | 5 .. 4 |  3 .. 0   |
| other stuff |  TMOD  |  MODE  |  FRF   | all zeros |

The old DFS field no longer controls the data frame size. To detect this
layout, we try writing 0xF to DFS. If we read back 0x0, then this device
has SSI_MAX_XFER_SIZE=32.

dwc-ssi is the version of the device on Intel Keem Bay SoCs and Canaan
Kendryte K210 SoCs. The layout of ctrlr0 is:

|   31 .. 16  |
| other stuff |

|   15 .. 12  | 11 .. 10 | 9 .. 8 | 7 .. 6 | 4 .. 0 |
| other stuff |   TMOD   |  MODE  |  FRF   | DFS_32 |

The semantics of the fields have not changed since the previous version.
However, SSI_MAX_XFER_SIZE is effectively always 32.

To support these different layouts, we model our approach on the one
which the Linux kernel has taken. During probe, the driver calls an init
function stored in driver_data. This init function is responsible for
determining the layout of CTRLR0, and supplying the update_cr0 function.

The style of and information behind this commit is based on the Linux MMIO
driver for these devices. Specific reference was made to the series adding
support for Intel Keem Bay SoCs [1].

[1] https://lore.kernel.org/linux-spi/20200505130618.554-1-wan.ahmad.zainie.wan.mohamad@intel.com/

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Add SoC-specific compatible strings
Sean Anderson [Fri, 16 Oct 2020 22:57:50 +0000 (18:57 -0400)]
spi: dw: Add SoC-specific compatible strings

This adds SoC-specific compatible strings to all users of the designware
spi device. This will allow for the correct driver to be selected for each
device. Where it is publicly documented, a compatible string for the
specific device version has also been added. Devices without
publicly-documented device versions include MSCC SoCs, and Arc Socs. All
compatible strings except those for SoCFPGAs and some of the versioned
strings have been taken from Linux.

Since SSI_MAX_XFER_SIZE is determined at runtime, this is not strictly
necessary. However, it is a good cleanup and brings things closer to Linux.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Rearrange struct dw_spi_priv
Sean Anderson [Fri, 16 Oct 2020 22:57:49 +0000 (18:57 -0400)]
spi: dw: Rearrange struct dw_spi_priv

This should reduce the size of the struct, and also groups more similar
fields together.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Remove spi_enable_chip
Sean Anderson [Fri, 16 Oct 2020 22:57:48 +0000 (18:57 -0400)]
spi: dw: Remove spi_enable_chip

This function does nothing but wrap dw_write.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Rename registers to match datasheet
Sean Anderson [Fri, 16 Oct 2020 22:57:47 +0000 (18:57 -0400)]
spi: dw: Rename registers to match datasheet

A few registers had slightly different names from what is in the datasheet.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Use generic function to read reg address
Sean Anderson [Fri, 16 Oct 2020 22:57:46 +0000 (18:57 -0400)]
spi: dw: Use generic function to read reg address

Using an fdt-specific function causes problems when compiled with a live
tree.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Rename "cs-gpio" to "cs-gpios"
Sean Anderson [Fri, 16 Oct 2020 22:57:45 +0000 (18:57 -0400)]
spi: dw: Rename "cs-gpio" to "cs-gpios"

This property is named differently than other SPI drivers with the same
property, as well as the property as used in Linux.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Tested-by Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Convert calls to debug to dev_*
Sean Anderson [Fri, 16 Oct 2020 22:57:44 +0000 (18:57 -0400)]
spi: dw: Convert calls to debug to dev_*

This allows different log levels to be enabled or disabled depending on the
desired level of verbosity. In particular, it allows for general debug
information to be printed while excluding more verbose logging which may
interfere with timing.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: dw: Fix driving MOSI low while recieving
Sean Anderson [Fri, 16 Oct 2020 22:57:43 +0000 (18:57 -0400)]
spi: dw: Fix driving MOSI low while recieving

The resting state of MOSI is high when nothing is driving it. If we drive
it low while recieving, it looks like we are transmitting 0x00 instead of
transmitting nothing. This can confuse slaves (like SD cards) which allow
new commands to be sent over MOSI while they are returning data over MISO.
The return of MOSI from 0 to 1 at the end of recieving a byte can look like
a start bit and a transmission bit to an SD card. This will cause the card
to become out-of-sync with the SPI device, as it thinks the device has
already started transmitting two bytes of a new command. The mmc-spi driver
will not detect the R1 response from the SD card, since it is sent too
early, and offset by two bits. This patch fixes transfer errors when using
SD cards with dw spi.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agomtd: spinand: enable erasing of bad mtd blocks
Mikhail Kshevetskiy [Mon, 22 Jun 2020 13:16:34 +0000 (16:16 +0300)]
mtd: spinand: enable erasing of bad mtd blocks

U-Boot is able to erase bad mtd blocks on raw nand devices, but this
is not true for spinand flashes. Lets enable this feature for spinand
flashes as well. This is extemelly useful for flash testing.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@oktetlabs.ru>
4 years agomtd: spinand: Do not erase the block before writing a bad block marker
Frieder Schrempf [Mon, 22 Jun 2020 13:16:33 +0000 (16:16 +0300)]
mtd: spinand: Do not erase the block before writing a bad block marker

Currently when marking a block, we use spinand_erase_op() to erase
the block before writing the marker to the OOB area. Doing so without
waiting for the operation to finish can lead to the marking failing
silently and no bad block marker being written to the flash.

In fact we don't need to do an erase at all before writing the BBM.
The ECC is disabled for raw accesses to the OOB data and we don't
need to work around any issues with chips reporting ECC errors as it
is known to be the case for raw NAND.

Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-4-frieder.schrempf@kontron.de
4 years agomtd: spinand: Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
Frieder Schrempf [Mon, 22 Jun 2020 13:16:32 +0000 (16:16 +0300)]
mtd: spinand: Explicitly use MTD_OPS_RAW to write the bad block marker to OOB

When writing the bad block marker to the OOB area the access mode
should be set to MTD_OPS_RAW as it is done for reading the marker.
Currently this only works because req.mode is initialized to
MTD_OPS_PLACE_OOB (0) and spinand_write_to_cache_op() checks for
req.mode != MTD_OPS_AUTO_OOB.

Fix this by explicitly setting req.mode to MTD_OPS_RAW.

Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-3-frieder.schrempf@kontron.de
4 years agomtd: spinand: Stop using spinand->oobbuf for buffering bad block markers
Frieder Schrempf [Mon, 22 Jun 2020 13:16:31 +0000 (16:16 +0300)]
mtd: spinand: Stop using spinand->oobbuf for buffering bad block markers

For reading and writing the bad block markers, spinand->oobbuf is
currently used as a buffer for the marker bytes. During the
underlying read and write operations to actually get/set the content
of the OOB area, the content of spinand->oobbuf is reused and changed
by accessing it through spinand->oobbuf and/or spinand->databuf.

This is a flaw in the original design of the SPI NAND core and at the
latest from 13c15e07eedf ("mtd: spinand: Handle the case where
PROGRAM LOAD does not reset the cache") on, it results in not having
the bad block marker written at all, as the spinand->oobbuf is
cleared to 0xff after setting the marker bytes to zero.

To fix it, we now just store the two bytes for the marker on the
stack and let the read/write operations copy it from/to the page
buffer later.

Fixes: 7529df465248 ("mtd: nand: Add core infrastructure to support SPI NANDs")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200218100432.32433-2-frieder.schrempf@kontron.de
4 years agospi: Fix typo in header
Sean Anderson [Fri, 7 Aug 2020 17:13:34 +0000 (13:13 -0400)]
spi: Fix typo in header

Spelling.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agodoc: Fix typo in FIT documentation
Sean Anderson [Fri, 7 Aug 2020 17:13:31 +0000 (13:13 -0400)]
doc: Fix typo in FIT documentation

u_boot should be u-boot

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agomtd: spi-nor-ids: Add SECT_4K to mx25l12805d
Robert Marko [Fri, 23 Oct 2020 08:52:38 +0000 (14:22 +0530)]
mtd: spi-nor-ids: Add SECT_4K to mx25l12805d

According to the mx25l12805d datasheet it supports using 4K or 64K sectors.
So lets add the SECT_4K to enable 4K sector usage.

Datasheet: https://www.mxic.com.tw/Lists/Datasheet/Attachments/7321/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agomtd: spi-nor-ids: Add Winbond W25M512JW flash entry
Biju Das [Tue, 29 Sep 2020 10:04:02 +0000 (11:04 +0100)]
mtd: spi-nor-ids: Add Winbond W25M512JW flash entry

Add Winbond W25M512JW flash device description.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agomtd: spi-nor-ids: Add Winbond W25M512JV flash entry
Lad Prabhakar [Thu, 17 Sep 2020 14:50:30 +0000 (15:50 +0100)]
mtd: spi-nor-ids: Add Winbond W25M512JV flash entry

Add Winbond W25M512JV flash device description.

Linux already has the flash entry present. A snippet below:
{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024...},

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agospi: migrate trace to dev and log macro in spi uclass
Patrick Delaunay [Thu, 15 Oct 2020 15:18:17 +0000 (17:18 +0200)]
spi: migrate trace to dev and log macro in spi uclass

Define LOG_CATEGORY and change printf and pr_*
to dev_ (when dev is available) or log_ macro.

This patch adds the support of logging feature with log command
(filtering, display of device name in trace) and allows to
suppress traces via the syslog driver.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agodh_imx6: Switch to full DM-aware
Jagan Teki [Fri, 23 Oct 2020 08:32:48 +0000 (14:02 +0530)]
dh_imx6: Switch to full DM-aware

Enable DM_SPI/DM_SPI_FLASH with a related config option.

Build fine, but not tested.

Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agocm_fx6: Switch to full DM-aware
Jagan Teki [Fri, 23 Oct 2020 08:26:49 +0000 (13:56 +0530)]
cm_fx6: Switch to full DM-aware

Enable DM_SPI/DM_SPI_FLASH with a related config option.

Build fine, but not tested.

Cc: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agocl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
Jagan Teki [Fri, 23 Oct 2020 08:21:01 +0000 (13:51 +0530)]
cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH

Enable DM_SPI/DM_SPI_FLASH with associated config
options.

Build fine, but not tested.

Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Wed, 16 Dec 2020 22:43:33 +0000 (17:43 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

- r8152, xhci fixes

4 years agoconfigs: Resync with savedefconfig
Tom Rini [Wed, 16 Dec 2020 15:58:24 +0000 (10:58 -0500)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Wed, 16 Dec 2020 13:13:37 +0000 (08:13 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- Update cmdline parameter to be an env var in zimage boot
- Various minor fixes for Intel Edison board

4 years agoeth/r8152: fix the aggregation issue
Hayes Wang [Wed, 16 Dec 2020 09:03:23 +0000 (17:03 +0800)]
eth/r8152: fix the aggregation issue

Remove the redundant setting for USB_RX_EARLY_SIZE. Besides, for
RTL8153B, it is necessary to notify the hardware of the changes
of the aggregation settings.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
4 years agoeth/r8152: free previous memory if r8152_eth_probe fail
Hayes Wang [Wed, 16 Dec 2020 09:03:22 +0000 (17:03 +0800)]
eth/r8152: free previous memory if r8152_eth_probe fail

The r8152_eth_probe() may allocate a memory for ss->dev_priv.
It has to be freed if r8152_eth_probe() fails finally.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
4 years agousb: xhci: fix lack of short packet event trb handling
Ran Wang [Wed, 18 Nov 2020 07:49:02 +0000 (15:49 +0800)]
usb: xhci: fix lack of short packet event trb handling

For bulk IN transfer, the codes will set ISP flag to request event TRB
being generated by xHC for the case of short packet. So when encountering
buffer-cross-64K-boundary (which we will divide payload and enqueuqe
more than 1 transfer TRB), and the first TRB ends up with a short packet
condition it will trigger an short packet code transfer event per that
flag and cause more than 1 event TRB generated for this transfer.

However, current codes will only handle the first transfer event TRB
then mark current transfer completed, causing next transfer
failure due to event TRB mis-match.

Such issue has been observed on some Layerscape platforms (LS1028A,
LS1088A, etc) with USB ethernet device.

This patch adds a loop to make sure the event TRB for last transfer TRB
has been handled in time.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: edison: Switch to DM_USB_GADGET
Andy Shevchenko [Thu, 3 Dec 2020 17:45:02 +0000 (19:45 +0200)]
x86: edison: Switch to DM_USB_GADGET

DM is the modern default approach for the drivers in U-Boot.
It also allows to configure code via Device Tree.

Move Intel Edison to use DM_USB_GADGET and drop hard coded values.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: edison: Use dwc3-generic driver for Intel Edison
Andy Shevchenko [Thu, 3 Dec 2020 17:45:01 +0000 (19:45 +0200)]
x86: edison: Use dwc3-generic driver for Intel Edison

Use generic Synopsys DesignWare 3 driver on Intel Edison.
For now it's just a stub which allows future refactoring.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: edison: BINMAN selection is specific to the board
Andy Shevchenko [Thu, 3 Dec 2020 15:40:11 +0000 (17:40 +0200)]
x86: edison: BINMAN selection is specific to the board

The platforms based on Intel Tangier may have different requirements
how to create bootloader bundle to supply to a device. Currently
the BINMAN approach is for Intel Edison only.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: edison: Add CPU to compatible string
Andy Shevchenko [Wed, 2 Dec 2020 10:35:32 +0000 (12:35 +0200)]
x86: edison: Add CPU to compatible string

Like in the rest of x86 boards append CPU to the board compatible string.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: edison: Drop unneeded DM_PCI_COMPAT
Andy Shevchenko [Fri, 27 Nov 2020 12:41:16 +0000 (14:41 +0200)]
x86: edison: Drop unneeded DM_PCI_COMPAT

None of the driver for Edison is using DM_PCI_COMPAT, hence drop it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: tangier: Find proper memory region for relocation
Andy Shevchenko [Fri, 27 Nov 2020 12:40:48 +0000 (14:40 +0200)]
x86: tangier: Find proper memory region for relocation

It appears that U-Boot works by luck on Intel Edison board because the amount
of RAM is less than 1 GB and standard way of calculating the top of it work
for this configuration. However, this won't work if the amount of RAM is
different and split differently in address space. We have to find the suitable
window correctly.

Find proper memory region for relocation by scanning MMAP SFI table in
board_get_usable_ram_top() callback.

According to the address map documentation the Main Memory is guaranteed to lie
in the 0..2 GB range, that's why we limit search by this range.

Fixes: e71de54a4943 ("x86: Add Intel Tangier support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: coral: Update the boot script
Simon Glass [Mon, 9 Nov 2020 14:12:25 +0000 (07:12 -0700)]
x86: coral: Update the boot script

Make use of the new bootargs substitution mechanism and zboot command
syntax.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: zimage: Update cmdline parameter to be an env var
Simon Glass [Mon, 9 Nov 2020 14:12:24 +0000 (07:12 -0700)]
x86: zimage: Update cmdline parameter to be an env var

With the updated changes to bootargs substitution[1], the zboot command
needs to be updated to get its command line from an environment variable
instead of a memory address. This is because the command-line string must
be updated to convert %U to ${uuid}, etc.

In any case it is more flexible to use a environment variable and it is
best to do this before the release to avoid a subsequent change.

Update the command accordingly.

[1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoMerge tag 'doc-2021-01-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Tue, 15 Dec 2020 18:57:03 +0000 (13:57 -0500)]
Merge tag 'doc-2021-01-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Documentation fixes for v2020.01-rc4

Move several README files to reStructured text for the HTML documentation.
Describe register for global data on x86.
Allow building HTML documentation with Sphinx 3

4 years agodistro_bootcmd: set devtype for dhcp boot
Igor Opaniuk [Thu, 29 Oct 2020 10:59:19 +0000 (12:59 +0200)]
distro_bootcmd: set devtype for dhcp boot

Set $devtype for DHCP boot, which can be handy for the boot.scr
for detection of devtype used (for example, when the same boot.scr is
used for both mmc/dhcp boot):

if test ${devtype} = "dhcp"; then
...
fi

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
4 years agoMerge tag 'u-boot-amlogic-20201215' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Tue, 15 Dec 2020 14:08:14 +0000 (09:08 -0500)]
Merge tag 'u-boot-amlogic-20201215' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- fix pinctrl BIAS setup which caused failure on some eMMC models
- fix dr-mode configuration in dwc3-meson-g12a glue driver

4 years agodoc: uefi: remove leading $ from bash commands
Heinrich Schuchardt [Sat, 12 Dec 2020 08:15:12 +0000 (09:15 +0100)]
doc: uefi: remove leading $ from bash commands

Use the same formatting for all bash commands.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agodoc: move README.bootmenu to HTML doc
Heinrich Schuchardt [Sat, 12 Dec 2020 09:53:17 +0000 (10:53 +0100)]
doc: move README.bootmenu to HTML doc

Convert README.bootmenu to reStructured text and move it to
usage/bootmenu.rst.

Adjust the text concerning configuration settings as these now are managed
via Kconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
4 years agodoc: move README.trace to HTML documentation
Heinrich Schuchardt [Sat, 12 Dec 2020 09:14:22 +0000 (10:14 +0100)]
doc: move README.trace to HTML documentation

Convert README.trace to reStructured text and move it to develop/trace.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodoc: move README.NetConsole to HTML documentation
Heinrich Schuchardt [Sat, 12 Dec 2020 08:37:47 +0000 (09:37 +0100)]
doc: move README.NetConsole to HTML documentation

Convert README.NetConsole to reStructured text and move it to
doc/usage/netconsole.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodoc: use code-block in pstore.rst
Heinrich Schuchardt [Sat, 12 Dec 2020 08:00:12 +0000 (09:00 +0100)]
doc: use code-block in pstore.rst

Use syntax highlighting for a Linux console session.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agodoc: move pstore.rst to usage/pstore.rst
Heinrich Schuchardt [Sat, 12 Dec 2020 07:50:37 +0000 (08:50 +0100)]
doc: move pstore.rst to usage/pstore.rst

Let's have a separate chapter dedicated to using U-Boot.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agodoc: move README.commands to HTML doc
Heinrich Schuchardt [Sat, 12 Dec 2020 07:33:28 +0000 (08:33 +0100)]
doc: move README.commands to HTML doc

Reformat README.commands as reStructured text and add it to the HTML
documentation as develop/commands.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodoc: allow building htmldoc with Sphinx 3+
Heinrich Schuchardt [Mon, 30 Nov 2020 08:52:57 +0000 (09:52 +0100)]
doc: allow building htmldoc with Sphinx 3+

Due to removed function c_funcptr_sig_re building with Sphinx 3 fails.

With the patch building succeeds with a lot of warnings if the '-W' flag is
removed from doc/Makefile. Most of the documentation is correct

This follows the approach taken by the Linux kernel.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agodoc: global data pointer on x86, x86_64
Heinrich Schuchardt [Thu, 15 Oct 2020 05:40:57 +0000 (07:40 +0200)]
doc: global data pointer on x86, x86_64

On x86 the global data pointer is stored in register fs.
On x86_64 no register is used for the global data pointer.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodoc/build/gcc.rst: required packages for SUSE
Heinrich Schuchardt [Sun, 20 Sep 2020 10:01:30 +0000 (12:01 +0200)]
doc/build/gcc.rst: required packages for SUSE

Describe the packages required to build U-Boot on SUSE.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Mon, 14 Dec 2020 20:11:05 +0000 (15:11 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv

- Fix wrong amoswap t1 usage in startup.
- Reset the board after crash.
- Enable distro booting from an attached SCSI disk for QEMU.
- Support the optional header fields in efi header.

4 years agopinctrl: meson: fix bit manipulation of pin bias configuration
Neil Armstrong [Mon, 14 Dec 2020 18:39:07 +0000 (19:39 +0100)]
pinctrl: meson: fix bit manipulation of pin bias configuration

This fixes the wrong usage of clrsetbits_le32(), badly setting the set argument.

Fixes: c4c726c26b ("pinctrl: meson: add pinconf support")
Reported-by: Anton Arapov <arapov@gmail.com>
Reported-by: Otto Meier <gf435@gmx.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agousb: dwc3-meson-g12a: always configure dr-mode
Marek Szyprowski [Mon, 14 Dec 2020 11:34:19 +0000 (12:34 +0100)]
usb: dwc3-meson-g12a: always configure dr-mode

dwc3_meson_g12a_force_mode() sets the dr-mode of the USB PHY. However
it skips setting the mode if it matches the one done during driver probe
(stored in private structure). This fails if the mode has been changed
to other value and then back to initial one. Fix this by configuring the
dr-mode always, regadless of the one set at the driver probe).

This fixes operation of USB gadget based drivers when they are initialized
for the second time.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
4 years agoriscv: Complete efi header for RV32/64
Leo Yu-Chi Liang [Mon, 16 Nov 2020 09:07:41 +0000 (17:07 +0800)]
riscv: Complete efi header for RV32/64

This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/)

Add fields to complete Optional Header "Data Directories" specified in the document.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Cc: alankao@andestech.com
Cc: atish.patra@wdc.com
Cc: xypron.glpk@gmx.de
Cc: bmeng.cn@gmail.com
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
4 years agoriscv: Fix efi header size for RV32
Leo Yu-Chi Liang [Thu, 12 Nov 2020 02:09:52 +0000 (10:09 +0800)]
riscv: Fix efi header size for RV32

This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/)

Modify the size of the Optional Header "Windows-Specific Fields" to fit with the specification.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Cc: alankao@andestech.com
Cc: atish.patra@wdc.com
Cc: xypron.glpk@gmx.de
Cc: bmeng.cn@gmail.com