Tom Rini [Tue, 30 Apr 2024 13:35:28 +0000 (07:35 -0600)]
include: Add missing headers in a few instances
A few headers rely on indirect inclusion of <linux/types.h> or
<linux/kernel.h> so add them directly. In the case of <netdev.h> add a
"struct bd_info;" as well rather than the large header chain to resolve
that.
Tom Rini [Sat, 27 Apr 2024 14:10:57 +0000 (08:10 -0600)]
powerpc: Remove <common.h> and add needed includes
Remove <common.h> from all powerpc architecture files and when needed add
missing include files directly. This typically involves using
<asm/u-boot.h> instead due to the difficult nested structure of the
PowerPC includes themselves.
- Add SPL variant of DM_RNG so that the DM_RNG can be disabled in SPL if
necessary. This may be necessary due to e.g. size constraints of the SPL.
- dd SPL variant of SPL_FSL_CAAM_RNG so that the SPL_FSL_CAAM_RNG can be
disabled in SPL if necessary. This may be necessary due to e.g. size
constraints of the SPL.
- Differentiate between CAAM and DCP in Kconfig entry.
Marek Vasut [Thu, 25 Apr 2024 23:02:09 +0000 (01:02 +0200)]
crypto/fsl: Differentiate between CAAM and DCP in Kconfig entry
Differentiate between "Enable Random Number Generator support" and
"Enable Random Number Generator support" in Kconfig entry, mark the
first as CAAM and the second as DCP, otherwise users cannot easily
decide which of the options is which and enable the correct one.
Marek Vasut [Thu, 25 Apr 2024 23:02:08 +0000 (01:02 +0200)]
crypto/fsl: Introduce SPL_FSL_CAAM_RNG
Add SPL variant of SPL_FSL_CAAM_RNG so that the SPL_FSL_CAAM_RNG can
be disabled in SPL if necessary. This may be necessary due to e.g.
size constraints of the SPL.
Jim Liu [Tue, 23 Apr 2024 07:22:10 +0000 (15:22 +0800)]
board: arbel: Limit the dram effective size to bank0 maximal size
For 4GB dram size, the dram is divided into 2 banks and
the address space of these 2 banks are not concatenated.
Limit the gd->ram_top to not exceed bank0 top to prevent
accessing invalid memory region.
Jim Liu [Tue, 23 Apr 2024 07:22:09 +0000 (15:22 +0800)]
configs: arbel: increase u-boot mapping size
When u-boot enable CONFIG_SYS_BOOT_RAMDISK_HIGH, rootfs image relocated
from FIU address space to memory address before jump to kernel.
Since Arbel reserved memory from 0x00000000 to 0x06200000 for tip image,
and rootfs image may too large that cannot found a suitable location
before 128MB(0x8000000), so increase mapping size from 128MB to 192MB.
net: consider option-length when parsing NIS domain
When parsing option 40 (network information service domain) the
option length is in variable 'oplen' and not in 'size'.
Addresses-Coverity-ID: 492765 Uninitialized variables (UNINIT) Fixes: 8ab388bfdbcf ("net: add support to parse the NIS domain for the dhcp options") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Commit 37cb626da25d0d ("mmc: sdhci: Add Support for ADMA2") introduced
ADMA_DESC_LEN == 16 (64 bit case), but it was never used before commit 74755c1fed1b0 ("mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops").
"sizeof(struct sdhci_adma_desc)" (== 12 for 64bit case) was used instead.
Confusion probably originates from Linux commit 685e444bbaa0
("mmc: sdhci: Add ADMA2 64-bit addressing support for V4 mode"), but
the latter "V4 mode" was never ported to U-Boot.
Fixes: 74755c1fed1b0 ("mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops") Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Tested-by: Jonathan Humphreys <j-humphreys@ti.com> Tested-by: Judith Mendez <jm@ti.com>
- RISC-V: cmd: Add SBI implementation ID and extension ID
- Board: Rename spl_soc_init to spl_dram_init
- Board: milkv_duo: Add SPI NOR flash, Ethernet, Sysreset support
Tom Rini [Thu, 2 May 2024 01:39:45 +0000 (19:39 -0600)]
Merge tag 'efi-2024-07-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2024-07-rc2
Documentation:
* correct description of 'env print -e'
UEFI:
* remove superfluous efi_restore_gd after EFI_CALL
* terminate efidebug test bootmgr early on error
* do not install device-tree if bootmgr fails
* pass GUID by address to efi_dp_from_lo
* remove dead code in efi_var_mem_init()
* enable QueryVariableInfo at runtime for file backed variables
board: starfive: Rename spl_soc_init() to spl_dram_init()
Rename spl_soc_init() to spl_dram_init() because the generic function
name does not reflect what the function actually does. Also
spl_dram_init() is commonly used for dram initialization and should be
called from board_init_f().
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
board: sifive: Rename spl_soc_init() to spl_dram_init()
Rename spl_soc_init() to spl_dram_init() because the generic function
name does not reflect what the function actually does. Also
spl_dram_init() is commonly used for dram initialization and should be
called from board_init_f().
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Kongyang Liu [Tue, 16 Apr 2024 07:31:05 +0000 (15:31 +0800)]
mmc: cv1800b: Add transmit tap delay config to fix write error
Currently, only the receive delay is configured while the transmit delay
is not set, which may result in errors when writing to the file. This issue
can be resolved by setting PHY_TX_SRC_INVERT to SDHCI_PHY_TX_RX_DLY.
riscv: andesv5: Set default cache line size to 64-bytes
The instruction and data cache line sizes of Andes core
are 64-byte. Select SYS_CACHE_SHIFT_6 for RISCV_NDS so
the SYS_CACHELINE_SIZE is enabled with a default value.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
efi_selftest: add tests for QueryVariableInfo at boottime
Previous patches added QueryVariableInfo at runtime tests and
split a common function that can be used at boottime. Weire it
up and run a similar set of tets. While at it move a test which is
checiking for 0 available storage in the common code
Add tests for
- Test QueryVariableInfo returns EFI_SUCCESS
- Test null pointers for the function arguments
- Test invalid combination of attributes
efi_loader: enable QueryVariableInfo at runtime for file backed variables
Since commit c28d32f946f0 ("efi_loader: conditionally enable SetvariableRT")
we are enabling the last bits of missing runtime services.
Add support for QueryVariableInfo which we already support at boottime
and we just need to mark some fucntions available at runtime and move
some checks around.
It's worth noting that pointer checks for maxmimum and remaining
variable storage aren't when we store variables on the RPMB, since the
Secure World backend is already performing them.
efi_loader: improve error handling in try_load_entry()
The image is not unloaded if a security violation occurs.
If efi_set_load_options() fails, we do not free the memory allocated for
the optional data. We do not unload the image.
* Unload the image if a security violation occurs.
* Free load_options if efi_set_load_options() fails.
* Unload the image if efi_set_load_options() fails.
Fixes: 53f6a5aa8626 ("efi_loader: Replace config option for initrd loading") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Daniel Schultz [Fri, 19 Apr 2024 15:55:39 +0000 (08:55 -0700)]
board: phytec: common: Fix eepom is empty check
The ptr variable is currently defined as int and sizeof
returns the size of the eeprom data struct as Byte (32 in total).
In case the eeprom is empty, the check, if the eeprom is empty,
will most likely stop after 8 iterations because it will continue
with the stack which should contain some data. Therefore, the
init function will detect an empty EEPROM as API0 and return with
the valid flag set to True.
Fixes: dc22188cdc8 ("board: phytec: Add common PHYTEC SoM detection") Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
For all of the functions that access the eeprom_data, make sure these
data are valid. Use the valid member of the phytec_eeprom_data struct.
This fixes a bug where only the API revision check guarded against
accessing rubbish. But if API revision was e.g. 6, eeprom setup failed
before, but phytec_get_imx8m_eth would still happily access the data.
Fixes: dc22188cdc8 ("board: phytec: Add common PHYTEC SoM detection") Signed-off-by: Yannic Moog <y.moog@phytec.de> Signed-off-by: Daniel Schultz <d.schultz@phytec.de> Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
board: phytec: introduce eeprom struct member 'valid'
Add a new nember to the eeprom_data that indicates whether the
associated data is valid or not. Make use of this new member in the
phytec_eeprom_data_init function by setting the valid value
appropriately.
Move the eeprom data to a new struct payload that holds
the payload of the eeprom.
The phycore-rk3288 can be migrated to OF_UPSTREAM.
Drop redundant device tree files, update MAINTAINERS and
defconfig's DEFAULT_DEVICE_TREE for rockchip vendor prefix accordingly.
Move device tree nodes required for u-boot to rk3288-phycore-rdk-u-boot.dtsi
such as chosen, i2c_eeprom_id and it's alias.
The phycore-am64x can be migrated to OF_UPSTREAM.
Drop redundant device tree files, update MAINTAINERS and
defconfig's DEFAULT_DEVICE_TREE for ti vendor prefix accordingly.
While at it, drop the redundant definitions of AM642_PHYBOARD_ELECTRA_DTB
& SPL_AM642_PHYBOARD_ELECTRA_DTB from the binman dtsi file.
The phycore-am62x can be migrated to OF_UPSTREAM.
Drop redundant device tree files, update MAINTAINERS and
defconfig's DEFAULT_DEVICE_TREE for ti vendor prefix accordingly.
At HS400 mode the ITAPDLY value is that from High Speed mode
which is incorrect and may cause boot failures.
The ITAPDLY for HS400 speed mode should be the same as ITAPDLY
as HS200 timing after tuning is executed. Add the functionality
to save ITAPDLY from HS200 tuning and save as HS400 ITAPDLY.
Fixes: c964447ea3d6 ("mmc: am654_sdhci: Add support for input tap delay") Signed-off-by: Judith Mendez <jm@ti.com>
According to the device datasheet [0], ENDLL=1 for
DDR52 mode, so call am654_sdhci_setup_dll() and write
itapdly after since we do not carry out tuning.
[0] https://www.ti.com/lit/ds/symlink/am62p.pdf
Fixes: c964447ea3d6 ("mmc: am654_sdhci: Add support for input tap delay") Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
mmc: am654_sdhci: Add itap_del_ena[] to store itapdlyena bit
Set itap_del_ena if ITAPDLY is found in DT or if the tuning
algorithm was executed and found the optimal ITAPDLY. Add the
functionality to save ITAPDLYENA that can be referenced later
by storing the bit in array itap_del_ena[].
mmc: am654_sdhci: Add tuning algorithm for delay chain
Currently the sdhci_am654 driver only supports one tuning
algorithm which should be used only when DLL is enabled. The
ITAPDLY is selected from the largest passing window and the
buffer is viewed as a circular buffer.
The new tuning algorithm should be used when the delay chain
is enabled; the ITAPDLY is selected from the largest passing
window and the buffer is not viewed as a circular buffer.
This implementation is based off of the following paper: [1].
Also add support for multiple failing windows.
[1] https://www.ti.com/lit/an/spract9/spract9.pdf
Fixes: a759abf569d4 ("mmc: am654_sdhci: Add support for software tuning") Signed-off-by: Judith Mendez <jm@ti.com>
Tom Rini [Mon, 29 Apr 2024 16:55:17 +0000 (10:55 -0600)]
Merge patch series "upstream DT compatibility"
Caleb Connolly <caleb.connolly@linaro.org> says:
This is a subset of [1]. With more platform maintainers switching to
OF_UPSTREAM I didn't want to get in the way (it has also proven more
difficult than I hoped to remove only the fully compatible header
files).
This series removes only the dt-bindings headers which contain generic
data like GPIO flags, input event codes, etc.
It then implements support for building all DTBs for a vendor with
OF_UPSTREAM_BUILD_VENDOR. This removes the need to maintain a set list
of DTBs that can be built by U-Boot and opens up the possibility of new
boards becoming supported "by default" just by landing their DT
upstream.
dts: support building all dtb files for a specific vendor
This adjusts OF_UPSTREAM to behave more like the kernel by allowing for
all the devicetree files for a given vendor to be compiled. This is
useful for Qualcomm in particular as most boards are supported by a
single U-Boot build just provided with a different DT.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on Amlogic boards builds
Tom Rini [Mon, 29 Apr 2024 16:54:46 +0000 (10:54 -0600)]
Merge patch series "Enable ICSSG Ethernet Driver for AM65x"
MD Danish Anwar <danishanwar@ti.com> says:
The series introduces device tree and config changes and AM65x
to enable ICSSG driver. The series also enables SPL_LOAD_FIT_APPLY_OVERLAY
for AM65x in order to load overlay over spl.
The ICSSG2 node is added in device tree overlay so that it remains in
sync with linux kernel.
This series has been tested on AM65x SR2.0, and the ICSSG interface is
able to ping / dhcp and boot kernel using tftp in uboot.
The users need to set env variables fw_storage_interface, fw_dev_part,
fw_ubi_mtdpart, fw_ubi_volume to indicate which storage medium and
partition they want to use to load firmware files from. By default the env
fw_storage_interface=mmc and fw_dev_part=1:2 but users can modify these
envs as per their requirements.
board: ti: am65x: Set fw_storage_interface and fw_dev_part ENVs
When ICSSG driver is enabled (CONFIG_TI_ICSSG_PRUETH=y) set
storage_interface and fw_dev_part env variables.
These variables need be set appropriately in order to load differnet
ICSSG firmwares needed for ICSSG driver. By default the storage
interface is mmc and the partition is 1:2. User can modify this based on
their needs.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Acked-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
projects / u-boot.git / log