]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
2 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-watchdog
Tom Rini [Wed, 26 Oct 2022 11:45:55 +0000 (07:45 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog

- nuvoton: add expire function for generic reset (Jim)
- handle watchdogs during keyed autoboot (Rasmus)
- cyclic: Don't disable cylic function upon exceeding CPU time (Stefan)
- ulp wdog: Updates to support iMX93 and DM (Alice)

2 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Tue, 25 Oct 2022 13:54:59 +0000 (09:54 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-spi

- Add s28hl512t, s28hl01gt (Takahiro)
- Rework s25hx_t_post_bfpt_fixup() (Takahiro)

2 years agocmd: sf: Handle unaligned 'update' start offset
Marek Vasut [Wed, 28 Sep 2022 16:45:04 +0000 (18:45 +0200)]
cmd: sf: Handle unaligned 'update' start offset

Currently the 'sf update' command fails in case the 'start' offset is
not aligned to SPI NOR erase block size. Add the missing alignment
calculation. In case the start offset is in the middle of erase block,
round start address down to the nearest aligned one, compare only the
updated data between what is in the SPI NOR and what is being written,
copy new data at offset of the compare buffer, and write back the entire
erase block.

This is useful e.g. on i.MX6Q where the u-boot-with-spl.imx is at
offset 0x400 in the SPI NOR, while the SPI NOR may have erase block
size e.g. 0x1000 bytes.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agoMerge tag 'fsl-qoriq-2022-10-18' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Tue, 25 Oct 2022 01:28:47 +0000 (21:28 -0400)]
Merge tag 'fsl-qoriq-2022-10-18' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq

Layerscape update
 - support sysreset,
 - de-select FSL_IFC when booting from SD
 - disable unused parts of ICID tables
 - reduce ns_dev size for csu
 - enable dma snooping for ls104x
 - nand driver fixups for ls1043ardb rev 7.0 boards.

2 years agoMerge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Tue, 25 Oct 2022 01:28:14 +0000 (21:28 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc

2 years agoMerge tag 'u-boot-imx-20221024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Mon, 24 Oct 2022 14:04:30 +0000 (10:04 -0400)]
Merge tag 'u-boot-imx-20221024' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20221024
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13916

- for 2022.01
- rework Kontron boards (mx6 and mx8)
- fixes for Toradex
- fixes (SPI, CAAM, )
- sync DT with Linux
- fixes for Gateworks GW7903 and GW7904 PMIC
- Engicam i.Core MX8M Plus EDIMM2.2

2 years agoconfigs: verdin-imx8mp: enable caam
Andrejs Cainikovs [Tue, 4 Oct 2022 11:06:32 +0000 (13:06 +0200)]
configs: verdin-imx8mp: enable caam

This change enables Cryptographic Accelerator and Assurance Module.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
2 years agoconfigs: colibri-imx7: Enable bootd command
Francesco Dolcini [Wed, 3 Aug 2022 11:20:09 +0000 (13:20 +0200)]
configs: colibri-imx7: Enable bootd command

Enable boot/bootd command in toradex colibri-imx7 defconfig,
it's just convenient to have it in and every other toradex board
already includes it.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx28: avoid num_cs and spi_max_frequency build errors
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:45 +0000 (23:59 +0200)]
imx28: avoid num_cs and spi_max_frequency build errors

Avoid the following build errors after the device tree sync:

drivers/spi/mxs_spi.c: In function ‘mxs_spi_probe’:
drivers/spi/mxs_spi.c:327:25: error: ‘struct dtd_fsl_imx23_spi’ has no
 member named ‘spi_max_frequency’
  327 |  priv->max_freq = dtplat->spi_max_frequency;
      |                         ^~
drivers/spi/mxs_spi.c:328:23: error: ‘struct dtd_fsl_imx23_spi’ has no
 member named ‘num_cs’
  328 |  plat->num_cs = dtplat->num_cs;
      |                       ^~

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx23: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:43 +0000 (23:59 +0200)]
imx23: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx28: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:42 +0000 (23:59 +0200)]
imx28: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx51: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:41 +0000 (23:59 +0200)]
imx51: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx53: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:40 +0000 (23:59 +0200)]
imx53: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx6qdl: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:39 +0000 (23:59 +0200)]
imx6qdl: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx6qp: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:38 +0000 (23:59 +0200)]
imx6qp: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx6sl: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:37 +0000 (23:59 +0200)]
imx6sl: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx6sll: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:36 +0000 (23:59 +0200)]
imx6sll: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx6sx: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:35 +0000 (23:59 +0200)]
imx6sx: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx6ulz: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:34 +0000 (23:59 +0200)]
imx6ulz: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx6ull: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:33 +0000 (23:59 +0200)]
imx6ull: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx6ul: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:32 +0000 (23:59 +0200)]
imx6ul: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx7d: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:31 +0000 (23:59 +0200)]
imx7d: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoimx7ulp: synchronise device tree with linux
Marcel Ziswiler [Sat, 22 Oct 2022 21:59:30 +0000 (23:59 +0200)]
imx7ulp: synchronise device tree with linux

Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoarm: dts: imx8mn-venice: Consolidate with imx8mn-u-boot
Adam Ford [Sat, 22 Oct 2022 00:58:37 +0000 (19:58 -0500)]
arm: dts: imx8mn-venice: Consolidate with imx8mn-u-boot

Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.

Signed-off-by: Adam Ford <aford173@gmail.com>
2 years agoarm: dts: imx8mn-var-som-symphony: Consolidate with imx8mn-u-boot
Adam Ford [Sat, 22 Oct 2022 00:58:36 +0000 (19:58 -0500)]
arm: dts: imx8mn-var-som-symphony: Consolidate with imx8mn-u-boot

Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.

Signed-off-by: Adam Ford <aford173@gmail.com>
2 years agoarm: dts: imx8mn-evk: Consolidate with imx8mn-u-boot
Adam Ford [Sat, 22 Oct 2022 00:58:35 +0000 (19:58 -0500)]
arm: dts: imx8mn-evk: Consolidate with imx8mn-u-boot

Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.

Signed-off-by: Adam Ford <aford173@gmail.com>
2 years agoarm: dts: imx8mn-ddr4-evk: Consolidate with imx8mn-u-boot
Adam Ford [Sat, 22 Oct 2022 00:58:34 +0000 (19:58 -0500)]
arm: dts: imx8mn-ddr4-evk: Consolidate with imx8mn-u-boot

Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.

Signed-off-by: Adam Ford <aford173@gmail.com>
2 years agoarm: dts: imx8mn-bsh-smm-s2: Consolidate with imx8mn-u-boot
Adam Ford [Sat, 22 Oct 2022 00:58:33 +0000 (19:58 -0500)]
arm: dts: imx8mn-bsh-smm-s2: Consolidate with imx8mn-u-boot

Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.

Signed-off-by: Adam Ford <aford173@gmail.com>
2 years agoarm: dts: imx8mn-beacon-kit: Consolidate with imx8mn-u-boot
Adam Ford [Sat, 22 Oct 2022 00:58:32 +0000 (19:58 -0500)]
arm: dts: imx8mn-beacon-kit: Consolidate with imx8mn-u-boot

Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.

Signed-off-by: Adam Ford <aford173@gmail.com>
2 years agoarm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi
Adam Ford [Sat, 22 Oct 2022 00:58:31 +0000 (19:58 -0500)]
arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi

Multiple boards create duplicate entries in their respective
-u-boot.dtsi files which all basically do the same thing.
To consolidate these and make it easier to make improvements
going forward, consolidate them all into one place.

This file creates a flash.bin image using binman, and supports
LPDDR4, DDR4 and DDR3.  Since individual boards use different
peripherals and different UART ports, those entries were kept
in their respective board files, but the spba1 node was addded
which contains all UART1-3 to help facilitate SPL_DM_SERIAL.
Individual users will still need to include their respective
UART and pinctrl nodes for those UARTS.

This consolidated file also supports generating a flash.bin file
which can boot from flexSPI if CONFIG_FSPI_CONF_HEADER is
enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoimx8m: fix reading of DDR4 MR registers [again]
Rasmus Villemoes [Thu, 6 Oct 2022 12:56:50 +0000 (14:56 +0200)]
imx8m: fix reading of DDR4 MR registers [again]

Commit 290ffe5788 (imx8m: fix reading of DDR4 MR registers) lifted a
private definition of lpddr4_mr_read() from imx8mm-cl-iot-gate board
code to drivers/ddr/imx/imx8m/ddrphy_utils.c, because that version
actually seems to work in practice.

However, commit 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
reintroduced the broken version in drivers/ddr/imx/imx8m/ddr_init.c,
copied most of the rest of ddrphy_utils.c to
drivers/ddr/imx/phy/ddrphy_utils.c, and stopped building
drivers/ddr/imx/imx8m/ddrphy_utils.c [and that file was then finally
completely removed with 7e9bd84883 (imx8m: ddrphy_utils: Remove unused
file)].

I assume this must have broken the imx8mm-cl-iot-gate board, at least
those that have not had their eeprom programmed with the proper
information. It certainly did break our out-of-tree board which always
reads back the ID register and uses that for a sanity check.

So apply the fix from 290ffe5788 once again.

Fixes: 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agoverdin-imx8mp: spl: initialize caam
Andrejs Cainikovs [Tue, 4 Oct 2022 11:06:31 +0000 (13:06 +0200)]
verdin-imx8mp: spl: initialize caam

This change initializes Cryptographic Accelerator and Assurance Module.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
2 years agoarm: dts: verdin-imx8mp: enable caam in SPL
Andrejs Cainikovs [Tue, 4 Oct 2022 11:06:30 +0000 (13:06 +0200)]
arm: dts: verdin-imx8mp: enable caam in SPL

CAAM is initialized in SPL, so relevant device tree nodes needs to be
updated.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
2 years agoverdin-imx8mp: various config additions and improvements
Marcel Ziswiler [Thu, 22 Sep 2022 21:28:34 +0000 (23:28 +0200)]
verdin-imx8mp: various config additions and improvements

- enable bootcount command
- enable CRC32 and MD5
- enable time commands
- enable GPIO LED support
- enable further eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- enable USB host functionality
- enable thermal management unit driver
- enable hexdump

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoverdin-imx8mm: various config additions and improvements
Marcel Ziswiler [Thu, 22 Sep 2022 21:28:33 +0000 (23:28 +0200)]
verdin-imx8mm: various config additions and improvements

- enable bootcount command
- integrate bootcount using SNVS_LP general purpose register LPGPR0
- enable link-time optimisation
- explicitly set a boot delay of one second
- enable CRC32 and MD5
- enable command for low-level access to data in a partition
- enable time commands
- enable PMIC commands
- improve ETHPRIME configuration
- enable eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- remove stale PFUZE100 PMIC driver
- enable thermal management unit driver
- enable more USB host functionality
- enable hexdump

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoverdin-imx8mm: verdin-imx8mp: update env memory layout (again)
Marcel Ziswiler [Thu, 22 Sep 2022 21:28:32 +0000 (23:28 +0200)]
verdin-imx8mm: verdin-imx8mp: update env memory layout (again)

Update the distro config env memory layout for the Verdin iMX8M Mini and
Verdin iMX8M Plus again:

- loadaddr=0x48200000 allows for 128MB area for uncompressing (ie FIT
  images, kernel_comp_addr_r, kernel_comp_size)
- fdt_addr_r = loadaddr + 128MB - allows for 128MB kernel
- scriptaddr = fdt_addr_r + 512KB - allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB - allows for 512KB script

Memory layout taken from commit fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout").

Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).

Note that this corrects a pre-maturely applied version 2 of the same
patch set.

Fixes: bbe0089d29e ("verdin-imx8mm: verdin-imx8mp: update env memory layout")
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agoboard: gateworks: venice: add imx8mm-gw7904 support
Tim Harvey [Wed, 14 Sep 2022 16:02:19 +0000 (09:02 -0700)]
board: gateworks: venice: add imx8mm-gw7904 support

The GW7904 is based on the i.MX 8M Mini SoC featuring:
 - LPDDR4 DRAM
 - eMMC FLASH
 - microSD connector with UHS support
 - LIS2DE12 3-axis accelerometer
 - Gateworks System Controller
 - IMX8M FEC
 - 2x RS232 off-board connectors
 - PMIC
 - 10x bi-color LED's
 - 1x miniPCIe socket with PCIe and USB2.0
 - 802.3at Class 4 PoE
 - 10-30VDC input via barrel-jack

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2 years agoboard: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit
Manoj Sai [Fri, 26 Aug 2022 12:33:37 +0000 (18:03 +0530)]
board: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit

i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.

i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
2 years agoarm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit
Manoj Sai [Fri, 26 Aug 2022 12:33:36 +0000 (18:03 +0530)]
arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit

Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Plus PCIe
- MIPI CSI
- 2x CAN
- Audio Out

i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam.

i.Core MX8M Plus needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit.

Add support for it.

Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP
devicetree file from linux-next tree.
commit <aec8ad34f7f24> (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit)

Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agoarm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM
Manoj Sai [Fri, 26 Aug 2022 12:33:35 +0000 (18:03 +0530)]
arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM

i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam.

General features:
- NXP i.MX8M Plus
- Up to 4GB LDDR4
- 8 eMMC
- Gigabit Ethernet
- USB 3.0, 2.0 Host/OTG
- PCIe 3.0 interface
- I2S
- LVDS
- rest of i.MX8M Plus features

i.Core MX8M Plus needs to mount on top of Engicam baseboards
for creating complete platform solutions.

Add support for it.

Sync the i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus
from Engicam devicetree file from linux-next tree.
commit <eefe06b295087> (arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus SoM)

Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agoboard: gateworks: venice: add GW7903 PMIC
Tim Harvey [Thu, 11 Aug 2022 18:57:04 +0000 (11:57 -0700)]
board: gateworks: venice: add GW7903 PMIC

The GW7903 has a BD71847 PMIC on I2C1. Adjust the model compare strings
to add it.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agowatchdog: ulp_wdog: add driver model for ulp watchdog driver
Alice Guo [Fri, 21 Oct 2022 08:41:18 +0000 (16:41 +0800)]
watchdog: ulp_wdog: add driver model for ulp watchdog driver

Enable driver model for ulp watchdog timer. When CONFIG_WDT=y and the
status of device node is "okay", initr_watchdog will be called and
finally calls ulp_wdt_probe() and ulp_wdt_start().

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2 years agowatchdog: ulp_wdog: enable watchdog interrupt on imx93
Alice Guo [Fri, 21 Oct 2022 08:41:17 +0000 (16:41 +0800)]
watchdog: ulp_wdog: enable watchdog interrupt on imx93

The reset source of the external PMIC on i.MX93 is WDOG_ANY PAD and the
source of WDOG_ANY PAD is interrupt. Therefore, using PMIC to reset
needs to enable the watchdog interrupt.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2 years agowatchdog: ulp_wdog: Update watchdog driver for imx93
Alice Guo [Fri, 21 Oct 2022 08:41:16 +0000 (16:41 +0800)]
watchdog: ulp_wdog: Update watchdog driver for imx93

The WDOG clocks are sourced from the fixed 32KHz (lpo_clk).When the
timeout period exceeds 2 seconds, the value written to the TOVAL
register is larger than 16-bit can represent. Enabling watchdog
prescaler to solve this problem.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2 years agoulp_wdog: Update ulp wdog driver for 32bits command
Ye Li [Fri, 21 Oct 2022 08:41:15 +0000 (16:41 +0800)]
ulp_wdog: Update ulp wdog driver for 32bits command

To use 32bits refresh and unlock command as default, check the CMD32EN
bit to select the corresponding commands.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2 years agocyclic: Don't disable cylic function upon exceeding CPU time
Stefan Roese [Mon, 17 Oct 2022 07:00:58 +0000 (09:00 +0200)]
cyclic: Don't disable cylic function upon exceeding CPU time

With the migration of the watchdog infrastructure to cyclic functions
it's been noticed, that at least one watchdog driver is broken now. As
the execution time of it's watchdog reset function is quite long.

In general it's not really necessary (right now) to disable the cyclic
function upon exceeding CPU time usage. So instead of disabling the
cylic function in this case, let's just print a warning once to show
this potential problem to the user.

Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Tom Rini <trini@konsulko.com>
Cc: Pali Rohár <pali@kernel.org>
2 years agosandbox.dtsi: add a sandbox,alarm-wdt instance
Rasmus Villemoes [Tue, 27 Sep 2022 09:54:05 +0000 (11:54 +0200)]
sandbox.dtsi: add a sandbox,alarm-wdt instance

In order to test that we properly handle watchdog(s) during the "wait
for the user to interrupt autoboot" phase, we need a watchdog device
to be watching us.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2 years agosandbox: add SIGALRM-based watchdog device
Rasmus Villemoes [Tue, 27 Sep 2022 09:54:04 +0000 (11:54 +0200)]
sandbox: add SIGALRM-based watchdog device

In order to test that U-Boot actually maintains the watchdog device(s)
during long-running busy-loops, such as those where we wait for the
user to stop autoboot, we need a watchdog device that actually does
something during those loops; we cannot test that behaviour via the DM
test framework.

So introduce a relatively simple watchdog device which is simply based
on calling the host OS' alarm() function; that has the nice property
that a new call to alarm() simply sets a new deadline, and alarm(0)
cancels any existing alarm. These properties are precisely what we
need to implement start/reset/stop. We install our own handler so that
we get a known message printed if and when the watchdog fires, and by
just invoking that handler directly, we get expire_now for free.

The actual calls to the various OS functions (alarm, signal, raise)
need to be done in os.c, and since the driver code cannot get access
to the values of SIGALRM or SIG_DFL (that would require including a
host header, and that's only os.c which can do that), we cannot simply
do trivial wrappers for signal() and raise(), but instead create
specialized functions just for use by this driver.

Apart from enabling this driver for sandbox{,64}_defconfig, also
enable the wdt command which was useful for hand-testing this new
driver (especially with running u-boot under strace).

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2 years agowatchdog: introduce a u-boot,autostart property
Rasmus Villemoes [Tue, 27 Sep 2022 09:54:03 +0000 (11:54 +0200)]
watchdog: introduce a u-boot,autostart property

This is a companion to u-boot,noautostart. If one has a single
watchdog device that one does want to have auto-started, but several
others that one doesn't, the only way currently is to set the
CONFIG_WATCHDOG_AUTOSTART and then use the opt-out for the majority.

The main motivation for this is to add an autostarted watchdog device
to the sandbox (to test a fix) without having to set AUTOSTART in
sandbox_defconfig and add the noautostart property to the existing
devices. But it's also nice for symmetry, and the logic in
init_watchdog_dev() becomes simpler to read because we avoid all the
negations.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2 years agowdt: nuvoton: add expire function for generic reset
Jim Liu [Tue, 13 Sep 2022 06:19:24 +0000 (14:19 +0800)]
wdt: nuvoton: add expire function for generic reset

Add expire_now function for generic sysreset request

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2 years agommc: Fix static checker warnings
Venkatesh Yadav Abbarapu [Thu, 29 Sep 2022 04:52:49 +0000 (10:22 +0530)]
mmc: Fix static checker warnings

Correct pointer dereferencing check to be more consistent.

Eliminate the below smatch warning:
drivers/mmc/mmc.c:3118 mmc_init_device()
warn: variable dereferenced before check 'm' (see line 3116)

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agommc: dwmmc: only clear handled interrupts
John Keeping [Thu, 15 Sep 2022 17:56:56 +0000 (18:56 +0100)]
mmc: dwmmc: only clear handled interrupts

Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
in FIFO mode transfers if events occur in the following order:

mask = dwmci_readl(host, DWMCI_RINTSTS);

// Hardware asserts DWMCI_INTMSK_DTO here

dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);

if (mask & DWMCI_INTMSK_DTO) {
// Unreachable as DTO is cleared without being handled!
return 0;
}

Only clear interrupts that we have seen and are handling so that DTO is
not missed.

Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (Rock PI 4B)
Tested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agommc: stm32_sdmmc2: manage vqmmc
Yann Gautier [Tue, 13 Sep 2022 11:23:46 +0000 (13:23 +0200)]
mmc: stm32_sdmmc2: manage vqmmc

The SDMMC IOs can be in an IO domain, that has to be enabled.
This is done by enabling vqmmc in the driver.
This has no impact on configurations not using an IO domain, the check
can then be executed on all platforms managing regulator, and the vqmmc
regulator enabled on all platforms having it in their DT.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agommc: stm32_sdmmc2: protect against unsupported modes
Yann Gautier [Tue, 13 Sep 2022 11:23:45 +0000 (13:23 +0200)]
mmc: stm32_sdmmc2: protect against unsupported modes

The UHS modes for SD, HS200 and HS400 modes for eMMC are not supported
by the stm32_sdmmc2 driver.
Make it clear by removing the corresponding caps after parsing the DT.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agommc: stm32_sdmmc2: add dual data rate support
Yann Gautier [Tue, 13 Sep 2022 11:23:44 +0000 (13:23 +0200)]
mmc: stm32_sdmmc2: add dual data rate support

To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
(DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
(no divider) is not allowed in this case. This is required for the
eMMC DDR modes.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agommc: f_sdh30: Add support for F_SDH30_E51
Kunihiko Hayashi [Fri, 9 Sep 2022 07:23:33 +0000 (16:23 +0900)]
mmc: f_sdh30: Add support for F_SDH30_E51

Add Socionext F_SDH30_E51 IP support. The features of this IP includes
CMD/DAT line delay and force card insertion mode for non-removable cards.
And the IP needs to add some quirks.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
2 years agommc: sdhci: Add new quirks for SUPPORT_SINGLE
Kunihiko Hayashi [Fri, 9 Sep 2022 07:23:32 +0000 (16:23 +0900)]
mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agommc: ftsdc010: make command timeout 250 ms as in the comment
Sergei Antonov [Fri, 2 Sep 2022 07:40:10 +0000 (10:40 +0300)]
mmc: ftsdc010: make command timeout 250 ms as in the comment

Get rid of discrepancy beween comment /* 250 ms */ and code
which shifts by 4 thus dividing by 16.
So change code to shift by 2 and make the timeout value 250 ms.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agomtd: spi-nor-core: Fix index value for SCCR dwords
Takahiro Kuwano [Mon, 12 Sep 2022 05:25:40 +0000 (14:25 +0900)]
mtd: spi-nor-core: Fix index value for SCCR dwords

Array index for SCCR 22th DWORD should be 21.

Fixes: bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map")
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi-nor-core: Rework s25hx_t_post_bfpt_fixup() for flash's internal address...
Takahiro Kuwano [Thu, 1 Sep 2022 06:05:33 +0000 (15:05 +0900)]
mtd: spi-nor-core: Rework s25hx_t_post_bfpt_fixup() for flash's internal address mode

The flash's internal address mode is tracked by nor->add_mode_nbytes and
it is set to 3 in BFPT parse. SEMPER multi-die package parts (>1Gb) are
3- or 4-byte address mode by default, depending on model number. We need
to make sure that 4-byte address mode is used for multi-die package parts.

For single-die package parts (<=1Gb), registers can be accessed by 3-byte
address. Read, program, and erase use the 4B opcodes that always take
4-byte address regardless of flash's internal address mode.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi-nor-core: Rework spansion_read/write_any_reg() to use addr_mode_nbytes
Takahiro Kuwano [Thu, 1 Sep 2022 06:05:32 +0000 (15:05 +0900)]
mtd: spi-nor-core: Rework spansion_read/write_any_reg() to use addr_mode_nbytes

Read/Write Any Register commands take 3- or 4- byte address depending on
flash's internal address mode. The nor->addr_width tracks number of
address bytes used in read/program/erase ops that can be 4
(with 4B opcodes) regardless of flash's internal address mode. The
nor->addr_mode_nbytes tracks flash's internal address mode so replace
nor->addr_width by that.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi-nor-core: Track flash's internal address mode
Takahiro Kuwano [Thu, 1 Sep 2022 06:05:31 +0000 (15:05 +0900)]
mtd: spi-nor-core: Track flash's internal address mode

The nor->addr_width tracks number of address bytes used in
read/program/erase ops and eventually set to 4 for >16MB chips, regardless
of flash's internal address mode. For Infineon SEMPER flash's, we use
Read/Write Any Register commands for configuration and status check.
These commands take 3- or 4-byte address depending on flash's internal
address mode.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi-nor-core: Default to addr_width of 3 for configurable widths
Takahiro Kuwano [Thu, 1 Sep 2022 06:05:30 +0000 (15:05 +0900)]
mtd: spi-nor-core: Default to addr_width of 3 for configurable widths

JESD216D-01 mentions that "defaults to 3-Byte mode; enters 4-Byte mode on
command."

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi-nor-ids: Add s28hl512t, s28hl01gt, and s28hs01gt IDs
Takahiro Kuwano [Thu, 25 Aug 2022 07:48:48 +0000 (16:48 +0900)]
mtd: spi-nor-ids: Add s28hl512t, s28hl01gt, and s28hs01gt IDs

Add flash info table entries for s28hl512gt, s28hl01gt, and s28hs01gt.
These devices have the same functionality as s28hs512t.

In spi-nor-core, use device ID byte to detect S28 family instead of
device name.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi-nor-core: Rename configuration macro for S28 support
Takahiro Kuwano [Thu, 25 Aug 2022 07:48:47 +0000 (16:48 +0900)]
mtd: spi-nor-core: Rename configuration macro for S28 support

Change configuration macro name to support all other devices in SEMPER S28
family.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agomtd: spi-nor-core: Rename s28hs512t prefix
Takahiro Kuwano [Thu, 25 Aug 2022 07:48:46 +0000 (16:48 +0900)]
mtd: spi-nor-core: Rename s28hs512t prefix

Change prefix to support all other devices in SEMPER S28 family.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2 years agoMerge branch '2022-10-21-assorted-fixes-and-updates'
Tom Rini [Sat, 22 Oct 2022 15:19:31 +0000 (11:19 -0400)]
Merge branch '2022-10-21-assorted-fixes-and-updates'

- NC-SI handling support and enable on evb-ast2[56]00, gpio driver for
  ADP5585, improve qfw support, print more sysresets info, gw_ventana
  and gcc-12 bugfix, improve BCB support, fix a few typos and remove an
  unused keymile CONFIG symbol.

2 years agoboard/km: drop CONFIG_KM_ROOTFSSIZE
Holger Brunck [Mon, 17 Oct 2022 09:45:21 +0000 (11:45 +0200)]
board/km: drop CONFIG_KM_ROOTFSSIZE

This unused nowadays and can be dropped.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
2 years agoblk: fix a couple of trivial documentation typos
Mattijs Korpershoek [Mon, 17 Oct 2022 07:35:04 +0000 (09:35 +0200)]
blk: fix a couple of trivial documentation typos

In some cases, the param variable is wrong, and in other cases we have
undocumented arguments.

Fix the docs.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agotest: Fix typo in test name
Michal Suchanek [Sat, 15 Oct 2022 09:30:37 +0000 (11:30 +0200)]
test: Fix typo in test name

For other sandbox tests the printed test name corresponds to the
configuration except for this one.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agocmd: bcb: select user(0) hwpart in __bcb_load()
Mattijs Korpershoek [Thu, 13 Oct 2022 12:25:59 +0000 (14:25 +0200)]
cmd: bcb: select user(0) hwpart in __bcb_load()

For some blk operations, it's possible that a different hw partition
gets selected via blk_dselect_hwpart().
In that case, only the region of the device covered by that partition
is accessible.

This breaks "bcb load" which attempts to read the gpt and assumes it's
on the user(0) hw partition:

=> bcb load 2 misc
GUID Partition Table Header signature is wrong: 0xDE7B17AD07D9E5D6 != 0x5452415020494645
find_valid_gpt: *** ERROR: Invalid GPT ***
GUID Partition Table Header signature is wrong: 0x0 != 0x5452415020494645
find_valid_gpt: *** ERROR: Invalid Backup GPT ***
Error: mmc 2:misc read failed (-2)

Add a fail-safe in __bcb_load() to ensure we will always read from the
user(0) hwpartition.

This fixes the following fastboot sequence:

$ fastboot erase mmc2boot1    # switch to hwpart1
$ fastboot reboot bootloader  # switch to hwpart0, then reads GPT

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2 years agoboard: gateworks: gw_ventana: fix building with GCC 12.2
Heinrich Schuchardt [Wed, 12 Oct 2022 16:59:27 +0000 (18:59 +0200)]
board: gateworks: gw_ventana: fix building with GCC 12.2

Building with GCC 12.2 results in an error

    board/gateworks/gw_ventana/gw_ventana.c:636:68: error: the comparison
    will always evaluate as 'true' for the address of 'pwm_padmux' will
    never be NULL [-Werror=address]
      636 |                 } else if (hwconfig_subarg_cmp(arg, "mode", "pwm") &&
          |                                                                    ^~

Remove the superfluous check.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2 years agocommon: board_f: Print information for all sysresets
Michal Suchanek [Mon, 10 Oct 2022 18:29:40 +0000 (20:29 +0200)]
common: board_f: Print information for all sysresets

Boards can have multiple sysresets, iterate all when printing sysreset
info.

Fixes: 23471aed5c ("board_f: Add reset status printing")
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agosandbox: Initialize sysreset before relocation
Michal Suchanek [Mon, 10 Oct 2022 18:29:39 +0000 (20:29 +0200)]
sandbox: Initialize sysreset before relocation

Without this the early sysreset code cannot be tested.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoqemu: Try to automatically boot from the QEMU firmware device (qfw)
Andre Przywara [Mon, 10 Oct 2022 17:01:22 +0000 (18:01 +0100)]
qemu: Try to automatically boot from the QEMU firmware device (qfw)

At the moment the QEMU boot sequence tries various (storage) devices
when trying to find a payload to boot.
To simplify starting a specific kernel and initrd, there is also the qfw
command, which can use the files specified on the QEMU command line, via
the -kernel and -initrd options.
Add this command to the list of boot options to try. Since users
specifying those options on the command line probably explicitly want
to run them, let's place the new command first. Without those options,
the qfw command will just gracefully fail, and we continue with the
existing order.

This allows auto-booting of specific kernels in QEMU, for instance in CI
systems.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agoqfw: return failure when no kernel could be loaded
Andre Przywara [Mon, 10 Oct 2022 17:01:21 +0000 (18:01 +0100)]
qfw: return failure when no kernel could be loaded

When we try to load a kernel via the QEMU firmware device, we currently
"return -1;" if no kernel was specified on the QEMU command line. This
leads to the usage output, which is confusing (since nothing on the
command line was really wrong), but also somewhat hides the actual error
message.

Return CMD_RET_FAILURE (1), as it's a proper error, and make the message
more clear that this is not only a "warning".

This helps to call this command in boot scripts, and to gracefully
continue if this doesn't work.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agoqfw: store loaded file size in environment variable
Andre Przywara [Mon, 10 Oct 2022 17:01:20 +0000 (18:01 +0100)]
qfw: store loaded file size in environment variable

At the moment the QEMU firmware command just prints the size of the
loaded binaries on the console.
To go with all the other load methods, and many boot scripts'
expectations, also store the size of the file loaded last in the
environment variable "filesize".
We first put the kernel size in there, but overwrite this with the
initrd size, should we have one, because this is probably the more
prominent user of $filesize (in the booti or bootz command).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2 years agogpio: adp5585: add gpio driver for ADP5585 I/O Expander Controller
Alice Guo [Sun, 9 Oct 2022 03:19:22 +0000 (11:19 +0800)]
gpio: adp5585: add gpio driver for ADP5585 I/O Expander Controller

Add gpio driver for ADP5585 I/O Expander Controller. The ADP5585 is a 10
input/output port expander and can be used to increase the number of
I/Os available to a processor.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2 years agoconfig/aspeed: Enable NC-SI support
Joel Stanley [Mon, 8 Aug 2022 12:16:06 +0000 (21:46 +0930)]
config/aspeed: Enable NC-SI support

Aspeed BMCs are commonly used with NC-SI. A system indicates the driver
should configure the link over NC-SI using the device tree.

Add it to the defconfig so we get compile coverage of the driver, even
if the EVBs do not normally use it.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2 years agonet/ftgmac100: Add NC-SI mode support
Samuel Mendoza-Jonas [Mon, 8 Aug 2022 12:16:05 +0000 (21:46 +0930)]
net/ftgmac100: Add NC-SI mode support

Update the ftgmac100 driver to support NC-SI instead of an mdio phy
where available. This is a common setup for Aspeed AST2x00 platforms.

NC-SI mode is determined from the device-tree if either phy-mode sets it
or the use-ncsi property exists. If set then normal mdio setup is
skipped in favour of the NC-SI phy.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2 years agocmd: Add ncsi command
Samuel Mendoza-Jonas [Mon, 8 Aug 2022 12:16:04 +0000 (21:46 +0930)]
cmd: Add ncsi command

Adds an "ncsi" command to manually start NC-SI configuration.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2 years agonet: NC-SI setup and handling
Samuel Mendoza-Jonas [Mon, 8 Aug 2022 12:16:03 +0000 (21:46 +0930)]
net: NC-SI setup and handling

Add the handling of NC-SI ethernet frames, and add a check at the start
of net_loop() to configure NC-SI before starting other network commands.

Signed-off-by: Samuel Mendoza-Jonas <sam@mendozajonas.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2 years agoMerge branch '2022-10-21-enforce-some-DM-migrations'
Tom Rini [Fri, 21 Oct 2022 19:32:45 +0000 (15:32 -0400)]
Merge branch '2022-10-21-enforce-some-DM-migrations'

- Enforce CONFIG_DM being enabled (which has been the case for all
  boards for a bit now) and remove non-DM_KEYBOARD options as they're also
  unused for some time now.

2 years agoconfigs: Resync with savedefconfig
Tom Rini [Fri, 21 Oct 2022 17:28:36 +0000 (13:28 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agoinput: Remove legacy KEYBOARD option
Tom Rini [Fri, 14 Oct 2022 11:50:20 +0000 (07:50 -0400)]
input: Remove legacy KEYBOARD option

There are no platforms that have not migrated to using DM_KEYBOARD,
remove the legacy option.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agocore: Enable DM by default
Tom Rini [Fri, 14 Oct 2022 11:50:19 +0000 (07:50 -0400)]
core: Enable DM by default

There are no longer any platforms which do not enable DM, move this to a
def_bool y and remove the check in the Makefile.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2 years agoMerge tag 'u-boot-at91-fixes-2023.01-a' of https://source.denx.de/u-boot/custodians...
Tom Rini [Fri, 21 Oct 2022 12:33:48 +0000 (08:33 -0400)]
Merge tag 'u-boot-at91-fixes-2023.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91

First set of u-boot-at91 fixes for the 2023.01 cycle:

This small fixes set includes an indentation fix for sam9x60 DT and one
name for one pin for sama7g5.

2 years agoimx8mn-venice-u-boot: Fix broken boot
Fabio Estevam [Mon, 3 Oct 2022 13:59:24 +0000 (10:59 -0300)]
imx8mn-venice-u-boot: Fix broken boot

When the imx8mm.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree.  This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot.  Fix this by adding the spba node to the spl
device tree to restore normal booting.

Based on the patch from Adam Ford for the imx8mn-beacon-kit-u-boot
board.

Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2 years agoimx8mn-ddr4-evk-u-boot: Fix broken boot
Fabio Estevam [Mon, 3 Oct 2022 13:39:21 +0000 (10:39 -0300)]
imx8mn-ddr4-evk-u-boot: Fix broken boot

When the imx8mm.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree.  This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot.  Fix this by adding the spba node to the spl
device tree to restore normal booting.

Based on the patch from Adam Ford for the imx8mn-beacon-kit-u-boot
board.

Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2 years agoboard: gateworks: gw_ventana: fix mmc env dev
Tim Harvey [Wed, 28 Sep 2022 21:00:35 +0000 (14:00 -0700)]
board: gateworks: gw_ventana: fix mmc env dev

Fix the MMC env device for boards with eMMC by adding a
board_mmc_get_env_dev override to return the boot device as the
MMC env device.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2 years agoARM: imx6: dh-imx6: Use sf update instead of sf erase and write
Marek Vasut [Wed, 28 Sep 2022 16:45:18 +0000 (18:45 +0200)]
ARM: imx6: dh-imx6: Use sf update instead of sf erase and write

With sf update fixed to support unaligned start offset, use plain
sf update to update the bootloader in SPI NOR. This also helps
avoid the case where not enough SPI NOR has been erased and the
bootloader has been written to unerased area, and thus corrupted.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agoARM: imx: Enable btrfs support on DHSOM
Marek Vasut [Wed, 28 Sep 2022 15:40:11 +0000 (17:40 +0200)]
ARM: imx: Enable btrfs support on DHSOM

The btrfs filesystem provides advanced functionality like copy-on-write
and snapshots, as well as metadata and data duplication and checksumming.
Enable btrfs in U-Boot to permit even the primary partition to be btrfs
and let system boot from it.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agocrypto/fsl: fsl_rsa: Fix dcache issue in the driver
Ye Li [Wed, 28 Sep 2022 10:19:02 +0000 (15:49 +0530)]
crypto/fsl: fsl_rsa: Fix dcache issue in the driver

issue:
CAAM fails with key error when perform Modular Exponentiation
using PKHA Block in CAAM

Fix:
add flush and invalidate dcache for keys, signature
and output decrypted data processed by CAAM.

Fixes: 34276478f7 (DM: crypto/fsl - Add Freescale rsa DM driver)
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2 years agoapalis/colibri_imx6/-imx6ull/_imx7: update env memory layout
Marcel Ziswiler [Tue, 27 Sep 2022 15:50:52 +0000 (17:50 +0200)]
apalis/colibri_imx6/-imx6ull/_imx7: update env memory layout

Update the distro config env memory layout for the Apalis iMX6,
Colibri iMX6, Colibri iMX6ULL and Colibri iMX7:

- loadaddr=0x84200000 (resp. 0x14200000 on them i.MX 6) allows for 64MB
  area for uncompressing (ie FIT images)
- fdt_addr_r = loadaddr + 64MB : allows for 64MB kernel
- scriptaddr = fdt_addr_r + 512KB : allows for 512KB fdt
- pxefile_addr_r = scriptaddr + 512KB : allows for 512KB script
- ramdisk_addr_r = pxefile_addr_r + 512KB : allows for 1MB extlinux.conf

Memory layout analogous to 64-bit one from commit fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout") but left pxefile_addr_r
updated according to doc/develop/distro.rst.

This fixes a potential issue caused by the compressed kernel being
relocated on top of the ramdisk causing its corruption.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2 years agonitrogen6x: Remove extra quotes in fdtfile
Ariel D'Alessandro [Tue, 27 Sep 2022 14:24:53 +0000 (11:24 -0300)]
nitrogen6x: Remove extra quotes in fdtfile

After commit 395110284b56 ("nitrogen6x: Populate FDTFILE at build-time
for all platforms") iMX.6Q Sabrelite fails to boot due to a bad fdtfile
string:

  Retrieving file: /dtbs/5.18.0-0.deb11.4-armmp/"imx6q-sabrelite".dtb
  ** File not found /dtbs/5.18.0-0.deb11.4-armmp/"imx6q-sabrelite".dtb **

CONFIG_DEFAULT_DEVICE_TREE option is string typed, so __stringify() is
adding extra quotes. Remove this.

Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
2 years agoclk-imx8mm: Only build QSPI clocks when CONFIG_NXP_FSPI=y
Fabio Estevam [Mon, 26 Sep 2022 16:40:11 +0000 (13:40 -0300)]
clk-imx8mm: Only build QSPI clocks when CONFIG_NXP_FSPI=y

The QSPI clocks are only used when CONFIG_NXP_FSPI=y, so only build the
QSPI clocks in this case to reduce the final SPL binary size.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2 years agoclk-imx8mm: Only build ecspi clocks when CONFIG_DM_SPI=y
Fabio Estevam [Mon, 26 Sep 2022 16:40:10 +0000 (13:40 -0300)]
clk-imx8mm: Only build ecspi clocks when CONFIG_DM_SPI=y

The ecspi clocks are only used when CONFIG_DM_SPI=y, so only build the
ecspi clocks in this case to reduce the final SPL binary size.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2 years agoclk-imx8mm: Move CLK_ENET_AXI to the non-SPL section
Fabio Estevam [Mon, 26 Sep 2022 16:40:09 +0000 (13:40 -0300)]
clk-imx8mm: Move CLK_ENET_AXI to the non-SPL section

Ethernet is not used inside SPL, so move the IMX8MM_CLK_ENET_AXI clock
inside the non-SPL block to reduce the final SPL binary size.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2 years agoclk-imx8mm: Only build PWM clocks in non-SPL code
Fabio Estevam [Mon, 26 Sep 2022 16:40:08 +0000 (13:40 -0300)]
clk-imx8mm: Only build PWM clocks in non-SPL code

PWM is not used inside SPL, so do not define the PWM clocks inside
SPL to reduce the final SPL binary size.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2 years agommc: fsl_esdhc: fix problem when using clk driver
Ye Li [Fri, 23 Sep 2022 22:29:33 +0000 (00:29 +0200)]
mmc: fsl_esdhc: fix problem when using clk driver

Move init_clk_usdhc to non-clk driver case, since assigned-clocks properties
will initialize the clocks by clk driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>