- A large number of updates for i.MX8 platforms. We update buildman /
binman to be able to fake binaries if needed, for CI, and tell the user
the binary won't work. Update platforms to build again with these
changes.
The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in imx8mm-kontron-n801x-s-u-boot.dtsi and causes
a build error. Remove the duplicate.
Fixes: 3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration") Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
The binman node is part of the imx8mm-u-boot.dtsi file which
is duplicated in phycore-imx8mm-u-boot.dtsi and causes a build
error. Remove the duplicate.
Fixes: 3cbb31f0e848 ("arm64: dts: imx8mm: use common binman configuration") Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Marcel Ziswiler [Fri, 22 Oct 2021 23:15:13 +0000 (01:15 +0200)]
arm64: dts: imx8mm: use common binman configuration
With the move to using binman to generate SPL aka u-boot-spl-ddr.bin and
U-Boot proper aka u-boot.itb every board now covers such configuration
in its own U-Boot specific device tree include. Move the comon part of
that configuration to the common imx8mm-u-boot.dtsi include file.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Fri, 10 Sep 2021 20:19:22 +0000 (15:19 -0500)]
imx8mn_beacon: Fix booting hang and switch to binman
Somewhere along the line, the board stopped being able to boot.
Rather than just fixing the issue, let's fix the issue and migrate
to binman to eliminate a warning when using custom imx tools for
generating the binary.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Heiko Thiery [Thu, 6 Jan 2022 10:49:41 +0000 (11:49 +0100)]
binman: add support for creating dummy files for external blobs
While converting to binman for an imx8mq board, it has been found that
building in the u-boot CI fails. This is because an imx8mq requires an
external binary (signed_hdmi_imx8m.bin). If this file cannot be found
mkimage fails.
To be able to build this board in the u-boot CI a binman option
(--fake-ext-blobs) is introduced that can be switched on via the u-boot
makefile option BINMAN_FAKE_EXT_BLOBS. With that the needed dummy files are
created.
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
- Revert a clk change, to enable some platforms to work again
- Updates to the udoo NEO family of boards to work correctly
- Fix SiFive Unleashes/Unmatched boards booting
- Update rockchip maintainer entry
Marek Vasut [Sat, 1 Jan 2022 18:51:39 +0000 (19:51 +0100)]
Revert "clk: Detect failure to set defaults"
This reverts commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646.
The aforementioned patch causes massive breakage on all platforms which
have 'assigned-clock' DT property in their DT which references any clock
that are not supported by the platform clock driver. That can easily
happen either in SPL, or because the clock driver is reduced. Currently
it seems all iMX8M are affected and fail to boot altogether.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Peng Fan <peng.fan@oss.nxp.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Peter Robinson [Tue, 21 Dec 2021 12:32:48 +0000 (12:32 +0000)]
udoo_neo: Fix ethernet
The ethernet has a RMII not RGMII, also needs DM_MDIO and finally
initialise it later in the process as it's not needed that early on
and not everything is ready so it locks up the device.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Peter Robinson [Tue, 21 Dec 2021 12:32:47 +0000 (12:32 +0000)]
udoo_neo: Fixes for booting from the mSD card
This fixes booting from the mSD card from both SPL and when
using it for the OS booting. It also cleans up a few mmc
booting bits that are no longer needed.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Bin Meng [Wed, 5 Jan 2022 01:07:57 +0000 (09:07 +0800)]
riscv: sifive: Fix OF_BOARD boot failure
When using QEMU to have a quick test of booting U-Boot S-mode payload
directly without the needs of preparing the SPI flash or SD card images
for SiFive Unleashed board, as per the instructions [1], it currently
does not boot any more.
This was caused by the OF_PRIOR_STAGE removal, as gd->fdt_blob no longer
points to a valid DTB. OF_BOARD is supposed to replace OF_PRIOR_STAGE,
hence we need to add the OF_BOARD logic in board_fdt_blob_setup().
Pierre Bourdon [Sat, 25 Dec 2021 19:50:19 +0000 (20:50 +0100)]
tools: kwbimage: Fix checksum calculation for v1 images
Recent changes caused fields in the image main header to be modified
after the header checksum had already been computed. Move the checksum
computation to once again be the last operation performed on the header.
Fixes: 2b0980c24027 ("tools: kwbimage: Fill the real header size into the main header") Signed-off-by: Pierre Bourdon <delroth@gmail.com> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
Giulio Benetti [Sat, 23 Oct 2021 22:34:42 +0000 (00:34 +0200)]
video: mxsfb: fix clk_get_by_name() return value check
If clk_get_by_name() returns 0 it means it executed successfully while now
we consider it as an error. So let's check if return value is negative to
be an error. Otherwise this prevents "axi" and "disp_axi" to be enabled.
The watchdog system reset driver can reboot the device but it cannot power
it off. If power off is requested, the driver should not reset the system
but leave powering off to one of the other system reset drivers.
As power cycling is typically not a feature of a watchdog driver the reset
types SYSRESET_POWER and SYSRESET_POWER_OFF shall both be excluded.
Fixes: 17a0c14164dc ("dm: sysreset: add watchdog-reboot driver") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Stefan Roese <sr@denx.de>
Ilias Apalodimas [Fri, 24 Dec 2021 08:08:41 +0000 (10:08 +0200)]
efi_loader: Don't limit the StMM buffer size explicitly
Currently we allow and explicitly check a single shared page with
StandAloneMM. This is dictated by OP-TEE which runs the application.
However there's no way for us dynamically discover the number of pages we
are allowed to use. Since writing big EFI signature list variable
requires more than a page, OP-TEE has bumped the number of shared pages to
four.
Let's remove our explicit check and allow the request to reach OP-TEE even
if it's bigger than what it supports. There's no need to sanitize the
number of pages internally. OP-TEE will fail if we try to write more
than it's allowed. The error will just trigger later on, during the
StMM access.
While at it add an error message to help users figure out what failed.
Jagan Teki [Mon, 15 Nov 2021 17:38:19 +0000 (23:08 +0530)]
arm64: dts: rockchip: px30: Move dmc into -u-boot.dtsi
dmc node is specific to U-Boot, it is always better practice
to maintain U-Boot specific nodes into -u-boot.dtsi files
in order to maintain Linux dts file sync compatibility.
Move the dmc into px30-u-boot.dtsi, also add dmc node
explicitly in rk3326-odroid-go2-u-boot.dtsi since it is
using px30.dts.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Yifeng Zhao [Mon, 1 Nov 2021 04:43:47 +0000 (12:43 +0800)]
dts: rockchip: rk3399: enable emmc phy for spl
adapting commit ac804143cf ("mmc: rockchip_sdhci: add phy and clock
config for rk3399") to fix the issue "Not found emmc phy device".
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> - on a Rock960 Reviewed-by: Patrick Wildt <patrick@blueri.se> Tested-by: Patrick Wildt <patrick@blueri.se> - on a Pinebook Pro Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Wed, 25 Aug 2021 16:23:57 +0000 (11:23 -0500)]
rockchip: px30: add support for HW RNG for Odroid Go Advance
The Odroid Go Advance has a hardware random number generator present.
The device does not have an upstream Linux driver, but does have a
U-Boot driver. Add the appropriate node so that the hardware RNG can be
used in U-Boot.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Wed, 25 Aug 2021 16:22:57 +0000 (11:22 -0500)]
cmd: kaslrseed: add command to generate value from hwrng
Allow the kaslr-seed value in the chosen node to be set from a hardware
rng source.
Tested on a Rockchip PX30 (Odroid Go Advance), you must have loaded
the devicetree first and prepared it for editing. On my device the
workflow goes as follows:
fw_setenv: Unbreak fw_setenv caused by buggy MEMISLOCKED use
Commit "fw_setenv: lock the flash only if it was locked before"
checks for Locked status with uninitialized erase data.
Address by moving the test for MEMISLOCKED.
Fixes: 8a726b852502 ("fw_setenv: lock the flash only if it was locked before") Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Stefan Roese [Thu, 18 Nov 2021 08:18:41 +0000 (09:18 +0100)]
i2c: mvtwsi: Swab the register address if its size is > 1
Testing on Armada XP with an EEPROM using register address with size
of 2 has shown, that the register address bytes are sent to the I2C
EEPROM in the incorrect order. This patch swabs the address bytes so
that the correct address is transferred to the I2C device.
BTW: This worked without any issues before migrating Armada XP to
DM I2C.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Samuel Holland <samuel@sholland.org> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Pali Rohár <pali@kernel.org> Cc: Marek Behún <marek.behun@nic.cz> Tested-by: Marek Behún <marek.behun@nic.cz>
AKASHI Takahiro [Fri, 10 Dec 2021 06:49:36 +0000 (15:49 +0900)]
dm: fix an 'undefined' error in some macros
Due to a non-existing parameter name in macro's, use of those macro's will
cause a compiler error of "undefined reference".
Unfortunately, dm test doesn't fail because a wrong name ("&dev", hence it
is accidentally a valid name in the context of a caller site) is passed on.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Fixes: f262d4ca4b2b ("dm: core: Add a way to read platdata for all
child devices") Fixes: 903e83ee8464 ("dm: core: Add a way to iterate through children,
probing each") Reviewed-by: Simon Glass <sjg@chromium.org>
AKASHI Takahiro [Fri, 10 Dec 2021 06:49:28 +0000 (15:49 +0900)]
part: call part_init() in blk_get_device_by_str() only for MMC
In blk_get_device_by_str(), the comment says: "Updates the partition table
for the specified hw partition."
Since hw partition is supported only on MMC, it makes no sense to do so
for other devices.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
The Calxeda servers are using U-Boot as the primary bootloader, which
was shipped as part of a firmware upgrade package.
Even though the machines are considered legacy at this point, the port
still works, so deserves some documentation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Double peripheral RBF configuration are needed on some devices or boards
to stabilize the IO configuration system.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Sun, 7 Nov 2021 15:08:55 +0000 (23:08 +0800)]
arm: socfpga: arria10: Reset MPFE NoC after program periph / combined RBF
This patch triggers warm reset to recover the MPFE NoC from corruption
due to high frequency transient clock output from HPS EMIF IOPLL at
VCO startup after peripheral RBF is programmed.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Sun, 7 Nov 2021 15:08:54 +0000 (23:08 +0800)]
arm: socfpga: arria10: Setting image magic value to romcode initswstate reg
The romcode_initswstate register need to be set with FSBL_IMAGE_IS_VALID
value if the current FSBL image is found valid, otherwise BootROM will
look for next subsequent valid FSBL image when warm reset is triggered.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Giulio Benetti [Sun, 14 Feb 2021 02:17:18 +0000 (03:17 +0100)]
clk: fix clk_get_rate() documentation
Improve clk_get_rate() @return documentation that otherwise is a bit
ambiguous. At the moment I expect to return 0 as error since the return
type is 'ulong', instead the function really returns negative value in
case the corresponding function pointer is null and returns 0 if the clock
is invalid.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
Pali Rohár [Thu, 11 Nov 2021 15:35:48 +0000 (16:35 +0100)]
arm: a37xx: pci: Do not allow setting ROM BAR on PCI Bridge
PCI Bridge which represents aardvark PCIe Root Port has Expansion ROM Base
Address register at offset 0x30 but its meaning is different than PCI's
Expansion ROM BAR register. Only address format of register is same.
In reality, this device does not have any configurable PCI BARs. So ensure
that write operation into BARs (including Expansion ROM BAR) is noop and
registers always contain zero address which indicates that bars are
unsupported.
Fixes: cb056005dc67 ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 11 Nov 2021 15:35:45 +0000 (16:35 +0100)]
pci: pci_mvebu: Do not allow setting ROM BAR on PCI Bridge
The PCI Bridge which represents mvebu PCIe Root Port has Expansion ROM
Base Address register at offset 0x30 but its meaning is different that
of PCI's Expansion ROM BAR register, although the address format of
the register is the same.
In reality, this device does not have any configurable PCI BARs. So
ensure that write operation into BARs (including Expansion ROM BAR) is a
noop and registers always contain zero address which indicates that BARs
are unsupported.
Fixes: a7b61ab58d5d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Marek Vasut [Sat, 13 Nov 2021 02:27:37 +0000 (03:27 +0100)]
ARM: dts: stm32: Add custom PHY reset bindings on AV96
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Sat, 13 Nov 2021 02:26:39 +0000 (03:26 +0100)]
ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM
The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Sat, 13 Nov 2021 02:26:05 +0000 (03:26 +0100)]
ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM
The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Sat, 13 Nov 2021 02:25:13 +0000 (03:25 +0100)]
ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Sat, 13 Nov 2021 02:24:44 +0000 (03:24 +0100)]
ARM: stm32: Increase USB power-good delay on DHSOM
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.
This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Adam Ford [Mon, 6 Dec 2021 16:29:30 +0000 (10:29 -0600)]
configs: beacon-rzg2m: Config to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This changed the default boot device and caused boot failure.
Update the mmcdev variable to reflect the new aliases.
Adam Ford [Mon, 6 Dec 2021 16:29:29 +0000 (10:29 -0600)]
ARM: rmobile: Fix rzg2_beacon_defconfig to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This broke the reading/writing of the environmental variables,
so update the defconfig accordingly.
Adam Ford [Mon, 6 Dec 2021 16:29:28 +0000 (10:29 -0600)]
arm: dts: Create common rz-g2-beacon-u-boot file
The rzg2_beacon_defconfig creates an image for RZ/G2[MNH] and
as such creates three different device trees and each of them
have a corresponding -u-boot.dtsi file which are basically
copies of each other. Create a common include file to be
referenced by each of the respective board-u-boot.dtsi files
to reduce duplicate code and simplify support going forward.
This also restores some lost functionality from the device
tree re-sync and updates the MAINTAINER file to include all
beacon-renesom device tree files.
Adam Ford [Mon, 6 Dec 2021 16:29:26 +0000 (10:29 -0600)]
net: ravb: Support multiple clocks
The RZ/G2 series uses an external clock as a reference to the AVB.
If this clock is controlled by an external programmable clock,
it must be requested by the consumer or it will not turn on.
In order to do this, update the driver to use bulk enable and
disable functions to enable clocks for boards with multiple clocks.
Tom Rini [Fri, 10 Dec 2021 12:58:43 +0000 (07:58 -0500)]
Merge tag 'efi-2022-01-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2022-01-rc4-2
UEFI:
* correctly handle missing TPM device
* prepare for block devices for U-Boot as EFI app
# gpg: Signature made Fri 10 Dec 2021 04:29:20 AM EST
# gpg: using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg: aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4
projects / u-boot.git / log